1 /* Assembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-asm.in isn't 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007 8 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 27 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 28 Keep that in mind. */ 29 30 #include "sysdep.h" 31 #include <stdio.h> 32 #include "ansidecl.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "m32c-desc.h" 36 #include "m32c-opc.h" 37 #include "opintl.h" 38 #include "xregex.h" 39 #include "libiberty.h" 40 #include "safe-ctype.h" 41 42 #undef min 43 #define min(a,b) ((a) < (b) ? (a) : (b)) 44 #undef max 45 #define max(a,b) ((a) > (b) ? (a) : (b)) 46 47 static const char * parse_insn_normal 48 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); 49 50 /* -- assembler routines inserted here. */ 51 52 /* -- asm.c */ 53 #include "safe-ctype.h" 54 55 #define MACH_M32C 5 /* Must match md_begin. */ 56 57 static int 58 m32c_cgen_isa_register (const char **strp) 59 { 60 int u; 61 const char *s = *strp; 62 static char * m32c_register_names [] = 63 { 64 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h", 65 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf", 66 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0", 67 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0 68 }; 69 70 for (u = 0; m32c_register_names[u]; u++) 71 { 72 int len = strlen (m32c_register_names[u]); 73 74 if (memcmp (m32c_register_names[u], s, len) == 0 75 && (s[len] == 0 || ! ISALNUM (s[len]))) 76 return 1; 77 } 78 return 0; 79 } 80 81 #define PARSE_UNSIGNED \ 82 do \ 83 { \ 84 /* Don't successfully parse literals beginning with '['. */ \ 85 if (**strp == '[') \ 86 return "Invalid literal"; /* Anything -- will not be seen. */ \ 87 \ 88 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\ 89 if (errmsg) \ 90 return errmsg; \ 91 } \ 92 while (0) 93 94 #define PARSE_SIGNED \ 95 do \ 96 { \ 97 /* Don't successfully parse literals beginning with '['. */ \ 98 if (**strp == '[') \ 99 return "Invalid literal"; /* Anything -- will not be seen. */ \ 100 \ 101 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \ 102 if (errmsg) \ 103 return errmsg; \ 104 } \ 105 while (0) 106 107 static const char * 108 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp, 109 int opindex, unsigned long *valuep) 110 { 111 const char *errmsg = 0; 112 unsigned long value; 113 114 PARSE_UNSIGNED; 115 116 if (value > 0x3f) 117 return _("imm:6 immediate is out of range"); 118 119 *valuep = value; 120 return 0; 121 } 122 123 static const char * 124 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp, 125 int opindex, unsigned long *valuep) 126 { 127 const char *errmsg = 0; 128 unsigned long value; 129 long have_zero = 0; 130 131 if (strncasecmp (*strp, "%dsp8(", 6) == 0) 132 { 133 enum cgen_parse_operand_result result_type; 134 bfd_vma value; 135 const char *errmsg; 136 137 *strp += 6; 138 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8, 139 & result_type, & value); 140 if (**strp != ')') 141 return _("missing `)'"); 142 (*strp) ++; 143 144 if (errmsg == NULL 145 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 146 { 147 return _("%dsp8() takes a symbolic address, not a number"); 148 } 149 *valuep = value; 150 return errmsg; 151 } 152 153 if (strncmp (*strp, "0x0", 3) == 0 154 || (**strp == '0' && *(*strp + 1) != 'x')) 155 have_zero = 1; 156 157 PARSE_UNSIGNED; 158 159 if (value > 0xff) 160 return _("dsp:8 immediate is out of range"); 161 162 /* If this field may require a relocation then use larger dsp16. */ 163 if (! have_zero && value == 0) 164 return _("dsp:8 immediate is out of range"); 165 166 *valuep = value; 167 return 0; 168 } 169 170 static const char * 171 parse_signed4 (CGEN_CPU_DESC cd, const char **strp, 172 int opindex, signed long *valuep) 173 { 174 const char *errmsg = 0; 175 signed long value; 176 long have_zero = 0; 177 178 if (strncmp (*strp, "0x0", 3) == 0 179 || (**strp == '0' && *(*strp + 1) != 'x')) 180 have_zero = 1; 181 182 PARSE_SIGNED; 183 184 if (value < -8 || value > 7) 185 return _("Immediate is out of range -8 to 7"); 186 187 /* If this field may require a relocation then use larger dsp16. */ 188 if (! have_zero && value == 0) 189 return _("Immediate is out of range -8 to 7"); 190 191 *valuep = value; 192 return 0; 193 } 194 195 static const char * 196 parse_signed4n (CGEN_CPU_DESC cd, const char **strp, 197 int opindex, signed long *valuep) 198 { 199 const char *errmsg = 0; 200 signed long value; 201 long have_zero = 0; 202 203 if (strncmp (*strp, "0x0", 3) == 0 204 || (**strp == '0' && *(*strp + 1) != 'x')) 205 have_zero = 1; 206 207 PARSE_SIGNED; 208 209 if (value < -7 || value > 8) 210 return _("Immediate is out of range -7 to 8"); 211 212 /* If this field may require a relocation then use larger dsp16. */ 213 if (! have_zero && value == 0) 214 return _("Immediate is out of range -7 to 8"); 215 216 *valuep = -value; 217 return 0; 218 } 219 220 static const char * 221 parse_signed8 (CGEN_CPU_DESC cd, const char **strp, 222 int opindex, signed long *valuep) 223 { 224 const char *errmsg = 0; 225 signed long value; 226 227 if (strncasecmp (*strp, "%hi8(", 5) == 0) 228 { 229 enum cgen_parse_operand_result result_type; 230 bfd_vma value; 231 const char *errmsg; 232 233 *strp += 5; 234 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8, 235 & result_type, & value); 236 if (**strp != ')') 237 return _("missing `)'"); 238 (*strp) ++; 239 240 if (errmsg == NULL 241 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 242 { 243 value >>= 16; 244 } 245 *valuep = value; 246 return errmsg; 247 } 248 249 PARSE_SIGNED; 250 251 if (value <= 255 && value > 127) 252 value -= 0x100; 253 254 if (value < -128 || value > 127) 255 return _("dsp:8 immediate is out of range"); 256 257 *valuep = value; 258 return 0; 259 } 260 261 static const char * 262 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp, 263 int opindex, unsigned long *valuep) 264 { 265 const char *errmsg = 0; 266 unsigned long value; 267 long have_zero = 0; 268 269 if (strncasecmp (*strp, "%dsp16(", 7) == 0) 270 { 271 enum cgen_parse_operand_result result_type; 272 bfd_vma value; 273 const char *errmsg; 274 275 *strp += 7; 276 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16, 277 & result_type, & value); 278 if (**strp != ')') 279 return _("missing `)'"); 280 (*strp) ++; 281 282 if (errmsg == NULL 283 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 284 { 285 return _("%dsp16() takes a symbolic address, not a number"); 286 } 287 *valuep = value; 288 return errmsg; 289 } 290 291 /* Don't successfully parse literals beginning with '['. */ 292 if (**strp == '[') 293 return "Invalid literal"; /* Anything -- will not be seen. */ 294 295 /* Don't successfully parse register names. */ 296 if (m32c_cgen_isa_register (strp)) 297 return "Invalid literal"; /* Anything -- will not be seen. */ 298 299 if (strncmp (*strp, "0x0", 3) == 0 300 || (**strp == '0' && *(*strp + 1) != 'x')) 301 have_zero = 1; 302 303 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 304 if (errmsg) 305 return errmsg; 306 307 if (value > 0xffff) 308 return _("dsp:16 immediate is out of range"); 309 310 /* If this field may require a relocation then use larger dsp24. */ 311 if (cd->machs == MACH_M32C && ! have_zero && value == 0 312 && (strncmp (*strp, "[a", 2) == 0 313 || **strp == ',' 314 || **strp == 0)) 315 return _("dsp:16 immediate is out of range"); 316 317 *valuep = value; 318 return 0; 319 } 320 321 static const char * 322 parse_signed16 (CGEN_CPU_DESC cd, const char **strp, 323 int opindex, signed long *valuep) 324 { 325 const char *errmsg = 0; 326 signed long value; 327 328 if (strncasecmp (*strp, "%lo16(", 6) == 0) 329 { 330 enum cgen_parse_operand_result result_type; 331 bfd_vma value; 332 const char *errmsg; 333 334 *strp += 6; 335 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, 336 & result_type, & value); 337 if (**strp != ')') 338 return _("missing `)'"); 339 (*strp) ++; 340 341 if (errmsg == NULL 342 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 343 { 344 value &= 0xffff; 345 } 346 *valuep = value; 347 return errmsg; 348 } 349 350 if (strncasecmp (*strp, "%hi16(", 6) == 0) 351 { 352 enum cgen_parse_operand_result result_type; 353 bfd_vma value; 354 const char *errmsg; 355 356 *strp += 6; 357 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, 358 & result_type, & value); 359 if (**strp != ')') 360 return _("missing `)'"); 361 (*strp) ++; 362 363 if (errmsg == NULL 364 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 365 { 366 value >>= 16; 367 } 368 *valuep = value; 369 return errmsg; 370 } 371 372 PARSE_SIGNED; 373 374 if (value <= 65535 && value > 32767) 375 value -= 0x10000; 376 377 if (value < -32768 || value > 32767) 378 return _("dsp:16 immediate is out of range"); 379 380 *valuep = value; 381 return 0; 382 } 383 384 static const char * 385 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp, 386 int opindex, unsigned long *valuep) 387 { 388 const char *errmsg = 0; 389 unsigned long value; 390 391 /* Don't successfully parse literals beginning with '['. */ 392 if (**strp == '[') 393 return "Invalid literal"; /* Anything -- will not be seen. */ 394 395 /* Don't successfully parse register names. */ 396 if (m32c_cgen_isa_register (strp)) 397 return "Invalid literal"; /* Anything -- will not be seen. */ 398 399 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 400 if (errmsg) 401 return errmsg; 402 403 if (value > 0xfffff) 404 return _("dsp:20 immediate is out of range"); 405 406 *valuep = value; 407 return 0; 408 } 409 410 static const char * 411 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, 412 int opindex, unsigned long *valuep) 413 { 414 const char *errmsg = 0; 415 unsigned long value; 416 417 /* Don't successfully parse literals beginning with '['. */ 418 if (**strp == '[') 419 return "Invalid literal"; /* Anything -- will not be seen. */ 420 421 /* Don't successfully parse register names. */ 422 if (m32c_cgen_isa_register (strp)) 423 return "Invalid literal"; /* Anything -- will not be seen. */ 424 425 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 426 if (errmsg) 427 return errmsg; 428 429 if (value > 0xffffff) 430 return _("dsp:24 immediate is out of range"); 431 432 *valuep = value; 433 return 0; 434 } 435 436 /* This should only be used for #imm->reg. */ 437 static const char * 438 parse_signed24 (CGEN_CPU_DESC cd, const char **strp, 439 int opindex, signed long *valuep) 440 { 441 const char *errmsg = 0; 442 signed long value; 443 444 PARSE_SIGNED; 445 446 if (value <= 0xffffff && value > 0x7fffff) 447 value -= 0x1000000; 448 449 if (value > 0xffffff) 450 return _("dsp:24 immediate is out of range"); 451 452 *valuep = value; 453 return 0; 454 } 455 456 static const char * 457 parse_signed32 (CGEN_CPU_DESC cd, const char **strp, 458 int opindex, signed long *valuep) 459 { 460 const char *errmsg = 0; 461 signed long value; 462 463 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 464 if (errmsg) 465 return errmsg; 466 467 *valuep = value; 468 return 0; 469 } 470 471 static const char * 472 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp, 473 int opindex, signed long *valuep) 474 { 475 const char *errmsg = 0; 476 signed long value; 477 478 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 479 if (errmsg) 480 return errmsg; 481 482 if (value < 1 || value > 2) 483 return _("immediate is out of range 1-2"); 484 485 *valuep = value; 486 return 0; 487 } 488 489 static const char * 490 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp, 491 int opindex, signed long *valuep) 492 { 493 const char *errmsg = 0; 494 signed long value; 495 496 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 497 if (errmsg) 498 return errmsg; 499 500 if (value < 1 || value > 8) 501 return _("immediate is out of range 1-8"); 502 503 *valuep = value; 504 return 0; 505 } 506 507 static const char * 508 parse_bit3_S (CGEN_CPU_DESC cd, const char **strp, 509 int opindex, signed long *valuep) 510 { 511 const char *errmsg = 0; 512 signed long value; 513 514 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 515 if (errmsg) 516 return errmsg; 517 518 if (value < 0 || value > 7) 519 return _("immediate is out of range 0-7"); 520 521 *valuep = value; 522 return 0; 523 } 524 525 static const char * 526 parse_lab_5_3 (CGEN_CPU_DESC cd, 527 const char **strp, 528 int opindex ATTRIBUTE_UNUSED, 529 int opinfo, 530 enum cgen_parse_operand_result *type_addr, 531 bfd_vma *valuep) 532 { 533 const char *errmsg = 0; 534 bfd_vma value; 535 enum cgen_parse_operand_result op_res; 536 537 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, 538 opinfo, & op_res, & value); 539 540 if (type_addr) 541 *type_addr = op_res; 542 543 if (op_res == CGEN_PARSE_OPERAND_ADDRESS) 544 { 545 /* This is a hack; the field cannot handle near-zero signed 546 offsets that CGEN wants to put in to indicate an "empty" 547 operand at first. */ 548 *valuep = 2; 549 return 0; 550 } 551 if (errmsg) 552 return errmsg; 553 554 if (value < 2 || value > 9) 555 return _("immediate is out of range 2-9"); 556 557 *valuep = value; 558 return 0; 559 } 560 561 static const char * 562 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp, 563 int opindex, unsigned long *valuep) 564 { 565 const char *errmsg = 0; 566 unsigned long value; 567 568 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 569 if (errmsg) 570 return errmsg; 571 572 if (value > 15) 573 return _("Bit number for indexing general register is out of range 0-15"); 574 575 *valuep = value; 576 return 0; 577 } 578 579 static const char * 580 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, 581 int opindex, unsigned long *valuep, 582 unsigned bits, int allow_syms) 583 { 584 const char *errmsg = 0; 585 unsigned long bit; 586 unsigned long base; 587 const char *newp = *strp; 588 unsigned long long bitbase; 589 long have_zero = 0; 590 591 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 592 if (errmsg) 593 return errmsg; 594 595 if (*newp != ',') 596 return "Missing base for bit,base:8"; 597 598 ++newp; 599 600 if (strncmp (newp, "0x0", 3) == 0 601 || (newp[0] == '0' && newp[1] != 'x')) 602 have_zero = 1; 603 604 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base); 605 if (errmsg) 606 return errmsg; 607 608 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8); 609 610 if (bitbase >= (1ull << bits)) 611 return _("bit,base is out of range"); 612 613 /* If this field may require a relocation then use larger displacement. */ 614 if (! have_zero && base == 0) 615 { 616 switch (allow_syms) { 617 case 0: 618 return _("bit,base out of range for symbol"); 619 case 1: 620 break; 621 case 2: 622 if (strncmp (newp, "[sb]", 4) != 0) 623 return _("bit,base out of range for symbol"); 624 break; 625 } 626 } 627 628 *valuep = bitbase; 629 *strp = newp; 630 return 0; 631 } 632 633 static const char * 634 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, 635 int opindex, signed long *valuep, 636 unsigned bits, int allow_syms) 637 { 638 const char *errmsg = 0; 639 unsigned long bit; 640 signed long base; 641 const char *newp = *strp; 642 long long bitbase; 643 long long limit; 644 long have_zero = 0; 645 646 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 647 if (errmsg) 648 return errmsg; 649 650 if (*newp != ',') 651 return "Missing base for bit,base:8"; 652 653 ++newp; 654 655 if (strncmp (newp, "0x0", 3) == 0 656 || (newp[0] == '0' && newp[1] != 'x')) 657 have_zero = 1; 658 659 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base); 660 if (errmsg) 661 return errmsg; 662 663 bitbase = (long long)bit + ((long long)base * 8); 664 665 limit = 1ll << (bits - 1); 666 if (bitbase < -limit || bitbase >= limit) 667 return _("bit,base is out of range"); 668 669 /* If this field may require a relocation then use larger displacement. */ 670 if (! have_zero && base == 0 && ! allow_syms) 671 return _("bit,base out of range for symbol"); 672 673 *valuep = bitbase; 674 *strp = newp; 675 return 0; 676 } 677 678 static const char * 679 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 680 int opindex, unsigned long *valuep) 681 { 682 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0); 683 } 684 685 static const char * 686 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 687 int opindex, unsigned long *valuep) 688 { 689 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0); 690 } 691 692 static const char * 693 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp, 694 int opindex, unsigned long *valuep) 695 { 696 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1); 697 } 698 699 static const char * 700 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 701 int opindex, unsigned long *valuep) 702 { 703 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2); 704 } 705 706 static const char * 707 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp, 708 int opindex, unsigned long *valuep) 709 { 710 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1); 711 } 712 713 static const char * 714 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 715 int opindex, signed long *valuep) 716 { 717 return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1); 718 } 719 720 static const char * 721 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 722 int opindex, signed long *valuep) 723 { 724 return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0); 725 } 726 727 static const char * 728 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 729 int opindex, signed long *valuep) 730 { 731 return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1); 732 } 733 734 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */ 735 736 static const char * 737 parse_suffix (const char **strp, char suffix) 738 { 739 const char *newp = *strp; 740 741 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix) 742 newp = *strp + 2; 743 744 if (ISSPACE (*newp)) 745 { 746 *strp = newp; 747 return 0; 748 } 749 750 return "Invalid suffix"; /* Anything -- will not be seen. */ 751 } 752 753 static const char * 754 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 755 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 756 { 757 return parse_suffix (strp, 's'); 758 } 759 760 static const char * 761 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 762 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 763 { 764 return parse_suffix (strp, 'g'); 765 } 766 767 static const char * 768 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 769 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 770 { 771 return parse_suffix (strp, 'q'); 772 } 773 774 static const char * 775 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 776 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 777 { 778 return parse_suffix (strp, 'z'); 779 } 780 781 /* Parse an empty suffix. Fail if the next char is ':'. */ 782 783 static const char * 784 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 785 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 786 { 787 if (**strp == ':') 788 return "Unexpected suffix"; 789 return 0; 790 } 791 792 static const char * 793 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp, 794 int opindex ATTRIBUTE_UNUSED, signed long *valuep) 795 { 796 const char *errmsg; 797 signed long value; 798 signed long junk; 799 const char *newp = *strp; 800 801 /* Parse r0[hl]. */ 802 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value); 803 if (errmsg) 804 return errmsg; 805 806 if (*newp != ',') 807 return _("not a valid r0l/r0h pair"); 808 ++newp; 809 810 /* Parse the second register in the pair. */ 811 if (value == 0) /* r0l */ 812 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk); 813 else 814 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk); 815 if (errmsg) 816 return errmsg; 817 818 *strp = newp; 819 *valuep = ! value; 820 return 0; 821 } 822 823 /* Accept .b or .w in any case. */ 824 825 static const char * 826 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 827 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 828 { 829 if (**strp == '.' 830 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B' 831 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W')) 832 { 833 *strp += 2; 834 return NULL; 835 } 836 837 return _("Invalid size specifier"); 838 } 839 840 /* Special check to ensure that instruction exists for given machine. */ 841 842 int 843 m32c_cgen_insn_supported (CGEN_CPU_DESC cd, 844 const CGEN_INSN *insn) 845 { 846 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 847 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); 848 849 /* If attributes are absent, assume no restriction. */ 850 if (machs == 0) 851 machs = ~0; 852 853 return ((machs & cd->machs) 854 && cgen_bitset_intersect_p (& isas, cd->isas)); 855 } 856 857 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ 858 859 static const char * 860 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 861 const char **strp, 862 int opindex ATTRIBUTE_UNUSED, 863 unsigned long *valuep, 864 int push) 865 { 866 const char *errmsg = 0; 867 int regno = 0; 868 869 *valuep = 0; 870 while (**strp && **strp != ')') 871 { 872 if (**strp == 'r' || **strp == 'R') 873 { 874 ++*strp; 875 regno = **strp - '0'; 876 if (regno > 4) 877 errmsg = _("Register number is not valid"); 878 } 879 else if (**strp == 'a' || **strp == 'A') 880 { 881 ++*strp; 882 regno = **strp - '0'; 883 if (regno > 2) 884 errmsg = _("Register number is not valid"); 885 regno = **strp - '0' + 4; 886 } 887 888 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0) 889 { 890 regno = 6; 891 ++*strp; 892 } 893 894 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0) 895 { 896 regno = 7; 897 ++*strp; 898 } 899 900 if (push) /* Mask is reversed for push. */ 901 *valuep |= 0x80 >> regno; 902 else 903 *valuep |= 1 << regno; 904 905 ++*strp; 906 if (**strp == ',') 907 { 908 if (*(*strp + 1) == ')') 909 break; 910 ++*strp; 911 } 912 } 913 914 if (!*strp) 915 errmsg = _("Register list is not valid"); 916 917 return errmsg; 918 } 919 920 #define POP 0 921 #define PUSH 1 922 923 static const char * 924 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 925 const char **strp, 926 int opindex ATTRIBUTE_UNUSED, 927 unsigned long *valuep) 928 { 929 return parse_regset (cd, strp, opindex, valuep, POP); 930 } 931 932 static const char * 933 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 934 const char **strp, 935 int opindex ATTRIBUTE_UNUSED, 936 unsigned long *valuep) 937 { 938 return parse_regset (cd, strp, opindex, valuep, PUSH); 939 } 940 941 /* -- dis.c */ 942 943 const char * m32c_cgen_parse_operand 944 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); 945 946 /* Main entry point for operand parsing. 947 948 This function is basically just a big switch statement. Earlier versions 949 used tables to look up the function to use, but 950 - if the table contains both assembler and disassembler functions then 951 the disassembler contains much of the assembler and vice-versa, 952 - there's a lot of inlining possibilities as things grow, 953 - using a switch statement avoids the function call overhead. 954 955 This function could be moved into `parse_insn_normal', but keeping it 956 separate makes clear the interface between `parse_insn_normal' and each of 957 the handlers. */ 958 959 const char * 960 m32c_cgen_parse_operand (CGEN_CPU_DESC cd, 961 int opindex, 962 const char ** strp, 963 CGEN_FIELDS * fields) 964 { 965 const char * errmsg = NULL; 966 /* Used by scalar operands that still need to be parsed. */ 967 long junk ATTRIBUTE_UNUSED; 968 969 switch (opindex) 970 { 971 case M32C_OPERAND_A0 : 972 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk); 973 break; 974 case M32C_OPERAND_A1 : 975 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk); 976 break; 977 case M32C_OPERAND_AN16_PUSH_S : 978 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1); 979 break; 980 case M32C_OPERAND_BIT16AN : 981 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 982 break; 983 case M32C_OPERAND_BIT16RN : 984 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 985 break; 986 case M32C_OPERAND_BIT3_S : 987 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S)); 988 break; 989 case M32C_OPERAND_BIT32ANPREFIXED : 990 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 991 break; 992 case M32C_OPERAND_BIT32ANUNPREFIXED : 993 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 994 break; 995 case M32C_OPERAND_BIT32RNPREFIXED : 996 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 997 break; 998 case M32C_OPERAND_BIT32RNUNPREFIXED : 999 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1000 break; 1001 case M32C_OPERAND_BITBASE16_16_S8 : 1002 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8)); 1003 break; 1004 case M32C_OPERAND_BITBASE16_16_U16 : 1005 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1006 break; 1007 case M32C_OPERAND_BITBASE16_16_U8 : 1008 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1009 break; 1010 case M32C_OPERAND_BITBASE16_8_U11_S : 1011 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S)); 1012 break; 1013 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1014 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed)); 1015 break; 1016 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1017 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed)); 1018 break; 1019 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1020 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed)); 1021 break; 1022 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1023 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed)); 1024 break; 1025 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1026 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed)); 1027 break; 1028 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1029 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed)); 1030 break; 1031 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1032 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed)); 1033 break; 1034 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1035 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed)); 1036 break; 1037 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1038 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed)); 1039 break; 1040 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1041 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed)); 1042 break; 1043 case M32C_OPERAND_BITNO16R : 1044 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8)); 1045 break; 1046 case M32C_OPERAND_BITNO32PREFIXED : 1047 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed)); 1048 break; 1049 case M32C_OPERAND_BITNO32UNPREFIXED : 1050 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed)); 1051 break; 1052 case M32C_OPERAND_DSP_10_U6 : 1053 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6)); 1054 break; 1055 case M32C_OPERAND_DSP_16_S16 : 1056 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16)); 1057 break; 1058 case M32C_OPERAND_DSP_16_S8 : 1059 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8)); 1060 break; 1061 case M32C_OPERAND_DSP_16_U16 : 1062 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1063 break; 1064 case M32C_OPERAND_DSP_16_U20 : 1065 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24)); 1066 break; 1067 case M32C_OPERAND_DSP_16_U24 : 1068 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24)); 1069 break; 1070 case M32C_OPERAND_DSP_16_U8 : 1071 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1072 break; 1073 case M32C_OPERAND_DSP_24_S16 : 1074 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16)); 1075 break; 1076 case M32C_OPERAND_DSP_24_S8 : 1077 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8)); 1078 break; 1079 case M32C_OPERAND_DSP_24_U16 : 1080 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16)); 1081 break; 1082 case M32C_OPERAND_DSP_24_U20 : 1083 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24)); 1084 break; 1085 case M32C_OPERAND_DSP_24_U24 : 1086 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24)); 1087 break; 1088 case M32C_OPERAND_DSP_24_U8 : 1089 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8)); 1090 break; 1091 case M32C_OPERAND_DSP_32_S16 : 1092 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16)); 1093 break; 1094 case M32C_OPERAND_DSP_32_S8 : 1095 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8)); 1096 break; 1097 case M32C_OPERAND_DSP_32_U16 : 1098 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16)); 1099 break; 1100 case M32C_OPERAND_DSP_32_U20 : 1101 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24)); 1102 break; 1103 case M32C_OPERAND_DSP_32_U24 : 1104 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24)); 1105 break; 1106 case M32C_OPERAND_DSP_32_U8 : 1107 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8)); 1108 break; 1109 case M32C_OPERAND_DSP_40_S16 : 1110 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16)); 1111 break; 1112 case M32C_OPERAND_DSP_40_S8 : 1113 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8)); 1114 break; 1115 case M32C_OPERAND_DSP_40_U16 : 1116 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16)); 1117 break; 1118 case M32C_OPERAND_DSP_40_U20 : 1119 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20)); 1120 break; 1121 case M32C_OPERAND_DSP_40_U24 : 1122 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24)); 1123 break; 1124 case M32C_OPERAND_DSP_40_U8 : 1125 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8)); 1126 break; 1127 case M32C_OPERAND_DSP_48_S16 : 1128 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16)); 1129 break; 1130 case M32C_OPERAND_DSP_48_S8 : 1131 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8)); 1132 break; 1133 case M32C_OPERAND_DSP_48_U16 : 1134 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16)); 1135 break; 1136 case M32C_OPERAND_DSP_48_U20 : 1137 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20)); 1138 break; 1139 case M32C_OPERAND_DSP_48_U24 : 1140 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24)); 1141 break; 1142 case M32C_OPERAND_DSP_48_U8 : 1143 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); 1144 break; 1145 case M32C_OPERAND_DSP_8_S24 : 1146 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); 1147 break; 1148 case M32C_OPERAND_DSP_8_S8 : 1149 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); 1150 break; 1151 case M32C_OPERAND_DSP_8_U16 : 1152 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16)); 1153 break; 1154 case M32C_OPERAND_DSP_8_U24 : 1155 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24)); 1156 break; 1157 case M32C_OPERAND_DSP_8_U6 : 1158 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6)); 1159 break; 1160 case M32C_OPERAND_DSP_8_U8 : 1161 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8)); 1162 break; 1163 case M32C_OPERAND_DST16AN : 1164 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 1165 break; 1166 case M32C_OPERAND_DST16AN_S : 1167 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s); 1168 break; 1169 case M32C_OPERAND_DST16ANHI : 1170 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an); 1171 break; 1172 case M32C_OPERAND_DST16ANQI : 1173 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an); 1174 break; 1175 case M32C_OPERAND_DST16ANQI_S : 1176 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s); 1177 break; 1178 case M32C_OPERAND_DST16ANSI : 1179 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an); 1180 break; 1181 case M32C_OPERAND_DST16RNEXTQI : 1182 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext); 1183 break; 1184 case M32C_OPERAND_DST16RNHI : 1185 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 1186 break; 1187 case M32C_OPERAND_DST16RNQI : 1188 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn); 1189 break; 1190 case M32C_OPERAND_DST16RNQI_S : 1191 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s); 1192 break; 1193 case M32C_OPERAND_DST16RNSI : 1194 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn); 1195 break; 1196 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1197 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1198 break; 1199 case M32C_OPERAND_DST32ANPREFIXED : 1200 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1201 break; 1202 case M32C_OPERAND_DST32ANPREFIXEDHI : 1203 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed); 1204 break; 1205 case M32C_OPERAND_DST32ANPREFIXEDQI : 1206 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed); 1207 break; 1208 case M32C_OPERAND_DST32ANPREFIXEDSI : 1209 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1210 break; 1211 case M32C_OPERAND_DST32ANUNPREFIXED : 1212 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1213 break; 1214 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1215 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed); 1216 break; 1217 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1218 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed); 1219 break; 1220 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1221 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1222 break; 1223 case M32C_OPERAND_DST32R0HI_S : 1224 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1225 break; 1226 case M32C_OPERAND_DST32R0QI_S : 1227 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1228 break; 1229 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1230 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed); 1231 break; 1232 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1233 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed); 1234 break; 1235 case M32C_OPERAND_DST32RNPREFIXEDHI : 1236 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI); 1237 break; 1238 case M32C_OPERAND_DST32RNPREFIXEDQI : 1239 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 1240 break; 1241 case M32C_OPERAND_DST32RNPREFIXEDSI : 1242 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI); 1243 break; 1244 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1245 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI); 1246 break; 1247 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1248 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1249 break; 1250 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1251 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI); 1252 break; 1253 case M32C_OPERAND_G : 1254 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk)); 1255 break; 1256 case M32C_OPERAND_IMM_12_S4 : 1257 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); 1258 break; 1259 case M32C_OPERAND_IMM_12_S4N : 1260 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); 1261 break; 1262 case M32C_OPERAND_IMM_13_U3 : 1263 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); 1264 break; 1265 case M32C_OPERAND_IMM_16_HI : 1266 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16)); 1267 break; 1268 case M32C_OPERAND_IMM_16_QI : 1269 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8)); 1270 break; 1271 case M32C_OPERAND_IMM_16_SI : 1272 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32)); 1273 break; 1274 case M32C_OPERAND_IMM_20_S4 : 1275 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4)); 1276 break; 1277 case M32C_OPERAND_IMM_24_HI : 1278 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16)); 1279 break; 1280 case M32C_OPERAND_IMM_24_QI : 1281 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8)); 1282 break; 1283 case M32C_OPERAND_IMM_24_SI : 1284 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32)); 1285 break; 1286 case M32C_OPERAND_IMM_32_HI : 1287 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16)); 1288 break; 1289 case M32C_OPERAND_IMM_32_QI : 1290 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8)); 1291 break; 1292 case M32C_OPERAND_IMM_32_SI : 1293 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32)); 1294 break; 1295 case M32C_OPERAND_IMM_40_HI : 1296 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16)); 1297 break; 1298 case M32C_OPERAND_IMM_40_QI : 1299 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8)); 1300 break; 1301 case M32C_OPERAND_IMM_40_SI : 1302 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32)); 1303 break; 1304 case M32C_OPERAND_IMM_48_HI : 1305 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16)); 1306 break; 1307 case M32C_OPERAND_IMM_48_QI : 1308 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8)); 1309 break; 1310 case M32C_OPERAND_IMM_48_SI : 1311 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32)); 1312 break; 1313 case M32C_OPERAND_IMM_56_HI : 1314 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16)); 1315 break; 1316 case M32C_OPERAND_IMM_56_QI : 1317 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8)); 1318 break; 1319 case M32C_OPERAND_IMM_64_HI : 1320 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16)); 1321 break; 1322 case M32C_OPERAND_IMM_8_HI : 1323 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16)); 1324 break; 1325 case M32C_OPERAND_IMM_8_QI : 1326 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8)); 1327 break; 1328 case M32C_OPERAND_IMM_8_S4 : 1329 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); 1330 break; 1331 case M32C_OPERAND_IMM_8_S4N : 1332 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); 1333 break; 1334 case M32C_OPERAND_IMM_SH_12_S4 : 1335 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); 1336 break; 1337 case M32C_OPERAND_IMM_SH_20_S4 : 1338 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4); 1339 break; 1340 case M32C_OPERAND_IMM_SH_8_S4 : 1341 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4); 1342 break; 1343 case M32C_OPERAND_IMM1_S : 1344 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S)); 1345 break; 1346 case M32C_OPERAND_IMM3_S : 1347 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S)); 1348 break; 1349 case M32C_OPERAND_LAB_16_8 : 1350 { 1351 bfd_vma value = 0; 1352 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value); 1353 fields->f_lab_16_8 = value; 1354 } 1355 break; 1356 case M32C_OPERAND_LAB_24_8 : 1357 { 1358 bfd_vma value = 0; 1359 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value); 1360 fields->f_lab_24_8 = value; 1361 } 1362 break; 1363 case M32C_OPERAND_LAB_32_8 : 1364 { 1365 bfd_vma value = 0; 1366 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value); 1367 fields->f_lab_32_8 = value; 1368 } 1369 break; 1370 case M32C_OPERAND_LAB_40_8 : 1371 { 1372 bfd_vma value = 0; 1373 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value); 1374 fields->f_lab_40_8 = value; 1375 } 1376 break; 1377 case M32C_OPERAND_LAB_5_3 : 1378 { 1379 bfd_vma value = 0; 1380 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value); 1381 fields->f_lab_5_3 = value; 1382 } 1383 break; 1384 case M32C_OPERAND_LAB_8_16 : 1385 { 1386 bfd_vma value = 0; 1387 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value); 1388 fields->f_lab_8_16 = value; 1389 } 1390 break; 1391 case M32C_OPERAND_LAB_8_24 : 1392 { 1393 bfd_vma value = 0; 1394 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value); 1395 fields->f_lab_8_24 = value; 1396 } 1397 break; 1398 case M32C_OPERAND_LAB_8_8 : 1399 { 1400 bfd_vma value = 0; 1401 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value); 1402 fields->f_lab_8_8 = value; 1403 } 1404 break; 1405 case M32C_OPERAND_LAB32_JMP_S : 1406 { 1407 bfd_vma value = 0; 1408 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value); 1409 fields->f_lab32_jmp_s = value; 1410 } 1411 break; 1412 case M32C_OPERAND_Q : 1413 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk)); 1414 break; 1415 case M32C_OPERAND_R0 : 1416 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1417 break; 1418 case M32C_OPERAND_R0H : 1419 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk); 1420 break; 1421 case M32C_OPERAND_R0L : 1422 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1423 break; 1424 case M32C_OPERAND_R1 : 1425 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk); 1426 break; 1427 case M32C_OPERAND_R1R2R0 : 1428 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk); 1429 break; 1430 case M32C_OPERAND_R2 : 1431 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk); 1432 break; 1433 case M32C_OPERAND_R2R0 : 1434 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk); 1435 break; 1436 case M32C_OPERAND_R3 : 1437 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk); 1438 break; 1439 case M32C_OPERAND_R3R1 : 1440 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk); 1441 break; 1442 case M32C_OPERAND_REGSETPOP : 1443 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8)); 1444 break; 1445 case M32C_OPERAND_REGSETPUSH : 1446 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8)); 1447 break; 1448 case M32C_OPERAND_RN16_PUSH_S : 1449 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1); 1450 break; 1451 case M32C_OPERAND_S : 1452 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk)); 1453 break; 1454 case M32C_OPERAND_SRC16AN : 1455 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an); 1456 break; 1457 case M32C_OPERAND_SRC16ANHI : 1458 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an); 1459 break; 1460 case M32C_OPERAND_SRC16ANQI : 1461 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an); 1462 break; 1463 case M32C_OPERAND_SRC16RNHI : 1464 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn); 1465 break; 1466 case M32C_OPERAND_SRC16RNQI : 1467 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn); 1468 break; 1469 case M32C_OPERAND_SRC32ANPREFIXED : 1470 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1471 break; 1472 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1473 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed); 1474 break; 1475 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1476 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed); 1477 break; 1478 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1479 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1480 break; 1481 case M32C_OPERAND_SRC32ANUNPREFIXED : 1482 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1483 break; 1484 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1485 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed); 1486 break; 1487 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1488 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed); 1489 break; 1490 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1491 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1492 break; 1493 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1494 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI); 1495 break; 1496 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1497 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI); 1498 break; 1499 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1500 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI); 1501 break; 1502 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1503 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI); 1504 break; 1505 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1506 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI); 1507 break; 1508 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1509 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI); 1510 break; 1511 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1512 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1)); 1513 break; 1514 case M32C_OPERAND_X : 1515 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk)); 1516 break; 1517 case M32C_OPERAND_Z : 1518 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk)); 1519 break; 1520 case M32C_OPERAND_COND16_16 : 1521 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8); 1522 break; 1523 case M32C_OPERAND_COND16_24 : 1524 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8); 1525 break; 1526 case M32C_OPERAND_COND16_32 : 1527 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8); 1528 break; 1529 case M32C_OPERAND_COND16C : 1530 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16); 1531 break; 1532 case M32C_OPERAND_COND16J : 1533 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16); 1534 break; 1535 case M32C_OPERAND_COND16J5 : 1536 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5); 1537 break; 1538 case M32C_OPERAND_COND32 : 1539 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32); 1540 break; 1541 case M32C_OPERAND_COND32_16 : 1542 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8); 1543 break; 1544 case M32C_OPERAND_COND32_24 : 1545 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8); 1546 break; 1547 case M32C_OPERAND_COND32_32 : 1548 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8); 1549 break; 1550 case M32C_OPERAND_COND32_40 : 1551 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8); 1552 break; 1553 case M32C_OPERAND_COND32J : 1554 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j); 1555 break; 1556 case M32C_OPERAND_CR1_PREFIXED_32 : 1557 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3); 1558 break; 1559 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1560 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3); 1561 break; 1562 case M32C_OPERAND_CR16 : 1563 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3); 1564 break; 1565 case M32C_OPERAND_CR2_32 : 1566 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3); 1567 break; 1568 case M32C_OPERAND_CR3_PREFIXED_32 : 1569 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3); 1570 break; 1571 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1572 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3); 1573 break; 1574 case M32C_OPERAND_FLAGS16 : 1575 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3); 1576 break; 1577 case M32C_OPERAND_FLAGS32 : 1578 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3); 1579 break; 1580 case M32C_OPERAND_SCCOND32 : 1581 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16); 1582 break; 1583 case M32C_OPERAND_SIZE : 1584 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk)); 1585 break; 1586 1587 default : 1588 /* xgettext:c-format */ 1589 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); 1590 abort (); 1591 } 1592 1593 return errmsg; 1594 } 1595 1596 cgen_parse_fn * const m32c_cgen_parse_handlers[] = 1597 { 1598 parse_insn_normal, 1599 }; 1600 1601 void 1602 m32c_cgen_init_asm (CGEN_CPU_DESC cd) 1603 { 1604 m32c_cgen_init_opcode_table (cd); 1605 m32c_cgen_init_ibld_table (cd); 1606 cd->parse_handlers = & m32c_cgen_parse_handlers[0]; 1607 cd->parse_operand = m32c_cgen_parse_operand; 1608 #ifdef CGEN_ASM_INIT_HOOK 1609 CGEN_ASM_INIT_HOOK 1610 #endif 1611 } 1612 1613 1614 1615 /* Regex construction routine. 1616 1617 This translates an opcode syntax string into a regex string, 1618 by replacing any non-character syntax element (such as an 1619 opcode) with the pattern '.*' 1620 1621 It then compiles the regex and stores it in the opcode, for 1622 later use by m32c_cgen_assemble_insn 1623 1624 Returns NULL for success, an error message for failure. */ 1625 1626 char * 1627 m32c_cgen_build_insn_regex (CGEN_INSN *insn) 1628 { 1629 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 1630 const char *mnem = CGEN_INSN_MNEMONIC (insn); 1631 char rxbuf[CGEN_MAX_RX_ELEMENTS]; 1632 char *rx = rxbuf; 1633 const CGEN_SYNTAX_CHAR_TYPE *syn; 1634 int reg_err; 1635 1636 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 1637 1638 /* Mnemonics come first in the syntax string. */ 1639 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1640 return _("missing mnemonic in syntax string"); 1641 ++syn; 1642 1643 /* Generate a case sensitive regular expression that emulates case 1644 insensitive matching in the "C" locale. We cannot generate a case 1645 insensitive regular expression because in Turkish locales, 'i' and 'I' 1646 are not equal modulo case conversion. */ 1647 1648 /* Copy the literal mnemonic out of the insn. */ 1649 for (; *mnem; mnem++) 1650 { 1651 char c = *mnem; 1652 1653 if (ISALPHA (c)) 1654 { 1655 *rx++ = '['; 1656 *rx++ = TOLOWER (c); 1657 *rx++ = TOUPPER (c); 1658 *rx++ = ']'; 1659 } 1660 else 1661 *rx++ = c; 1662 } 1663 1664 /* Copy any remaining literals from the syntax string into the rx. */ 1665 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) 1666 { 1667 if (CGEN_SYNTAX_CHAR_P (* syn)) 1668 { 1669 char c = CGEN_SYNTAX_CHAR (* syn); 1670 1671 switch (c) 1672 { 1673 /* Escape any regex metacharacters in the syntax. */ 1674 case '.': case '[': case '\\': 1675 case '*': case '^': case '$': 1676 1677 #ifdef CGEN_ESCAPE_EXTENDED_REGEX 1678 case '?': case '{': case '}': 1679 case '(': case ')': case '*': 1680 case '|': case '+': case ']': 1681 #endif 1682 *rx++ = '\\'; 1683 *rx++ = c; 1684 break; 1685 1686 default: 1687 if (ISALPHA (c)) 1688 { 1689 *rx++ = '['; 1690 *rx++ = TOLOWER (c); 1691 *rx++ = TOUPPER (c); 1692 *rx++ = ']'; 1693 } 1694 else 1695 *rx++ = c; 1696 break; 1697 } 1698 } 1699 else 1700 { 1701 /* Replace non-syntax fields with globs. */ 1702 *rx++ = '.'; 1703 *rx++ = '*'; 1704 } 1705 } 1706 1707 /* Trailing whitespace ok. */ 1708 * rx++ = '['; 1709 * rx++ = ' '; 1710 * rx++ = '\t'; 1711 * rx++ = ']'; 1712 * rx++ = '*'; 1713 1714 /* But anchor it after that. */ 1715 * rx++ = '$'; 1716 * rx = '\0'; 1717 1718 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); 1719 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); 1720 1721 if (reg_err == 0) 1722 return NULL; 1723 else 1724 { 1725 static char msg[80]; 1726 1727 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); 1728 regfree ((regex_t *) CGEN_INSN_RX (insn)); 1729 free (CGEN_INSN_RX (insn)); 1730 (CGEN_INSN_RX (insn)) = NULL; 1731 return msg; 1732 } 1733 } 1734 1735 1736 /* Default insn parser. 1737 1738 The syntax string is scanned and operands are parsed and stored in FIELDS. 1739 Relocs are queued as we go via other callbacks. 1740 1741 ??? Note that this is currently an all-or-nothing parser. If we fail to 1742 parse the instruction, we return 0 and the caller will start over from 1743 the beginning. Backtracking will be necessary in parsing subexpressions, 1744 but that can be handled there. Not handling backtracking here may get 1745 expensive in the case of the m68k. Deal with later. 1746 1747 Returns NULL for success, an error message for failure. */ 1748 1749 static const char * 1750 parse_insn_normal (CGEN_CPU_DESC cd, 1751 const CGEN_INSN *insn, 1752 const char **strp, 1753 CGEN_FIELDS *fields) 1754 { 1755 /* ??? Runtime added insns not handled yet. */ 1756 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 1757 const char *str = *strp; 1758 const char *errmsg; 1759 const char *p; 1760 const CGEN_SYNTAX_CHAR_TYPE * syn; 1761 #ifdef CGEN_MNEMONIC_OPERANDS 1762 /* FIXME: wip */ 1763 int past_opcode_p; 1764 #endif 1765 1766 /* For now we assume the mnemonic is first (there are no leading operands). 1767 We can parse it without needing to set up operand parsing. 1768 GAS's input scrubber will ensure mnemonics are lowercase, but we may 1769 not be called from GAS. */ 1770 p = CGEN_INSN_MNEMONIC (insn); 1771 while (*p && TOLOWER (*p) == TOLOWER (*str)) 1772 ++p, ++str; 1773 1774 if (* p) 1775 return _("unrecognized instruction"); 1776 1777 #ifndef CGEN_MNEMONIC_OPERANDS 1778 if (* str && ! ISSPACE (* str)) 1779 return _("unrecognized instruction"); 1780 #endif 1781 1782 CGEN_INIT_PARSE (cd); 1783 cgen_init_parse_operand (cd); 1784 #ifdef CGEN_MNEMONIC_OPERANDS 1785 past_opcode_p = 0; 1786 #endif 1787 1788 /* We don't check for (*str != '\0') here because we want to parse 1789 any trailing fake arguments in the syntax string. */ 1790 syn = CGEN_SYNTAX_STRING (syntax); 1791 1792 /* Mnemonics come first for now, ensure valid string. */ 1793 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1794 abort (); 1795 1796 ++syn; 1797 1798 while (* syn != 0) 1799 { 1800 /* Non operand chars must match exactly. */ 1801 if (CGEN_SYNTAX_CHAR_P (* syn)) 1802 { 1803 /* FIXME: While we allow for non-GAS callers above, we assume the 1804 first char after the mnemonic part is a space. */ 1805 /* FIXME: We also take inappropriate advantage of the fact that 1806 GAS's input scrubber will remove extraneous blanks. */ 1807 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) 1808 { 1809 #ifdef CGEN_MNEMONIC_OPERANDS 1810 if (CGEN_SYNTAX_CHAR(* syn) == ' ') 1811 past_opcode_p = 1; 1812 #endif 1813 ++ syn; 1814 ++ str; 1815 } 1816 else if (*str) 1817 { 1818 /* Syntax char didn't match. Can't be this insn. */ 1819 static char msg [80]; 1820 1821 /* xgettext:c-format */ 1822 sprintf (msg, _("syntax error (expected char `%c', found `%c')"), 1823 CGEN_SYNTAX_CHAR(*syn), *str); 1824 return msg; 1825 } 1826 else 1827 { 1828 /* Ran out of input. */ 1829 static char msg [80]; 1830 1831 /* xgettext:c-format */ 1832 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), 1833 CGEN_SYNTAX_CHAR(*syn)); 1834 return msg; 1835 } 1836 continue; 1837 } 1838 1839 /* We have an operand of some sort. */ 1840 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), 1841 &str, fields); 1842 if (errmsg) 1843 return errmsg; 1844 1845 /* Done with this operand, continue with next one. */ 1846 ++ syn; 1847 } 1848 1849 /* If we're at the end of the syntax string, we're done. */ 1850 if (* syn == 0) 1851 { 1852 /* FIXME: For the moment we assume a valid `str' can only contain 1853 blanks now. IE: We needn't try again with a longer version of 1854 the insn and it is assumed that longer versions of insns appear 1855 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1856 while (ISSPACE (* str)) 1857 ++ str; 1858 1859 if (* str != '\0') 1860 return _("junk at end of line"); /* FIXME: would like to include `str' */ 1861 1862 return NULL; 1863 } 1864 1865 /* We couldn't parse it. */ 1866 return _("unrecognized instruction"); 1867 } 1868 1869 /* Main entry point. 1870 This routine is called for each instruction to be assembled. 1871 STR points to the insn to be assembled. 1872 We assume all necessary tables have been initialized. 1873 The assembled instruction, less any fixups, is stored in BUF. 1874 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value 1875 still needs to be converted to target byte order, otherwise BUF is an array 1876 of bytes in target byte order. 1877 The result is a pointer to the insn's entry in the opcode table, 1878 or NULL if an error occured (an error message will have already been 1879 printed). 1880 1881 Note that when processing (non-alias) macro-insns, 1882 this function recurses. 1883 1884 ??? It's possible to make this cpu-independent. 1885 One would have to deal with a few minor things. 1886 At this point in time doing so would be more of a curiosity than useful 1887 [for example this file isn't _that_ big], but keeping the possibility in 1888 mind helps keep the design clean. */ 1889 1890 const CGEN_INSN * 1891 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd, 1892 const char *str, 1893 CGEN_FIELDS *fields, 1894 CGEN_INSN_BYTES_PTR buf, 1895 char **errmsg) 1896 { 1897 const char *start; 1898 CGEN_INSN_LIST *ilist; 1899 const char *parse_errmsg = NULL; 1900 const char *insert_errmsg = NULL; 1901 int recognized_mnemonic = 0; 1902 1903 /* Skip leading white space. */ 1904 while (ISSPACE (* str)) 1905 ++ str; 1906 1907 /* The instructions are stored in hashed lists. 1908 Get the first in the list. */ 1909 ilist = CGEN_ASM_LOOKUP_INSN (cd, str); 1910 1911 /* Keep looking until we find a match. */ 1912 start = str; 1913 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) 1914 { 1915 const CGEN_INSN *insn = ilist->insn; 1916 recognized_mnemonic = 1; 1917 1918 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 1919 /* Not usually needed as unsupported opcodes 1920 shouldn't be in the hash lists. */ 1921 /* Is this insn supported by the selected cpu? */ 1922 if (! m32c_cgen_insn_supported (cd, insn)) 1923 continue; 1924 #endif 1925 /* If the RELAXED attribute is set, this is an insn that shouldn't be 1926 chosen immediately. Instead, it is used during assembler/linker 1927 relaxation if possible. */ 1928 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) 1929 continue; 1930 1931 str = start; 1932 1933 /* Skip this insn if str doesn't look right lexically. */ 1934 if (CGEN_INSN_RX (insn) != NULL && 1935 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) 1936 continue; 1937 1938 /* Allow parse/insert handlers to obtain length of insn. */ 1939 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 1940 1941 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); 1942 if (parse_errmsg != NULL) 1943 continue; 1944 1945 /* ??? 0 is passed for `pc'. */ 1946 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, 1947 (bfd_vma) 0); 1948 if (insert_errmsg != NULL) 1949 continue; 1950 1951 /* It is up to the caller to actually output the insn and any 1952 queued relocs. */ 1953 return insn; 1954 } 1955 1956 { 1957 static char errbuf[150]; 1958 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS 1959 const char *tmp_errmsg; 1960 1961 /* If requesting verbose error messages, use insert_errmsg. 1962 Failing that, use parse_errmsg. */ 1963 tmp_errmsg = (insert_errmsg ? insert_errmsg : 1964 parse_errmsg ? parse_errmsg : 1965 recognized_mnemonic ? 1966 _("unrecognized form of instruction") : 1967 _("unrecognized instruction")); 1968 1969 if (strlen (start) > 50) 1970 /* xgettext:c-format */ 1971 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); 1972 else 1973 /* xgettext:c-format */ 1974 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); 1975 #else 1976 if (strlen (start) > 50) 1977 /* xgettext:c-format */ 1978 sprintf (errbuf, _("bad instruction `%.50s...'"), start); 1979 else 1980 /* xgettext:c-format */ 1981 sprintf (errbuf, _("bad instruction `%.50s'"), start); 1982 #endif 1983 1984 *errmsg = errbuf; 1985 return NULL; 1986 } 1987 } 1988