163d1a8abSmrg;; GCC machine description for Blackfin synchronization instructions.
2*ec02198aSmrg;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
363d1a8abSmrg;; Contributed by Analog Devices.
463d1a8abSmrg;;
563d1a8abSmrg;; This file is part of GCC.
663d1a8abSmrg;;
763d1a8abSmrg;; GCC is free software; you can redistribute it and/or modify
863d1a8abSmrg;; it under the terms of the GNU General Public License as published by
963d1a8abSmrg;; the Free Software Foundation; either version 3, or (at your option)
1063d1a8abSmrg;; any later version.
1163d1a8abSmrg;;
1263d1a8abSmrg;; GCC is distributed in the hope that it will be useful,
1363d1a8abSmrg;; but WITHOUT ANY WARRANTY; without even the implied warranty of
1463d1a8abSmrg;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1563d1a8abSmrg;; GNU General Public License for more details.
1663d1a8abSmrg;;
1763d1a8abSmrg;; You should have received a copy of the GNU General Public License
1863d1a8abSmrg;; along with GCC; see the file COPYING3.  If not see
1963d1a8abSmrg;; <http://www.gnu.org/licenses/>.
2063d1a8abSmrg
2163d1a8abSmrg(define_code_iterator FETCHOP [plus minus ior and xor])
2263d1a8abSmrg(define_code_attr fetchop_name
2363d1a8abSmrg  [(plus "add") (minus "sub") (ior "ior") (and "and") (xor "xor")])
2463d1a8abSmrg(define_code_attr fetchop_addr
2563d1a8abSmrg  [(plus "1072") (minus "1088") (ior "1104") (and "1120") (xor "1136")])
2663d1a8abSmrg
2763d1a8abSmrg(define_insn "sync_<fetchop_name>si_internal"
2863d1a8abSmrg  [(set (mem:SI (match_operand:SI 0 "register_operand" "qA"))
2963d1a8abSmrg	(unspec:SI
3063d1a8abSmrg	  [(FETCHOP:SI (mem:SI (match_dup 0))
3163d1a8abSmrg	     (match_operand:SI 1 "register_operand" "q0"))
3263d1a8abSmrg	   (match_operand:SI 2 "register_no_elim_operand" "a")]
3363d1a8abSmrg	  UNSPEC_ATOMIC))
3463d1a8abSmrg   (clobber (match_scratch:SI 3 "=q0"))
3563d1a8abSmrg   (clobber (match_scratch:SI 4 "=q1"))
3663d1a8abSmrg   (clobber (reg:SI REG_RETS))]
3763d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
3863d1a8abSmrg  "call (%2);"
3963d1a8abSmrg  [(set_attr "type" "call")])
4063d1a8abSmrg
4163d1a8abSmrg(define_expand "sync_<fetchop_name>si"
4263d1a8abSmrg  [(parallel
4363d1a8abSmrg    [(set (match_operand:SI 0 "memory_operand" "+m")
4463d1a8abSmrg	  (unspec:SI
4563d1a8abSmrg	   [(FETCHOP:SI (match_dup 0)
4663d1a8abSmrg			(match_operand:SI 1 "register_operand" "q0"))
4763d1a8abSmrg	    (match_dup 2)]
4863d1a8abSmrg	   UNSPEC_ATOMIC))
4963d1a8abSmrg     (clobber (match_scratch:SI 3 ""))
5063d1a8abSmrg     (clobber (match_scratch:SI 4 ""))
5163d1a8abSmrg     (clobber (reg:SI REG_RETS))])]
5263d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
5363d1a8abSmrg{
5463d1a8abSmrg  if (!REG_P (XEXP (operands[0], 0)))
5563d1a8abSmrg    {
5663d1a8abSmrg      operands[0] = shallow_copy_rtx (operands[0]);
5763d1a8abSmrg      XEXP (operands[0], 0) = force_reg (Pmode, XEXP (operands[0], 0));
5863d1a8abSmrg    }
5963d1a8abSmrg  operands[2] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
6063d1a8abSmrg})
6163d1a8abSmrg
6263d1a8abSmrg(define_insn "sync_old_<fetchop_name>si_internal"
6363d1a8abSmrg  [(set (match_operand:SI 0 "register_operand" "=q1")
6463d1a8abSmrg	(mem:SI (match_operand:SI 1 "register_operand" "qA")))
6563d1a8abSmrg   (set (mem:SI (match_dup 1))
6663d1a8abSmrg	(unspec:SI
6763d1a8abSmrg	  [(FETCHOP:SI (mem:SI (match_dup 1))
6863d1a8abSmrg	     (match_operand:SI 2 "register_operand" "q0"))
6963d1a8abSmrg	   (match_operand:SI 3 "register_no_elim_operand" "a")]
7063d1a8abSmrg	  UNSPEC_ATOMIC))
7163d1a8abSmrg   (clobber (match_scratch:SI 4 "=q0"))
7263d1a8abSmrg   (clobber (reg:SI REG_RETS))]
7363d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
7463d1a8abSmrg  "call (%3);"
7563d1a8abSmrg  [(set_attr "type" "call")])
7663d1a8abSmrg
7763d1a8abSmrg(define_expand "sync_old_<fetchop_name>si"
7863d1a8abSmrg  [(parallel
7963d1a8abSmrg    [(set (match_operand:SI 0 "register_operand" "")
8063d1a8abSmrg	  (match_operand:SI 1 "memory_operand" ""))
8163d1a8abSmrg     (set (match_dup 1)
8263d1a8abSmrg	  (unspec:SI
8363d1a8abSmrg	   [(FETCHOP:SI (match_dup 1)
8463d1a8abSmrg			(match_operand:SI 2 "register_operand" ""))
8563d1a8abSmrg	    (match_dup 3)]
8663d1a8abSmrg	   UNSPEC_ATOMIC))
8763d1a8abSmrg     (clobber (match_scratch:SI 4 ""))
8863d1a8abSmrg     (clobber (reg:SI REG_RETS))])]
8963d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
9063d1a8abSmrg{
9163d1a8abSmrg  if (!REG_P (XEXP (operands[1], 0)))
9263d1a8abSmrg    {
9363d1a8abSmrg      operands[1] = shallow_copy_rtx (operands[1]);
9463d1a8abSmrg      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
9563d1a8abSmrg    }
9663d1a8abSmrg  operands[3] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
9763d1a8abSmrg})
9863d1a8abSmrg
9963d1a8abSmrg(define_insn "sync_new_<fetchop_name>si_internal"
10063d1a8abSmrg  [(set (match_operand:SI 0 "register_operand" "=q0")
10163d1a8abSmrg	(unspec:SI
10263d1a8abSmrg	  [(FETCHOP:SI
10363d1a8abSmrg	    (mem:SI (match_operand:SI 1 "register_operand" "qA"))
10463d1a8abSmrg	    (match_operand:SI 2 "register_operand" "q0"))
10563d1a8abSmrg	   (match_operand:SI 3 "register_no_elim_operand" "a")]
10663d1a8abSmrg	  UNSPEC_ATOMIC))
10763d1a8abSmrg   (set (mem:SI (match_dup 1))
10863d1a8abSmrg	(unspec:SI
10963d1a8abSmrg	  [(FETCHOP:SI (mem:SI (match_dup 1)) (match_dup 2))
11063d1a8abSmrg	   (match_dup 3)]
11163d1a8abSmrg	  UNSPEC_ATOMIC))
11263d1a8abSmrg   (clobber (match_scratch:SI 4 "=q1"))
11363d1a8abSmrg   (clobber (reg:SI REG_RETS))]
11463d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
11563d1a8abSmrg  "call (%3);"
11663d1a8abSmrg  [(set_attr "type" "call")])
11763d1a8abSmrg
11863d1a8abSmrg(define_expand "sync_new_<fetchop_name>si"
11963d1a8abSmrg  [(parallel
12063d1a8abSmrg    [(set (match_operand:SI 0 "register_operand" "")
12163d1a8abSmrg	  (unspec:SI
12263d1a8abSmrg	   [(FETCHOP:SI (match_operand:SI 1 "memory_operand" "")
12363d1a8abSmrg			(match_operand:SI 2 "register_operand" ""))
12463d1a8abSmrg	    (match_dup 3)]
12563d1a8abSmrg	   UNSPEC_ATOMIC))
12663d1a8abSmrg     (set (match_dup 1)
12763d1a8abSmrg	  (unspec:SI
12863d1a8abSmrg	   [(FETCHOP:SI (match_dup 1) (match_dup 2))
12963d1a8abSmrg	    (match_dup 3)]
13063d1a8abSmrg	   UNSPEC_ATOMIC))
13163d1a8abSmrg     (clobber (match_scratch:SI 4 ""))
13263d1a8abSmrg     (clobber (reg:SI REG_RETS))])]
13363d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
13463d1a8abSmrg{
13563d1a8abSmrg  if (!REG_P (XEXP (operands[1], 0)))
13663d1a8abSmrg    {
13763d1a8abSmrg      operands[1] = shallow_copy_rtx (operands[1]);
13863d1a8abSmrg      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
13963d1a8abSmrg    }
14063d1a8abSmrg  operands[3] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
14163d1a8abSmrg})
14263d1a8abSmrg
14363d1a8abSmrg(define_insn "sync_compare_and_swapsi_internal"
14463d1a8abSmrg  [(set (match_operand:SI 0 "register_operand" "=q0")
14563d1a8abSmrg	(mem:SI (match_operand:SI 1 "register_operand" "qA")))
14663d1a8abSmrg   (set (mem:SI (match_dup 1))
14763d1a8abSmrg	(unspec:SI
14863d1a8abSmrg	  [(mem:SI (match_dup 1))
14963d1a8abSmrg	   (match_operand:SI 2 "register_operand" "q1")
15063d1a8abSmrg	   (match_operand:SI 3 "register_operand" "q2")
15163d1a8abSmrg	   (match_operand:SI 4 "register_no_elim_operand" "a")]
15263d1a8abSmrg	  UNSPEC_ATOMIC))
15363d1a8abSmrg   (clobber (reg:SI REG_RETS))]
15463d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
15563d1a8abSmrg  "call (%4);"
15663d1a8abSmrg  [(set_attr "type" "call")])
15763d1a8abSmrg
15863d1a8abSmrg(define_expand "sync_compare_and_swapsi"
15963d1a8abSmrg  [(parallel
16063d1a8abSmrg    [(set (match_operand:SI 0 "register_operand" "")
16163d1a8abSmrg	  (match_operand:SI 1 "memory_operand" ""))
16263d1a8abSmrg     (set (match_dup 1)
16363d1a8abSmrg	  (unspec:SI
16463d1a8abSmrg	   [(match_dup 1)
16563d1a8abSmrg	    (match_operand:SI 2 "register_operand" "")
16663d1a8abSmrg	    (match_operand:SI 3 "register_operand" "")
16763d1a8abSmrg	    (match_dup 4)]
16863d1a8abSmrg	   UNSPEC_ATOMIC))
16963d1a8abSmrg     (clobber (reg:SI REG_RETS))])]
17063d1a8abSmrg  "TARGET_SUPPORTS_SYNC_CALLS"
17163d1a8abSmrg{
17263d1a8abSmrg  if (!REG_P (XEXP (operands[1], 0)))
17363d1a8abSmrg    {
17463d1a8abSmrg      operands[1] = shallow_copy_rtx (operands[1]);
17563d1a8abSmrg      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
17663d1a8abSmrg    }
17763d1a8abSmrg  operands[4] = force_reg (Pmode, GEN_INT (0x420));
17863d1a8abSmrg})
179