1ac8e35e1Smrg /* Subroutines used for expanding RISC-V builtins.
2*0bfacb9bSmrg Copyright (C) 2011-2020 Free Software Foundation, Inc.
3ac8e35e1Smrg Contributed by Andrew Waterman (andrew@sifive.com).
4ac8e35e1Smrg
5ac8e35e1Smrg This file is part of GCC.
6ac8e35e1Smrg
7ac8e35e1Smrg GCC is free software; you can redistribute it and/or modify
8ac8e35e1Smrg it under the terms of the GNU General Public License as published by
9ac8e35e1Smrg the Free Software Foundation; either version 3, or (at your option)
10ac8e35e1Smrg any later version.
11ac8e35e1Smrg
12ac8e35e1Smrg GCC is distributed in the hope that it will be useful,
13ac8e35e1Smrg but WITHOUT ANY WARRANTY; without even the implied warranty of
14ac8e35e1Smrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15ac8e35e1Smrg GNU General Public License for more details.
16ac8e35e1Smrg
17ac8e35e1Smrg You should have received a copy of the GNU General Public License
18ac8e35e1Smrg along with GCC; see the file COPYING3. If not see
19ac8e35e1Smrg <http://www.gnu.org/licenses/>. */
20ac8e35e1Smrg
218dd4bdcdSmrg #define IN_TARGET_CODE 1
228dd4bdcdSmrg
23ac8e35e1Smrg #include "config.h"
24ac8e35e1Smrg #include "system.h"
25ac8e35e1Smrg #include "coretypes.h"
26ac8e35e1Smrg #include "tm.h"
27ac8e35e1Smrg #include "rtl.h"
28ac8e35e1Smrg #include "tree.h"
29ac8e35e1Smrg #include "gimple-expr.h"
30ac8e35e1Smrg #include "memmodel.h"
31ac8e35e1Smrg #include "expmed.h"
328dd4bdcdSmrg #include "profile-count.h"
33ac8e35e1Smrg #include "optabs.h"
34ac8e35e1Smrg #include "recog.h"
35ac8e35e1Smrg #include "diagnostic-core.h"
36ac8e35e1Smrg #include "stor-layout.h"
37ac8e35e1Smrg #include "expr.h"
38ac8e35e1Smrg #include "langhooks.h"
39ac8e35e1Smrg
40ac8e35e1Smrg /* Macros to create an enumeration identifier for a function prototype. */
41*0bfacb9bSmrg #define RISCV_FTYPE_NAME0(A) RISCV_##A##_FTYPE
42ac8e35e1Smrg #define RISCV_FTYPE_NAME1(A, B) RISCV_##A##_FTYPE_##B
43ac8e35e1Smrg
44ac8e35e1Smrg /* Classifies the prototype of a built-in function. */
45ac8e35e1Smrg enum riscv_function_type {
46ac8e35e1Smrg #define DEF_RISCV_FTYPE(NARGS, LIST) RISCV_FTYPE_NAME##NARGS LIST,
47ac8e35e1Smrg #include "config/riscv/riscv-ftypes.def"
48ac8e35e1Smrg #undef DEF_RISCV_FTYPE
49ac8e35e1Smrg RISCV_MAX_FTYPE_MAX
50ac8e35e1Smrg };
51ac8e35e1Smrg
52ac8e35e1Smrg /* Specifies how a built-in function should be converted into rtl. */
53ac8e35e1Smrg enum riscv_builtin_type {
54ac8e35e1Smrg /* The function corresponds directly to an .md pattern. */
55ac8e35e1Smrg RISCV_BUILTIN_DIRECT,
56ac8e35e1Smrg
57ac8e35e1Smrg /* Likewise, but with return type VOID. */
58ac8e35e1Smrg RISCV_BUILTIN_DIRECT_NO_TARGET
59ac8e35e1Smrg };
60ac8e35e1Smrg
61ac8e35e1Smrg /* Declare an availability predicate for built-in functions. */
62ac8e35e1Smrg #define AVAIL(NAME, COND) \
63ac8e35e1Smrg static unsigned int \
64ac8e35e1Smrg riscv_builtin_avail_##NAME (void) \
65ac8e35e1Smrg { \
66ac8e35e1Smrg return (COND); \
67ac8e35e1Smrg }
68ac8e35e1Smrg
69ac8e35e1Smrg /* This structure describes a single built-in function. */
70ac8e35e1Smrg struct riscv_builtin_description {
71ac8e35e1Smrg /* The code of the main .md file instruction. See riscv_builtin_type
72ac8e35e1Smrg for more information. */
73ac8e35e1Smrg enum insn_code icode;
74ac8e35e1Smrg
75ac8e35e1Smrg /* The name of the built-in function. */
76ac8e35e1Smrg const char *name;
77ac8e35e1Smrg
78ac8e35e1Smrg /* Specifies how the function should be expanded. */
79ac8e35e1Smrg enum riscv_builtin_type builtin_type;
80ac8e35e1Smrg
81ac8e35e1Smrg /* The function's prototype. */
82ac8e35e1Smrg enum riscv_function_type prototype;
83ac8e35e1Smrg
84ac8e35e1Smrg /* Whether the function is available. */
85ac8e35e1Smrg unsigned int (*avail) (void);
86ac8e35e1Smrg };
87ac8e35e1Smrg
88ac8e35e1Smrg AVAIL (hard_float, TARGET_HARD_FLOAT)
89ac8e35e1Smrg
90ac8e35e1Smrg /* Construct a riscv_builtin_description from the given arguments.
91ac8e35e1Smrg
92ac8e35e1Smrg INSN is the name of the associated instruction pattern, without the
93ac8e35e1Smrg leading CODE_FOR_riscv_.
94ac8e35e1Smrg
95ac8e35e1Smrg NAME is the name of the function itself, without the leading
96ac8e35e1Smrg "__builtin_riscv_".
97ac8e35e1Smrg
98ac8e35e1Smrg BUILTIN_TYPE and FUNCTION_TYPE are riscv_builtin_description fields.
99ac8e35e1Smrg
100ac8e35e1Smrg AVAIL is the name of the availability predicate, without the leading
101ac8e35e1Smrg riscv_builtin_avail_. */
102ac8e35e1Smrg #define RISCV_BUILTIN(INSN, NAME, BUILTIN_TYPE, FUNCTION_TYPE, AVAIL) \
103ac8e35e1Smrg { CODE_FOR_riscv_ ## INSN, "__builtin_riscv_" NAME, \
104ac8e35e1Smrg BUILTIN_TYPE, FUNCTION_TYPE, riscv_builtin_avail_ ## AVAIL }
105ac8e35e1Smrg
106ac8e35e1Smrg /* Define __builtin_riscv_<INSN>, which is a RISCV_BUILTIN_DIRECT function
107ac8e35e1Smrg mapped to instruction CODE_FOR_riscv_<INSN>, FUNCTION_TYPE and AVAIL
108ac8e35e1Smrg are as for RISCV_BUILTIN. */
109ac8e35e1Smrg #define DIRECT_BUILTIN(INSN, FUNCTION_TYPE, AVAIL) \
110ac8e35e1Smrg RISCV_BUILTIN (INSN, #INSN, RISCV_BUILTIN_DIRECT, FUNCTION_TYPE, AVAIL)
111ac8e35e1Smrg
112ac8e35e1Smrg /* Define __builtin_riscv_<INSN>, which is a RISCV_BUILTIN_DIRECT_NO_TARGET
113ac8e35e1Smrg function mapped to instruction CODE_FOR_riscv_<INSN>, FUNCTION_TYPE
114ac8e35e1Smrg and AVAIL are as for RISCV_BUILTIN. */
115ac8e35e1Smrg #define DIRECT_NO_TARGET_BUILTIN(INSN, FUNCTION_TYPE, AVAIL) \
116ac8e35e1Smrg RISCV_BUILTIN (INSN, #INSN, RISCV_BUILTIN_DIRECT_NO_TARGET, \
117ac8e35e1Smrg FUNCTION_TYPE, AVAIL)
118ac8e35e1Smrg
119ac8e35e1Smrg /* Argument types. */
120ac8e35e1Smrg #define RISCV_ATYPE_VOID void_type_node
121ac8e35e1Smrg #define RISCV_ATYPE_USI unsigned_intSI_type_node
122ac8e35e1Smrg
123ac8e35e1Smrg /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
124ac8e35e1Smrg their associated RISCV_ATYPEs. */
125*0bfacb9bSmrg #define RISCV_FTYPE_ATYPES0(A) \
126*0bfacb9bSmrg RISCV_ATYPE_##A
127ac8e35e1Smrg #define RISCV_FTYPE_ATYPES1(A, B) \
128ac8e35e1Smrg RISCV_ATYPE_##A, RISCV_ATYPE_##B
129ac8e35e1Smrg
130ac8e35e1Smrg static const struct riscv_builtin_description riscv_builtins[] = {
131*0bfacb9bSmrg DIRECT_BUILTIN (frflags, RISCV_USI_FTYPE, hard_float),
132ac8e35e1Smrg DIRECT_NO_TARGET_BUILTIN (fsflags, RISCV_VOID_FTYPE_USI, hard_float)
133ac8e35e1Smrg };
134ac8e35e1Smrg
135ac8e35e1Smrg /* Index I is the function declaration for riscv_builtins[I], or null if the
136ac8e35e1Smrg function isn't defined on this target. */
137ac8e35e1Smrg static GTY(()) tree riscv_builtin_decls[ARRAY_SIZE (riscv_builtins)];
138ac8e35e1Smrg
139ac8e35e1Smrg /* Get the index I of the function declaration for riscv_builtin_decls[I]
140ac8e35e1Smrg using the instruction code or return null if not defined for the target. */
141ac8e35e1Smrg static GTY(()) int riscv_builtin_decl_index[NUM_INSN_CODES];
142ac8e35e1Smrg
143ac8e35e1Smrg #define GET_BUILTIN_DECL(CODE) \
144ac8e35e1Smrg riscv_builtin_decls[riscv_builtin_decl_index[(CODE)]]
145ac8e35e1Smrg
146ac8e35e1Smrg /* Return the function type associated with function prototype TYPE. */
147ac8e35e1Smrg
148ac8e35e1Smrg static tree
riscv_build_function_type(enum riscv_function_type type)149ac8e35e1Smrg riscv_build_function_type (enum riscv_function_type type)
150ac8e35e1Smrg {
151ac8e35e1Smrg static tree types[(int) RISCV_MAX_FTYPE_MAX];
152ac8e35e1Smrg
153ac8e35e1Smrg if (types[(int) type] == NULL_TREE)
154ac8e35e1Smrg switch (type)
155ac8e35e1Smrg {
156ac8e35e1Smrg #define DEF_RISCV_FTYPE(NUM, ARGS) \
157ac8e35e1Smrg case RISCV_FTYPE_NAME##NUM ARGS: \
158ac8e35e1Smrg types[(int) type] \
159ac8e35e1Smrg = build_function_type_list (RISCV_FTYPE_ATYPES##NUM ARGS, \
160ac8e35e1Smrg NULL_TREE); \
161ac8e35e1Smrg break;
162ac8e35e1Smrg #include "config/riscv/riscv-ftypes.def"
163ac8e35e1Smrg #undef DEF_RISCV_FTYPE
164ac8e35e1Smrg default:
165ac8e35e1Smrg gcc_unreachable ();
166ac8e35e1Smrg }
167ac8e35e1Smrg
168ac8e35e1Smrg return types[(int) type];
169ac8e35e1Smrg }
170ac8e35e1Smrg
171ac8e35e1Smrg /* Implement TARGET_INIT_BUILTINS. */
172ac8e35e1Smrg
173ac8e35e1Smrg void
riscv_init_builtins(void)174ac8e35e1Smrg riscv_init_builtins (void)
175ac8e35e1Smrg {
176ac8e35e1Smrg for (size_t i = 0; i < ARRAY_SIZE (riscv_builtins); i++)
177ac8e35e1Smrg {
178ac8e35e1Smrg const struct riscv_builtin_description *d = &riscv_builtins[i];
179ac8e35e1Smrg if (d->avail ())
180ac8e35e1Smrg {
181ac8e35e1Smrg tree type = riscv_build_function_type (d->prototype);
182ac8e35e1Smrg riscv_builtin_decls[i]
183ac8e35e1Smrg = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL, NULL);
184ac8e35e1Smrg riscv_builtin_decl_index[d->icode] = i;
185ac8e35e1Smrg }
186ac8e35e1Smrg }
187ac8e35e1Smrg }
188ac8e35e1Smrg
189ac8e35e1Smrg /* Implement TARGET_BUILTIN_DECL. */
190ac8e35e1Smrg
191ac8e35e1Smrg tree
riscv_builtin_decl(unsigned int code,bool initialize_p ATTRIBUTE_UNUSED)192ac8e35e1Smrg riscv_builtin_decl (unsigned int code, bool initialize_p ATTRIBUTE_UNUSED)
193ac8e35e1Smrg {
194ac8e35e1Smrg if (code >= ARRAY_SIZE (riscv_builtins))
195ac8e35e1Smrg return error_mark_node;
196ac8e35e1Smrg return riscv_builtin_decls[code];
197ac8e35e1Smrg }
198ac8e35e1Smrg
199ac8e35e1Smrg /* Take argument ARGNO from EXP's argument list and convert it into
200ac8e35e1Smrg an expand operand. Store the operand in *OP. */
201ac8e35e1Smrg
202ac8e35e1Smrg static void
riscv_prepare_builtin_arg(struct expand_operand * op,tree exp,unsigned argno)203ac8e35e1Smrg riscv_prepare_builtin_arg (struct expand_operand *op, tree exp, unsigned argno)
204ac8e35e1Smrg {
205ac8e35e1Smrg tree arg = CALL_EXPR_ARG (exp, argno);
206ac8e35e1Smrg create_input_operand (op, expand_normal (arg), TYPE_MODE (TREE_TYPE (arg)));
207ac8e35e1Smrg }
208ac8e35e1Smrg
209ac8e35e1Smrg /* Expand instruction ICODE as part of a built-in function sequence.
210ac8e35e1Smrg Use the first NOPS elements of OPS as the instruction's operands.
211ac8e35e1Smrg HAS_TARGET_P is true if operand 0 is a target; it is false if the
212ac8e35e1Smrg instruction has no target.
213ac8e35e1Smrg
214ac8e35e1Smrg Return the target rtx if HAS_TARGET_P, otherwise return const0_rtx. */
215ac8e35e1Smrg
216ac8e35e1Smrg static rtx
riscv_expand_builtin_insn(enum insn_code icode,unsigned int n_ops,struct expand_operand * ops,bool has_target_p)217ac8e35e1Smrg riscv_expand_builtin_insn (enum insn_code icode, unsigned int n_ops,
218ac8e35e1Smrg struct expand_operand *ops, bool has_target_p)
219ac8e35e1Smrg {
220ac8e35e1Smrg if (!maybe_expand_insn (icode, n_ops, ops))
221ac8e35e1Smrg {
222ac8e35e1Smrg error ("invalid argument to built-in function");
223ac8e35e1Smrg return has_target_p ? gen_reg_rtx (ops[0].mode) : const0_rtx;
224ac8e35e1Smrg }
225ac8e35e1Smrg
226ac8e35e1Smrg return has_target_p ? ops[0].value : const0_rtx;
227ac8e35e1Smrg }
228ac8e35e1Smrg
229ac8e35e1Smrg /* Expand a RISCV_BUILTIN_DIRECT or RISCV_BUILTIN_DIRECT_NO_TARGET function;
230ac8e35e1Smrg HAS_TARGET_P says which. EXP is the CALL_EXPR that calls the function
231ac8e35e1Smrg and ICODE is the code of the associated .md pattern. TARGET, if nonnull,
232ac8e35e1Smrg suggests a good place to put the result. */
233ac8e35e1Smrg
234ac8e35e1Smrg static rtx
riscv_expand_builtin_direct(enum insn_code icode,rtx target,tree exp,bool has_target_p)235ac8e35e1Smrg riscv_expand_builtin_direct (enum insn_code icode, rtx target, tree exp,
236ac8e35e1Smrg bool has_target_p)
237ac8e35e1Smrg {
238ac8e35e1Smrg struct expand_operand ops[MAX_RECOG_OPERANDS];
239ac8e35e1Smrg
240ac8e35e1Smrg /* Map any target to operand 0. */
241ac8e35e1Smrg int opno = 0;
242ac8e35e1Smrg if (has_target_p)
243ac8e35e1Smrg create_output_operand (&ops[opno++], target, TYPE_MODE (TREE_TYPE (exp)));
244ac8e35e1Smrg
245ac8e35e1Smrg /* Map the arguments to the other operands. */
246ac8e35e1Smrg gcc_assert (opno + call_expr_nargs (exp)
247ac8e35e1Smrg == insn_data[icode].n_generator_args);
248ac8e35e1Smrg for (int argno = 0; argno < call_expr_nargs (exp); argno++)
249ac8e35e1Smrg riscv_prepare_builtin_arg (&ops[opno++], exp, argno);
250ac8e35e1Smrg
251ac8e35e1Smrg return riscv_expand_builtin_insn (icode, opno, ops, has_target_p);
252ac8e35e1Smrg }
253ac8e35e1Smrg
254ac8e35e1Smrg /* Implement TARGET_EXPAND_BUILTIN. */
255ac8e35e1Smrg
256ac8e35e1Smrg rtx
riscv_expand_builtin(tree exp,rtx target,rtx subtarget ATTRIBUTE_UNUSED,machine_mode mode ATTRIBUTE_UNUSED,int ignore ATTRIBUTE_UNUSED)257ac8e35e1Smrg riscv_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
258ac8e35e1Smrg machine_mode mode ATTRIBUTE_UNUSED,
259ac8e35e1Smrg int ignore ATTRIBUTE_UNUSED)
260ac8e35e1Smrg {
261ac8e35e1Smrg tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
262*0bfacb9bSmrg unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
263ac8e35e1Smrg const struct riscv_builtin_description *d = &riscv_builtins[fcode];
264ac8e35e1Smrg
265ac8e35e1Smrg switch (d->builtin_type)
266ac8e35e1Smrg {
267ac8e35e1Smrg case RISCV_BUILTIN_DIRECT:
268ac8e35e1Smrg return riscv_expand_builtin_direct (d->icode, target, exp, true);
269ac8e35e1Smrg
270ac8e35e1Smrg case RISCV_BUILTIN_DIRECT_NO_TARGET:
271ac8e35e1Smrg return riscv_expand_builtin_direct (d->icode, target, exp, false);
272ac8e35e1Smrg }
273ac8e35e1Smrg
274ac8e35e1Smrg gcc_unreachable ();
275ac8e35e1Smrg }
276ac8e35e1Smrg
277ac8e35e1Smrg /* Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV. */
278ac8e35e1Smrg
279ac8e35e1Smrg void
riscv_atomic_assign_expand_fenv(tree * hold,tree * clear,tree * update)280ac8e35e1Smrg riscv_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
281ac8e35e1Smrg {
282ac8e35e1Smrg if (!TARGET_HARD_FLOAT)
283ac8e35e1Smrg return;
284ac8e35e1Smrg
285ac8e35e1Smrg tree frflags = GET_BUILTIN_DECL (CODE_FOR_riscv_frflags);
286ac8e35e1Smrg tree fsflags = GET_BUILTIN_DECL (CODE_FOR_riscv_fsflags);
287ac8e35e1Smrg tree old_flags = create_tmp_var_raw (RISCV_ATYPE_USI);
288ac8e35e1Smrg
289*0bfacb9bSmrg *hold = build4 (TARGET_EXPR, RISCV_ATYPE_USI, old_flags,
290*0bfacb9bSmrg build_call_expr (frflags, 0), NULL_TREE, NULL_TREE);
291ac8e35e1Smrg *clear = build_call_expr (fsflags, 1, old_flags);
292ac8e35e1Smrg *update = NULL_TREE;
293ac8e35e1Smrg }
294