163d1a8abSmrg; Command line options for the Renesas RL78 port of GCC. 2*ec02198aSmrg; Copyright (C) 2011-2020 Free Software Foundation, Inc. 363d1a8abSmrg; Contributed by Red Hat. 463d1a8abSmrg; 563d1a8abSmrg; This file is part of GCC. 663d1a8abSmrg; 763d1a8abSmrg; GCC is free software; you can redistribute it and/or modify it under 863d1a8abSmrg; the terms of the GNU General Public License as published by the Free 963d1a8abSmrg; Software Foundation; either version 3, or (at your option) any later 1063d1a8abSmrg; version. 1163d1a8abSmrg; 1263d1a8abSmrg; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 1363d1a8abSmrg; WARRANTY; without even the implied warranty of MERCHANTABILITY or 1463d1a8abSmrg; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1563d1a8abSmrg; for more details. 1663d1a8abSmrg; 1763d1a8abSmrg; You should have received a copy of the GNU General Public License 1863d1a8abSmrg; along with GCC; see the file COPYING3. If not see 1963d1a8abSmrg; <http://www.gnu.org/licenses/>. 2063d1a8abSmrg;--------------------------------------------------- 2163d1a8abSmrg 2263d1a8abSmrgHeaderInclude 2363d1a8abSmrgconfig/rl78/rl78-opts.h 2463d1a8abSmrg 2563d1a8abSmrgmsim 2663d1a8abSmrgTarget Report 2763d1a8abSmrgUse the simulator runtime. 2863d1a8abSmrg 2963d1a8abSmrgmmul= 3063d1a8abSmrgTarget RejectNegative Joined Var(rl78_mul_type) Report Tolower Enum(rl78_mul_types) Init(MUL_UNINIT) 3163d1a8abSmrgSelects the type of hardware multiplication and division to use (none/g13/g14). 3263d1a8abSmrg 3363d1a8abSmrgEnum 3463d1a8abSmrgName(rl78_mul_types) Type(enum rl78_mul_types) 3563d1a8abSmrg 3663d1a8abSmrgEnumValue 3763d1a8abSmrgEnum(rl78_mul_types) String(g10) Value(MUL_NONE) 3863d1a8abSmrg 3963d1a8abSmrgEnumValue 4063d1a8abSmrgEnum(rl78_mul_types) String(g13) Value(MUL_G13) 4163d1a8abSmrg 4263d1a8abSmrgEnumValue 4363d1a8abSmrgEnum(rl78_mul_types) String(g14) Value(MUL_G14) 4463d1a8abSmrg 4563d1a8abSmrgEnumValue 4663d1a8abSmrgEnum(rl78_mul_types) String(rl78) Value(MUL_G14) 4763d1a8abSmrg 4863d1a8abSmrgmallregs 4963d1a8abSmrgTarget Mask(ALLREGS) Report Optimization 5063d1a8abSmrgUse all registers, reserving none for interrupt handlers. 5163d1a8abSmrg 5263d1a8abSmrgmrelax 5363d1a8abSmrgTarget Report Optimization 5463d1a8abSmrgEnable assembler and linker relaxation. Enabled by default at -Os. 5563d1a8abSmrg 5663d1a8abSmrgmcpu= 5763d1a8abSmrgTarget RejectNegative Joined Var(rl78_cpu_type) Report ToLower Enum(rl78_cpu_types) Init(CPU_UNINIT) 5863d1a8abSmrgSelects the type of RL78 core being targeted (g10/g13/g14). The default is the G14. If set, also selects the hardware multiply support to be used. 5963d1a8abSmrg 6063d1a8abSmrgEnum 6163d1a8abSmrgName(rl78_cpu_types) Type(enum rl78_cpu_types) 6263d1a8abSmrg 6363d1a8abSmrgEnumValue 6463d1a8abSmrgEnum(rl78_cpu_types) String(g10) Value(CPU_G10) 6563d1a8abSmrg 6663d1a8abSmrgEnumValue 6763d1a8abSmrgEnum(rl78_cpu_types) String(g13) Value(CPU_G13) 6863d1a8abSmrg 6963d1a8abSmrgEnumValue 7063d1a8abSmrgEnum(rl78_cpu_types) String(g14) Value(CPU_G14) 7163d1a8abSmrg 7263d1a8abSmrgEnumValue 7363d1a8abSmrgEnum(rl78_cpu_types) String(rl78) Value(CPU_G14) 7463d1a8abSmrg 7563d1a8abSmrgmg10 7663d1a8abSmrgTarget RejectNegative Report Alias(mcpu=, g10) 7763d1a8abSmrgAlias for -mcpu=g10. 7863d1a8abSmrg 7963d1a8abSmrgmg13 8063d1a8abSmrgTarget RejectNegative Report Alias(mcpu=, g13) 8163d1a8abSmrgAlias for -mcpu=g13. 8263d1a8abSmrg 8363d1a8abSmrgmg14 8463d1a8abSmrgTarget RejectNegative Report Alias(mcpu=, g14) 8563d1a8abSmrgAlias for -mcpu=g14. 8663d1a8abSmrg 8763d1a8abSmrgmrl78 8863d1a8abSmrgTarget RejectNegative Report Alias(mcpu=, g14) 8963d1a8abSmrgAlias for -mcpu=g14. 9063d1a8abSmrg 9163d1a8abSmrgmes0 9263d1a8abSmrgTarget Mask(ES0) 9363d1a8abSmrgAssume ES is zero throughout program execution, use ES: for read-only data. 9463d1a8abSmrg 9563d1a8abSmrgmsave-mduc-in-interrupts 9663d1a8abSmrgTarget Mask(SAVE_MDUC_REGISTERS) 9763d1a8abSmrgStores the MDUC registers in interrupt handlers for G13 target. 98