1*ec02198aSmrg /* Copyright (C) 2010-2020 Free Software Foundation, Inc.
263d1a8abSmrg 
363d1a8abSmrg    This file is part of GCC.
463d1a8abSmrg 
563d1a8abSmrg    GCC is free software; you can redistribute it and/or modify it
663d1a8abSmrg    under the terms of the GNU General Public License as published by
763d1a8abSmrg    the Free Software Foundation; either version 3, or (at your option)
863d1a8abSmrg    any later version.
963d1a8abSmrg 
1063d1a8abSmrg    GCC is distributed in the hope that it will be useful, but WITHOUT
1163d1a8abSmrg    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
1263d1a8abSmrg    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
1363d1a8abSmrg    License for more details.
1463d1a8abSmrg 
1563d1a8abSmrg    Under Section 7 of GPL version 3, you are granted additional
1663d1a8abSmrg    permissions described in the GCC Runtime Library Exception, version
1763d1a8abSmrg    3.1, as published by the Free Software Foundation.
1863d1a8abSmrg 
1963d1a8abSmrg    You should have received a copy of the GNU General Public License
2063d1a8abSmrg    and a copy of the GCC Runtime Library Exception along with this
2163d1a8abSmrg    program; see the files COPYING3 and COPYING.RUNTIME respectively.
2263d1a8abSmrg    If not, see <http://www.gnu.org/licenses/>.  */
2363d1a8abSmrg 
2463d1a8abSmrg #ifdef __mips_hard_float
2563d1a8abSmrg 
2663d1a8abSmrg /* Flush denormalized numbers to zero.  */
2763d1a8abSmrg #define _FPU_FLUSH_TZ   0x1000000
2863d1a8abSmrg 
2963d1a8abSmrg /* Rounding control.  */
3063d1a8abSmrg #define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
3163d1a8abSmrg #define _FPU_RC_ZERO    0x1
3263d1a8abSmrg #define _FPU_RC_UP      0x2
3363d1a8abSmrg #define _FPU_RC_DOWN    0x3
3463d1a8abSmrg 
3563d1a8abSmrg /* Enable interrupts for IEEE exceptions.  */
3663d1a8abSmrg #define _FPU_IEEE     0x00000F80
3763d1a8abSmrg 
3863d1a8abSmrg /* Macros for accessing the hardware control word.  */
3963d1a8abSmrg #define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
4063d1a8abSmrg #define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
4163d1a8abSmrg 
4263d1a8abSmrg static void __attribute__((constructor,nomips16))
set_fast_math(void)4363d1a8abSmrg set_fast_math (void)
4463d1a8abSmrg {
4563d1a8abSmrg   unsigned int fcr;
4663d1a8abSmrg 
4763d1a8abSmrg   /* Flush to zero, round to nearest, IEEE exceptions disabled.  */
4863d1a8abSmrg   fcr = _FPU_FLUSH_TZ | _FPU_RC_NEAREST;
4963d1a8abSmrg 
5063d1a8abSmrg   _FPU_SETCW(fcr);
5163d1a8abSmrg }
5263d1a8abSmrg 
5363d1a8abSmrg #endif /* __mips_hard_float */
54