18dd4bdcdSmrg /* This file is automatically generated. DO NOT EDIT! */ 2*760c2415Smrg /* Generated from: NetBSD: mknative-gcc,v 1.108 2020/09/05 10:58:08 mrg Exp */ 38dd4bdcdSmrg /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp */ 48dd4bdcdSmrg 58dd4bdcdSmrg /* -*- buffer-read-only: t -*- 68dd4bdcdSmrg Generated automatically by parsecpu.awk from arm-cpus.in. 78dd4bdcdSmrg Do not edit. 88dd4bdcdSmrg 9*760c2415Smrg Copyright (C) 2011-2019 Free Software Foundation, Inc. 108dd4bdcdSmrg 118dd4bdcdSmrg This file is part of GCC. 128dd4bdcdSmrg 138dd4bdcdSmrg GCC is free software; you can redistribute it and/or modify 148dd4bdcdSmrg it under the terms of the GNU General Public License as 158dd4bdcdSmrg published by the Free Software Foundation; either version 3, 168dd4bdcdSmrg or (at your option) any later version. 178dd4bdcdSmrg 188dd4bdcdSmrg GCC is distributed in the hope that it will be useful, 198dd4bdcdSmrg but WITHOUT ANY WARRANTY; without even the implied warranty of 208dd4bdcdSmrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 218dd4bdcdSmrg GNU General Public License for more details. 228dd4bdcdSmrg 238dd4bdcdSmrg You should have received a copy of the GNU General Public 248dd4bdcdSmrg License along with GCC; see the file COPYING3. If not see 258dd4bdcdSmrg <http://www.gnu.org/licenses/>. */ 268dd4bdcdSmrg 27*760c2415Smrg static const cpu_alias cpu_aliastab_strongarm[] = { 28*760c2415Smrg { "strongarm110", true}, 29*760c2415Smrg { "strongarm1100", false}, 30*760c2415Smrg { "strongarm1110", false}, 31*760c2415Smrg { NULL, false} 32*760c2415Smrg }; 33*760c2415Smrg 34*760c2415Smrg static const cpu_alias cpu_aliastab_arm7tdmi[] = { 35*760c2415Smrg { "arm7tdmi-s", true}, 36*760c2415Smrg { NULL, false} 37*760c2415Smrg }; 38*760c2415Smrg 39*760c2415Smrg static const cpu_alias cpu_aliastab_arm710t[] = { 40*760c2415Smrg { "arm720t", true}, 41*760c2415Smrg { "arm740t", true}, 42*760c2415Smrg { NULL, false} 43*760c2415Smrg }; 44*760c2415Smrg 45*760c2415Smrg static const cpu_alias cpu_aliastab_arm920t[] = { 46*760c2415Smrg { "arm920", true}, 47*760c2415Smrg { "arm922t", true}, 48*760c2415Smrg { "arm940t", true}, 49*760c2415Smrg { "ep9312", true}, 50*760c2415Smrg { NULL, false} 51*760c2415Smrg }; 52*760c2415Smrg 53*760c2415Smrg static const cpu_alias cpu_aliastab_arm10tdmi[] = { 54*760c2415Smrg { "arm1020t", true}, 55*760c2415Smrg { NULL, false} 56*760c2415Smrg }; 57*760c2415Smrg 588dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm9e[] = { 598dd4bdcdSmrg { 608dd4bdcdSmrg "nofp", true, false, 618dd4bdcdSmrg { 628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 638dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 648dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 658dd4bdcdSmrg } 668dd4bdcdSmrg }, 678dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 688dd4bdcdSmrg }; 698dd4bdcdSmrg 70*760c2415Smrg static const cpu_alias cpu_aliastab_arm9e[] = { 71*760c2415Smrg { "arm946e-s", true}, 72*760c2415Smrg { "arm966e-s", true}, 73*760c2415Smrg { "arm968e-s", true}, 74*760c2415Smrg { NULL, false} 758dd4bdcdSmrg }; 768dd4bdcdSmrg 778dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm10e[] = { 788dd4bdcdSmrg { 798dd4bdcdSmrg "nofp", true, false, 808dd4bdcdSmrg { 818dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 828dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 838dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 848dd4bdcdSmrg } 858dd4bdcdSmrg }, 868dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 878dd4bdcdSmrg }; 888dd4bdcdSmrg 89*760c2415Smrg static const cpu_alias cpu_aliastab_arm10e[] = { 90*760c2415Smrg { "arm1020e", true}, 91*760c2415Smrg { "arm1022e", true}, 92*760c2415Smrg { NULL, false} 938dd4bdcdSmrg }; 948dd4bdcdSmrg 958dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm926ejs[] = { 968dd4bdcdSmrg { 978dd4bdcdSmrg "nofp", true, false, 988dd4bdcdSmrg { 998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 1008dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 1018dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 1028dd4bdcdSmrg } 1038dd4bdcdSmrg }, 1048dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 1058dd4bdcdSmrg }; 1068dd4bdcdSmrg 1078dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm1026ejs[] = { 1088dd4bdcdSmrg { 1098dd4bdcdSmrg "nofp", true, false, 1108dd4bdcdSmrg { 1118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 1128dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 1138dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 1148dd4bdcdSmrg } 1158dd4bdcdSmrg }, 1168dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 1178dd4bdcdSmrg }; 1188dd4bdcdSmrg 1198dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_genericv7a[] = { 1208dd4bdcdSmrg { 1218dd4bdcdSmrg "mp", false, false, 1228dd4bdcdSmrg { 1238dd4bdcdSmrg isa_bit_mp, isa_nobit 1248dd4bdcdSmrg } 1258dd4bdcdSmrg }, 1268dd4bdcdSmrg { 1278dd4bdcdSmrg "sec", false, false, 1288dd4bdcdSmrg { 1298dd4bdcdSmrg isa_bit_sec, isa_nobit 1308dd4bdcdSmrg } 1318dd4bdcdSmrg }, 1328dd4bdcdSmrg { 1338dd4bdcdSmrg "vfpv3-d16", false, false, 1348dd4bdcdSmrg { 1358dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 1368dd4bdcdSmrg } 1378dd4bdcdSmrg }, 1388dd4bdcdSmrg { 1398dd4bdcdSmrg "vfpv3", false, false, 1408dd4bdcdSmrg { 1418dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 1428dd4bdcdSmrg isa_nobit 1438dd4bdcdSmrg } 1448dd4bdcdSmrg }, 1458dd4bdcdSmrg { 1468dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 1478dd4bdcdSmrg { 1488dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 1498dd4bdcdSmrg isa_nobit 1508dd4bdcdSmrg } 1518dd4bdcdSmrg }, 1528dd4bdcdSmrg { 1538dd4bdcdSmrg "vfpv3-fp16", false, false, 1548dd4bdcdSmrg { 1558dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 1568dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1578dd4bdcdSmrg } 1588dd4bdcdSmrg }, 1598dd4bdcdSmrg { 1608dd4bdcdSmrg "vfpv4-d16", false, false, 1618dd4bdcdSmrg { 1628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 1638dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1648dd4bdcdSmrg } 1658dd4bdcdSmrg }, 1668dd4bdcdSmrg { 1678dd4bdcdSmrg "vfpv4", false, false, 1688dd4bdcdSmrg { 1698dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 1708dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1718dd4bdcdSmrg } 1728dd4bdcdSmrg }, 1738dd4bdcdSmrg { 1748dd4bdcdSmrg "simd", false, false, 1758dd4bdcdSmrg { 1768dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 1778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1788dd4bdcdSmrg } 1798dd4bdcdSmrg }, 1808dd4bdcdSmrg { 1818dd4bdcdSmrg "neon-fp16", false, false, 1828dd4bdcdSmrg { 1838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 1848dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1858dd4bdcdSmrg } 1868dd4bdcdSmrg }, 1878dd4bdcdSmrg { 1888dd4bdcdSmrg "neon-vfpv4", false, false, 1898dd4bdcdSmrg { 1908dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 1918dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1928dd4bdcdSmrg } 1938dd4bdcdSmrg }, 1948dd4bdcdSmrg { 1958dd4bdcdSmrg "nosimd", true, false, 1968dd4bdcdSmrg { 1978dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 1988dd4bdcdSmrg isa_bit_crypto, isa_nobit 1998dd4bdcdSmrg } 2008dd4bdcdSmrg }, 2018dd4bdcdSmrg { 2028dd4bdcdSmrg "nofp", true, false, 2038dd4bdcdSmrg { 2048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2058dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2068dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2078dd4bdcdSmrg } 2088dd4bdcdSmrg }, 2098dd4bdcdSmrg { 2108dd4bdcdSmrg "neon", false, true, 2118dd4bdcdSmrg { 2128dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 2138dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 2148dd4bdcdSmrg } 2158dd4bdcdSmrg }, 2168dd4bdcdSmrg { 2178dd4bdcdSmrg "neon-vfpv3", false, true, 2188dd4bdcdSmrg { 2198dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 2208dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 2218dd4bdcdSmrg } 2228dd4bdcdSmrg }, 2238dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2248dd4bdcdSmrg }; 2258dd4bdcdSmrg 2268dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa5[] = { 2278dd4bdcdSmrg { 2288dd4bdcdSmrg "nosimd", true, false, 2298dd4bdcdSmrg { 2308dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 2318dd4bdcdSmrg isa_bit_crypto, isa_nobit 2328dd4bdcdSmrg } 2338dd4bdcdSmrg }, 2348dd4bdcdSmrg { 2358dd4bdcdSmrg "nofp", true, false, 2368dd4bdcdSmrg { 2378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2388dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2398dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2408dd4bdcdSmrg } 2418dd4bdcdSmrg }, 2428dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2438dd4bdcdSmrg }; 2448dd4bdcdSmrg 2458dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa7[] = { 2468dd4bdcdSmrg { 2478dd4bdcdSmrg "nosimd", true, false, 2488dd4bdcdSmrg { 2498dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 2508dd4bdcdSmrg isa_bit_crypto, isa_nobit 2518dd4bdcdSmrg } 2528dd4bdcdSmrg }, 2538dd4bdcdSmrg { 2548dd4bdcdSmrg "nofp", true, false, 2558dd4bdcdSmrg { 2568dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2578dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2588dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2598dd4bdcdSmrg } 2608dd4bdcdSmrg }, 2618dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2628dd4bdcdSmrg }; 2638dd4bdcdSmrg 2648dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa8[] = { 2658dd4bdcdSmrg { 2668dd4bdcdSmrg "nofp", true, false, 2678dd4bdcdSmrg { 2688dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2698dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2708dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2718dd4bdcdSmrg } 2728dd4bdcdSmrg }, 2738dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2748dd4bdcdSmrg }; 2758dd4bdcdSmrg 2768dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa9[] = { 2778dd4bdcdSmrg { 2788dd4bdcdSmrg "nosimd", true, false, 2798dd4bdcdSmrg { 2808dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 2818dd4bdcdSmrg isa_bit_crypto, isa_nobit 2828dd4bdcdSmrg } 2838dd4bdcdSmrg }, 2848dd4bdcdSmrg { 2858dd4bdcdSmrg "nofp", true, false, 2868dd4bdcdSmrg { 2878dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2888dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2898dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2908dd4bdcdSmrg } 2918dd4bdcdSmrg }, 2928dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2938dd4bdcdSmrg }; 2948dd4bdcdSmrg 2958dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa12[] = { 2968dd4bdcdSmrg { 2978dd4bdcdSmrg "nofp", true, false, 2988dd4bdcdSmrg { 2998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3008dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3018dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3028dd4bdcdSmrg } 3038dd4bdcdSmrg }, 3048dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3058dd4bdcdSmrg }; 3068dd4bdcdSmrg 3078dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa15[] = { 3088dd4bdcdSmrg { 3098dd4bdcdSmrg "nofp", true, false, 3108dd4bdcdSmrg { 3118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3128dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3138dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3148dd4bdcdSmrg } 3158dd4bdcdSmrg }, 3168dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3178dd4bdcdSmrg }; 3188dd4bdcdSmrg 3198dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa17[] = { 3208dd4bdcdSmrg { 3218dd4bdcdSmrg "nofp", true, false, 3228dd4bdcdSmrg { 3238dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3248dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3258dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3268dd4bdcdSmrg } 3278dd4bdcdSmrg }, 3288dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3298dd4bdcdSmrg }; 3308dd4bdcdSmrg 3318dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr5[] = { 3328dd4bdcdSmrg { 3338dd4bdcdSmrg "nofp.dp", true, false, 3348dd4bdcdSmrg { 3358dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3368dd4bdcdSmrg } 3378dd4bdcdSmrg }, 3388dd4bdcdSmrg { 3398dd4bdcdSmrg "nofp", true, false, 3408dd4bdcdSmrg { 3418dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3428dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3438dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3448dd4bdcdSmrg } 3458dd4bdcdSmrg }, 3468dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3478dd4bdcdSmrg }; 3488dd4bdcdSmrg 3498dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr7[] = { 3508dd4bdcdSmrg { 3518dd4bdcdSmrg "nofp.dp", true, false, 3528dd4bdcdSmrg { 3538dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3548dd4bdcdSmrg } 3558dd4bdcdSmrg }, 3568dd4bdcdSmrg { 3578dd4bdcdSmrg "nofp", true, false, 3588dd4bdcdSmrg { 3598dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3618dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3628dd4bdcdSmrg } 3638dd4bdcdSmrg }, 3648dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3658dd4bdcdSmrg }; 3668dd4bdcdSmrg 3678dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr8[] = { 3688dd4bdcdSmrg { 3698dd4bdcdSmrg "nofp.dp", true, false, 3708dd4bdcdSmrg { 3718dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3728dd4bdcdSmrg } 3738dd4bdcdSmrg }, 3748dd4bdcdSmrg { 3758dd4bdcdSmrg "nofp", true, false, 3768dd4bdcdSmrg { 3778dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3788dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3798dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3808dd4bdcdSmrg } 3818dd4bdcdSmrg }, 3828dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3838dd4bdcdSmrg }; 3848dd4bdcdSmrg 3858dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm7[] = { 3868dd4bdcdSmrg { 3878dd4bdcdSmrg "nofp.dp", true, false, 3888dd4bdcdSmrg { 3898dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3908dd4bdcdSmrg } 3918dd4bdcdSmrg }, 3928dd4bdcdSmrg { 3938dd4bdcdSmrg "nofp", true, false, 3948dd4bdcdSmrg { 3958dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 3968dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3978dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3988dd4bdcdSmrg } 3998dd4bdcdSmrg }, 4008dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4018dd4bdcdSmrg }; 4028dd4bdcdSmrg 4038dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm4[] = { 4048dd4bdcdSmrg { 4058dd4bdcdSmrg "nofp", true, false, 4068dd4bdcdSmrg { 4078dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4088dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4098dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4108dd4bdcdSmrg } 4118dd4bdcdSmrg }, 4128dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4138dd4bdcdSmrg }; 4148dd4bdcdSmrg 4158dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = { 4168dd4bdcdSmrg { 4178dd4bdcdSmrg "nofp", true, false, 4188dd4bdcdSmrg { 4198dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4208dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4218dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4228dd4bdcdSmrg } 4238dd4bdcdSmrg }, 4248dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4258dd4bdcdSmrg }; 4268dd4bdcdSmrg 4278dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = { 4288dd4bdcdSmrg { 4298dd4bdcdSmrg "nofp", true, false, 4308dd4bdcdSmrg { 4318dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4328dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4338dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4348dd4bdcdSmrg } 4358dd4bdcdSmrg }, 4368dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4378dd4bdcdSmrg }; 4388dd4bdcdSmrg 4398dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa32[] = { 4408dd4bdcdSmrg { 4418dd4bdcdSmrg "crypto", false, false, 4428dd4bdcdSmrg { 4438dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4448dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 4458dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4468dd4bdcdSmrg } 4478dd4bdcdSmrg }, 4488dd4bdcdSmrg { 4498dd4bdcdSmrg "nofp", true, false, 4508dd4bdcdSmrg { 4518dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4528dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4538dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4548dd4bdcdSmrg } 4558dd4bdcdSmrg }, 4568dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4578dd4bdcdSmrg }; 4588dd4bdcdSmrg 4598dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa35[] = { 4608dd4bdcdSmrg { 4618dd4bdcdSmrg "crypto", false, false, 4628dd4bdcdSmrg { 4638dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4648dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 4658dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4668dd4bdcdSmrg } 4678dd4bdcdSmrg }, 4688dd4bdcdSmrg { 4698dd4bdcdSmrg "nofp", true, false, 4708dd4bdcdSmrg { 4718dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4728dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4738dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4748dd4bdcdSmrg } 4758dd4bdcdSmrg }, 4768dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4778dd4bdcdSmrg }; 4788dd4bdcdSmrg 4798dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa53[] = { 4808dd4bdcdSmrg { 4818dd4bdcdSmrg "crypto", false, false, 4828dd4bdcdSmrg { 4838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4848dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 4858dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4868dd4bdcdSmrg } 4878dd4bdcdSmrg }, 4888dd4bdcdSmrg { 4898dd4bdcdSmrg "nofp", true, false, 4908dd4bdcdSmrg { 4918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4928dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4938dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4948dd4bdcdSmrg } 4958dd4bdcdSmrg }, 4968dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4978dd4bdcdSmrg }; 4988dd4bdcdSmrg 4998dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa57[] = { 5008dd4bdcdSmrg { 5018dd4bdcdSmrg "crypto", false, false, 5028dd4bdcdSmrg { 5038dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5048dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5058dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5068dd4bdcdSmrg } 5078dd4bdcdSmrg }, 5088dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5098dd4bdcdSmrg }; 5108dd4bdcdSmrg 5118dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa72[] = { 5128dd4bdcdSmrg { 5138dd4bdcdSmrg "crypto", false, false, 5148dd4bdcdSmrg { 5158dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5168dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5178dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5188dd4bdcdSmrg } 5198dd4bdcdSmrg }, 5208dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5218dd4bdcdSmrg }; 5228dd4bdcdSmrg 5238dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73[] = { 5248dd4bdcdSmrg { 5258dd4bdcdSmrg "crypto", false, false, 5268dd4bdcdSmrg { 5278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5288dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5298dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5308dd4bdcdSmrg } 5318dd4bdcdSmrg }, 5328dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5338dd4bdcdSmrg }; 5348dd4bdcdSmrg 5358dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_exynosm1[] = { 5368dd4bdcdSmrg { 5378dd4bdcdSmrg "crypto", false, false, 5388dd4bdcdSmrg { 5398dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5408dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5418dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5428dd4bdcdSmrg } 5438dd4bdcdSmrg }, 5448dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5458dd4bdcdSmrg }; 5468dd4bdcdSmrg 5478dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_xgene1[] = { 5488dd4bdcdSmrg { 5498dd4bdcdSmrg "crypto", false, false, 5508dd4bdcdSmrg { 5518dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5528dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5538dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5548dd4bdcdSmrg } 5558dd4bdcdSmrg }, 5568dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5578dd4bdcdSmrg }; 5588dd4bdcdSmrg 5598dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = { 5608dd4bdcdSmrg { 5618dd4bdcdSmrg "crypto", false, false, 5628dd4bdcdSmrg { 5638dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5648dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5658dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5668dd4bdcdSmrg } 5678dd4bdcdSmrg }, 5688dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5698dd4bdcdSmrg }; 5708dd4bdcdSmrg 5718dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = { 5728dd4bdcdSmrg { 5738dd4bdcdSmrg "crypto", false, false, 5748dd4bdcdSmrg { 5758dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5768dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5788dd4bdcdSmrg } 5798dd4bdcdSmrg }, 5808dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5818dd4bdcdSmrg }; 5828dd4bdcdSmrg 5838dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = { 5848dd4bdcdSmrg { 5858dd4bdcdSmrg "crypto", false, false, 5868dd4bdcdSmrg { 5878dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5888dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5898dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5908dd4bdcdSmrg } 5918dd4bdcdSmrg }, 5928dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5938dd4bdcdSmrg }; 5948dd4bdcdSmrg 5958dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = { 5968dd4bdcdSmrg { 5978dd4bdcdSmrg "crypto", false, false, 5988dd4bdcdSmrg { 5998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6008dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6018dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6028dd4bdcdSmrg } 6038dd4bdcdSmrg }, 6048dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6058dd4bdcdSmrg }; 6068dd4bdcdSmrg 6078dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa55[] = { 6088dd4bdcdSmrg { 6098dd4bdcdSmrg "crypto", false, false, 6108dd4bdcdSmrg { 6118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6128dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6138dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6148dd4bdcdSmrg } 6158dd4bdcdSmrg }, 6168dd4bdcdSmrg { 6178dd4bdcdSmrg "nofp", true, false, 6188dd4bdcdSmrg { 6198dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6208dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 6218dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 6228dd4bdcdSmrg } 6238dd4bdcdSmrg }, 6248dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6258dd4bdcdSmrg }; 6268dd4bdcdSmrg 6278dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa75[] = { 6288dd4bdcdSmrg { 6298dd4bdcdSmrg "crypto", false, false, 6308dd4bdcdSmrg { 6318dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6328dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6338dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6348dd4bdcdSmrg } 6358dd4bdcdSmrg }, 6368dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6378dd4bdcdSmrg }; 6388dd4bdcdSmrg 639*760c2415Smrg static const cpu_arch_extension cpu_opttab_cortexa76[] = { 640*760c2415Smrg { 641*760c2415Smrg "crypto", false, false, 642*760c2415Smrg { 643*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 644*760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 645*760c2415Smrg isa_bit_fp_dbl, isa_nobit 646*760c2415Smrg } 647*760c2415Smrg }, 648*760c2415Smrg { NULL, false, false, {isa_nobit}} 649*760c2415Smrg }; 650*760c2415Smrg 651*760c2415Smrg static const cpu_arch_extension cpu_opttab_neoversen1[] = { 652*760c2415Smrg { 653*760c2415Smrg "crypto", false, false, 654*760c2415Smrg { 655*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 656*760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 657*760c2415Smrg isa_bit_fp_dbl, isa_nobit 658*760c2415Smrg } 659*760c2415Smrg }, 660*760c2415Smrg { NULL, false, false, {isa_nobit}} 661*760c2415Smrg }; 662*760c2415Smrg 663*760c2415Smrg static const cpu_alias cpu_aliastab_neoversen1[] = { 664*760c2415Smrg { "ares", false}, 665*760c2415Smrg { NULL, false} 666*760c2415Smrg }; 667*760c2415Smrg 6688dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa75cortexa55[] = { 6698dd4bdcdSmrg { 6708dd4bdcdSmrg "crypto", false, false, 6718dd4bdcdSmrg { 6728dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6738dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6748dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6758dd4bdcdSmrg } 6768dd4bdcdSmrg }, 6778dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6788dd4bdcdSmrg }; 6798dd4bdcdSmrg 680*760c2415Smrg static const cpu_arch_extension cpu_opttab_cortexa76cortexa55[] = { 681*760c2415Smrg { 682*760c2415Smrg "crypto", false, false, 683*760c2415Smrg { 684*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 685*760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 686*760c2415Smrg isa_bit_fp_dbl, isa_nobit 687*760c2415Smrg } 688*760c2415Smrg }, 689*760c2415Smrg { NULL, false, false, {isa_nobit}} 690*760c2415Smrg }; 691*760c2415Smrg 6928dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm33[] = { 6938dd4bdcdSmrg { 6948dd4bdcdSmrg "nofp", true, false, 6958dd4bdcdSmrg { 6968dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6978dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 6988dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 6998dd4bdcdSmrg } 7008dd4bdcdSmrg }, 7018dd4bdcdSmrg { 7028dd4bdcdSmrg "nodsp", true, false, 7038dd4bdcdSmrg { 7048dd4bdcdSmrg isa_bit_armv7em, isa_nobit 7058dd4bdcdSmrg } 7068dd4bdcdSmrg }, 7078dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 7088dd4bdcdSmrg }; 7098dd4bdcdSmrg 7108dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr52[] = { 7118dd4bdcdSmrg { 7128dd4bdcdSmrg "nofp.dp", true, false, 7138dd4bdcdSmrg { 7148dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 7158dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 7168dd4bdcdSmrg } 7178dd4bdcdSmrg }, 7188dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 7198dd4bdcdSmrg }; 7208dd4bdcdSmrg 7218dd4bdcdSmrg const cpu_option all_cores[] = 7228dd4bdcdSmrg { 7238dd4bdcdSmrg { 7248dd4bdcdSmrg { 7258dd4bdcdSmrg "arm8", 7268dd4bdcdSmrg NULL, 7278dd4bdcdSmrg { 728*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 7298dd4bdcdSmrg } 7308dd4bdcdSmrg }, 731*760c2415Smrg NULL, 7328dd4bdcdSmrg TARGET_ARCH_armv4 7338dd4bdcdSmrg }, 7348dd4bdcdSmrg { 7358dd4bdcdSmrg { 7368dd4bdcdSmrg "arm810", 7378dd4bdcdSmrg NULL, 7388dd4bdcdSmrg { 739*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 7408dd4bdcdSmrg } 7418dd4bdcdSmrg }, 742*760c2415Smrg NULL, 7438dd4bdcdSmrg TARGET_ARCH_armv4 7448dd4bdcdSmrg }, 7458dd4bdcdSmrg { 7468dd4bdcdSmrg { 7478dd4bdcdSmrg "strongarm", 7488dd4bdcdSmrg NULL, 7498dd4bdcdSmrg { 750*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 7518dd4bdcdSmrg } 7528dd4bdcdSmrg }, 753*760c2415Smrg cpu_aliastab_strongarm, 7548dd4bdcdSmrg TARGET_ARCH_armv4 7558dd4bdcdSmrg }, 7568dd4bdcdSmrg { 7578dd4bdcdSmrg { 7588dd4bdcdSmrg "fa526", 7598dd4bdcdSmrg NULL, 7608dd4bdcdSmrg { 761*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 7628dd4bdcdSmrg } 7638dd4bdcdSmrg }, 764*760c2415Smrg NULL, 7658dd4bdcdSmrg TARGET_ARCH_armv4 7668dd4bdcdSmrg }, 7678dd4bdcdSmrg { 7688dd4bdcdSmrg { 7698dd4bdcdSmrg "fa626", 7708dd4bdcdSmrg NULL, 7718dd4bdcdSmrg { 772*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 7738dd4bdcdSmrg } 7748dd4bdcdSmrg }, 775*760c2415Smrg NULL, 7768dd4bdcdSmrg TARGET_ARCH_armv4 7778dd4bdcdSmrg }, 7788dd4bdcdSmrg { 7798dd4bdcdSmrg { 7808dd4bdcdSmrg "arm7tdmi", 7818dd4bdcdSmrg NULL, 7828dd4bdcdSmrg { 783*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 7848dd4bdcdSmrg } 7858dd4bdcdSmrg }, 786*760c2415Smrg cpu_aliastab_arm7tdmi, 7878dd4bdcdSmrg TARGET_ARCH_armv4t 7888dd4bdcdSmrg }, 7898dd4bdcdSmrg { 7908dd4bdcdSmrg { 7918dd4bdcdSmrg "arm710t", 7928dd4bdcdSmrg NULL, 7938dd4bdcdSmrg { 794*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 7958dd4bdcdSmrg } 7968dd4bdcdSmrg }, 797*760c2415Smrg cpu_aliastab_arm710t, 7988dd4bdcdSmrg TARGET_ARCH_armv4t 7998dd4bdcdSmrg }, 8008dd4bdcdSmrg { 8018dd4bdcdSmrg { 8028dd4bdcdSmrg "arm9", 8038dd4bdcdSmrg NULL, 8048dd4bdcdSmrg { 805*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 8068dd4bdcdSmrg } 8078dd4bdcdSmrg }, 808*760c2415Smrg NULL, 8098dd4bdcdSmrg TARGET_ARCH_armv4t 8108dd4bdcdSmrg }, 8118dd4bdcdSmrg { 8128dd4bdcdSmrg { 8138dd4bdcdSmrg "arm9tdmi", 8148dd4bdcdSmrg NULL, 8158dd4bdcdSmrg { 816*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 8178dd4bdcdSmrg } 8188dd4bdcdSmrg }, 8198dd4bdcdSmrg NULL, 8208dd4bdcdSmrg TARGET_ARCH_armv4t 8218dd4bdcdSmrg }, 8228dd4bdcdSmrg { 8238dd4bdcdSmrg { 8248dd4bdcdSmrg "arm920t", 8258dd4bdcdSmrg NULL, 8268dd4bdcdSmrg { 827*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 8288dd4bdcdSmrg } 8298dd4bdcdSmrg }, 830*760c2415Smrg cpu_aliastab_arm920t, 8318dd4bdcdSmrg TARGET_ARCH_armv4t 8328dd4bdcdSmrg }, 8338dd4bdcdSmrg { 8348dd4bdcdSmrg { 8358dd4bdcdSmrg "arm10tdmi", 8368dd4bdcdSmrg NULL, 8378dd4bdcdSmrg { 838*760c2415Smrg isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, 839*760c2415Smrg isa_nobit 8408dd4bdcdSmrg } 8418dd4bdcdSmrg }, 842*760c2415Smrg cpu_aliastab_arm10tdmi, 8438dd4bdcdSmrg TARGET_ARCH_armv5t 8448dd4bdcdSmrg }, 8458dd4bdcdSmrg { 8468dd4bdcdSmrg { 8478dd4bdcdSmrg "arm9e", 8488dd4bdcdSmrg cpu_opttab_arm9e, 8498dd4bdcdSmrg { 850*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 851*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 8528dd4bdcdSmrg } 8538dd4bdcdSmrg }, 854*760c2415Smrg cpu_aliastab_arm9e, 8558dd4bdcdSmrg TARGET_ARCH_armv5te 8568dd4bdcdSmrg }, 8578dd4bdcdSmrg { 8588dd4bdcdSmrg { 8598dd4bdcdSmrg "arm10e", 8608dd4bdcdSmrg cpu_opttab_arm10e, 8618dd4bdcdSmrg { 862*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 863*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 8648dd4bdcdSmrg } 8658dd4bdcdSmrg }, 866*760c2415Smrg cpu_aliastab_arm10e, 8678dd4bdcdSmrg TARGET_ARCH_armv5te 8688dd4bdcdSmrg }, 8698dd4bdcdSmrg { 8708dd4bdcdSmrg { 8718dd4bdcdSmrg "xscale", 8728dd4bdcdSmrg NULL, 8738dd4bdcdSmrg { 874*760c2415Smrg isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, isa_bit_armv5t, 875*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8768dd4bdcdSmrg } 8778dd4bdcdSmrg }, 878*760c2415Smrg NULL, 8798dd4bdcdSmrg TARGET_ARCH_armv5te 8808dd4bdcdSmrg }, 8818dd4bdcdSmrg { 8828dd4bdcdSmrg { 8838dd4bdcdSmrg "iwmmxt", 8848dd4bdcdSmrg NULL, 8858dd4bdcdSmrg { 886*760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 887*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit 8888dd4bdcdSmrg } 8898dd4bdcdSmrg }, 890*760c2415Smrg NULL, 8918dd4bdcdSmrg TARGET_ARCH_iwmmxt 8928dd4bdcdSmrg }, 8938dd4bdcdSmrg { 8948dd4bdcdSmrg { 8958dd4bdcdSmrg "iwmmxt2", 8968dd4bdcdSmrg NULL, 8978dd4bdcdSmrg { 898*760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 899*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm, 900*760c2415Smrg isa_nobit 9018dd4bdcdSmrg } 9028dd4bdcdSmrg }, 903*760c2415Smrg NULL, 9048dd4bdcdSmrg TARGET_ARCH_iwmmxt2 9058dd4bdcdSmrg }, 9068dd4bdcdSmrg { 9078dd4bdcdSmrg { 9088dd4bdcdSmrg "fa606te", 9098dd4bdcdSmrg NULL, 9108dd4bdcdSmrg { 911*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 912*760c2415Smrg isa_bit_notm, isa_nobit 9138dd4bdcdSmrg } 9148dd4bdcdSmrg }, 915*760c2415Smrg NULL, 9168dd4bdcdSmrg TARGET_ARCH_armv5te 9178dd4bdcdSmrg }, 9188dd4bdcdSmrg { 9198dd4bdcdSmrg { 9208dd4bdcdSmrg "fa626te", 9218dd4bdcdSmrg NULL, 9228dd4bdcdSmrg { 923*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 924*760c2415Smrg isa_bit_notm, isa_nobit 9258dd4bdcdSmrg } 9268dd4bdcdSmrg }, 927*760c2415Smrg NULL, 9288dd4bdcdSmrg TARGET_ARCH_armv5te 9298dd4bdcdSmrg }, 9308dd4bdcdSmrg { 9318dd4bdcdSmrg { 9328dd4bdcdSmrg "fmp626", 9338dd4bdcdSmrg NULL, 9348dd4bdcdSmrg { 935*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 936*760c2415Smrg isa_bit_notm, isa_nobit 9378dd4bdcdSmrg } 9388dd4bdcdSmrg }, 939*760c2415Smrg NULL, 9408dd4bdcdSmrg TARGET_ARCH_armv5te 9418dd4bdcdSmrg }, 9428dd4bdcdSmrg { 9438dd4bdcdSmrg { 9448dd4bdcdSmrg "fa726te", 9458dd4bdcdSmrg NULL, 9468dd4bdcdSmrg { 947*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 948*760c2415Smrg isa_bit_notm, isa_nobit 9498dd4bdcdSmrg } 9508dd4bdcdSmrg }, 951*760c2415Smrg NULL, 9528dd4bdcdSmrg TARGET_ARCH_armv5te 9538dd4bdcdSmrg }, 9548dd4bdcdSmrg { 9558dd4bdcdSmrg { 9568dd4bdcdSmrg "arm926ej-s", 9578dd4bdcdSmrg cpu_opttab_arm926ejs, 9588dd4bdcdSmrg { 959*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 960*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 9618dd4bdcdSmrg } 9628dd4bdcdSmrg }, 963*760c2415Smrg NULL, 9648dd4bdcdSmrg TARGET_ARCH_armv5tej 9658dd4bdcdSmrg }, 9668dd4bdcdSmrg { 9678dd4bdcdSmrg { 9688dd4bdcdSmrg "arm1026ej-s", 9698dd4bdcdSmrg cpu_opttab_arm1026ejs, 9708dd4bdcdSmrg { 971*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 972*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 9738dd4bdcdSmrg } 9748dd4bdcdSmrg }, 975*760c2415Smrg NULL, 9768dd4bdcdSmrg TARGET_ARCH_armv5tej 9778dd4bdcdSmrg }, 9788dd4bdcdSmrg { 9798dd4bdcdSmrg { 9808dd4bdcdSmrg "arm1136j-s", 9818dd4bdcdSmrg NULL, 9828dd4bdcdSmrg { 983*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 984*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 9858dd4bdcdSmrg } 9868dd4bdcdSmrg }, 987*760c2415Smrg NULL, 9888dd4bdcdSmrg TARGET_ARCH_armv6j 9898dd4bdcdSmrg }, 9908dd4bdcdSmrg { 9918dd4bdcdSmrg { 9928dd4bdcdSmrg "arm1136jf-s", 9938dd4bdcdSmrg NULL, 9948dd4bdcdSmrg { 995*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 996*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm, 997*760c2415Smrg isa_bit_fp_dbl, isa_nobit 9988dd4bdcdSmrg } 9998dd4bdcdSmrg }, 1000*760c2415Smrg NULL, 10018dd4bdcdSmrg TARGET_ARCH_armv6j 10028dd4bdcdSmrg }, 10038dd4bdcdSmrg { 10048dd4bdcdSmrg { 10058dd4bdcdSmrg "arm1176jz-s", 10068dd4bdcdSmrg NULL, 10078dd4bdcdSmrg { 1008*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1009*760c2415Smrg isa_bit_armv4, isa_bit_quirk_armv6kz, isa_bit_armv6, isa_bit_notm, 1010*760c2415Smrg isa_bit_armv6k, isa_nobit 10118dd4bdcdSmrg } 10128dd4bdcdSmrg }, 1013*760c2415Smrg NULL, 10148dd4bdcdSmrg TARGET_ARCH_armv6kz 10158dd4bdcdSmrg }, 10168dd4bdcdSmrg { 10178dd4bdcdSmrg { 10188dd4bdcdSmrg "arm1176jzf-s", 10198dd4bdcdSmrg NULL, 10208dd4bdcdSmrg { 1021*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1022*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_quirk_armv6kz, isa_bit_armv6, 1023*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 10248dd4bdcdSmrg } 10258dd4bdcdSmrg }, 1026*760c2415Smrg NULL, 10278dd4bdcdSmrg TARGET_ARCH_armv6kz 10288dd4bdcdSmrg }, 10298dd4bdcdSmrg { 10308dd4bdcdSmrg { 10318dd4bdcdSmrg "mpcorenovfp", 10328dd4bdcdSmrg NULL, 10338dd4bdcdSmrg { 1034*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1035*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k, 1036*760c2415Smrg isa_nobit 10378dd4bdcdSmrg } 10388dd4bdcdSmrg }, 1039*760c2415Smrg NULL, 10408dd4bdcdSmrg TARGET_ARCH_armv6k 10418dd4bdcdSmrg }, 10428dd4bdcdSmrg { 10438dd4bdcdSmrg { 10448dd4bdcdSmrg "mpcore", 10458dd4bdcdSmrg NULL, 10468dd4bdcdSmrg { 1047*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1048*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm, 1049*760c2415Smrg isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 10508dd4bdcdSmrg } 10518dd4bdcdSmrg }, 1052*760c2415Smrg NULL, 10538dd4bdcdSmrg TARGET_ARCH_armv6k 10548dd4bdcdSmrg }, 10558dd4bdcdSmrg { 10568dd4bdcdSmrg { 10578dd4bdcdSmrg "arm1156t2-s", 10588dd4bdcdSmrg NULL, 10598dd4bdcdSmrg { 1060*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1061*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm, 1062*760c2415Smrg isa_nobit 10638dd4bdcdSmrg } 10648dd4bdcdSmrg }, 1065*760c2415Smrg NULL, 10668dd4bdcdSmrg TARGET_ARCH_armv6t2 10678dd4bdcdSmrg }, 10688dd4bdcdSmrg { 10698dd4bdcdSmrg { 10708dd4bdcdSmrg "arm1156t2f-s", 10718dd4bdcdSmrg NULL, 10728dd4bdcdSmrg { 1073*760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1074*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, 1075*760c2415Smrg isa_bit_notm, isa_bit_fp_dbl, isa_nobit 10768dd4bdcdSmrg } 10778dd4bdcdSmrg }, 1078*760c2415Smrg NULL, 10798dd4bdcdSmrg TARGET_ARCH_armv6t2 10808dd4bdcdSmrg }, 10818dd4bdcdSmrg { 10828dd4bdcdSmrg { 10838dd4bdcdSmrg "cortex-m1", 10848dd4bdcdSmrg NULL, 10858dd4bdcdSmrg { 1086*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1087*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 10888dd4bdcdSmrg } 10898dd4bdcdSmrg }, 1090*760c2415Smrg NULL, 10918dd4bdcdSmrg TARGET_ARCH_armv6s_m 10928dd4bdcdSmrg }, 10938dd4bdcdSmrg { 10948dd4bdcdSmrg { 10958dd4bdcdSmrg "cortex-m0", 10968dd4bdcdSmrg NULL, 10978dd4bdcdSmrg { 1098*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1099*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 11008dd4bdcdSmrg } 11018dd4bdcdSmrg }, 1102*760c2415Smrg NULL, 11038dd4bdcdSmrg TARGET_ARCH_armv6s_m 11048dd4bdcdSmrg }, 11058dd4bdcdSmrg { 11068dd4bdcdSmrg { 11078dd4bdcdSmrg "cortex-m0plus", 11088dd4bdcdSmrg NULL, 11098dd4bdcdSmrg { 1110*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1111*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 11128dd4bdcdSmrg } 11138dd4bdcdSmrg }, 1114*760c2415Smrg NULL, 11158dd4bdcdSmrg TARGET_ARCH_armv6s_m 11168dd4bdcdSmrg }, 11178dd4bdcdSmrg { 11188dd4bdcdSmrg { 11198dd4bdcdSmrg "cortex-m1.small-multiply", 11208dd4bdcdSmrg NULL, 11218dd4bdcdSmrg { 1122*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1123*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 11248dd4bdcdSmrg } 11258dd4bdcdSmrg }, 1126*760c2415Smrg NULL, 11278dd4bdcdSmrg TARGET_ARCH_armv6s_m 11288dd4bdcdSmrg }, 11298dd4bdcdSmrg { 11308dd4bdcdSmrg { 11318dd4bdcdSmrg "cortex-m0.small-multiply", 11328dd4bdcdSmrg NULL, 11338dd4bdcdSmrg { 1134*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1135*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 11368dd4bdcdSmrg } 11378dd4bdcdSmrg }, 1138*760c2415Smrg NULL, 11398dd4bdcdSmrg TARGET_ARCH_armv6s_m 11408dd4bdcdSmrg }, 11418dd4bdcdSmrg { 11428dd4bdcdSmrg { 11438dd4bdcdSmrg "cortex-m0plus.small-multiply", 11448dd4bdcdSmrg NULL, 11458dd4bdcdSmrg { 1146*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1147*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 11488dd4bdcdSmrg } 11498dd4bdcdSmrg }, 1150*760c2415Smrg NULL, 11518dd4bdcdSmrg TARGET_ARCH_armv6s_m 11528dd4bdcdSmrg }, 11538dd4bdcdSmrg { 11548dd4bdcdSmrg { 11558dd4bdcdSmrg "generic-armv7-a", 11568dd4bdcdSmrg cpu_opttab_genericv7a, 11578dd4bdcdSmrg { 1158*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1159*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, 1160*760c2415Smrg isa_bit_armv7, isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, 1161*760c2415Smrg isa_bit_fp_dbl, isa_nobit 11628dd4bdcdSmrg } 11638dd4bdcdSmrg }, 1164*760c2415Smrg NULL, 11658dd4bdcdSmrg TARGET_ARCH_armv7_a 11668dd4bdcdSmrg }, 11678dd4bdcdSmrg { 11688dd4bdcdSmrg { 11698dd4bdcdSmrg "cortex-a5", 11708dd4bdcdSmrg cpu_opttab_cortexa5, 11718dd4bdcdSmrg { 1172*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1173*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1174*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1175*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1176*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 11778dd4bdcdSmrg } 11788dd4bdcdSmrg }, 1179*760c2415Smrg NULL, 11808dd4bdcdSmrg TARGET_ARCH_armv7_a 11818dd4bdcdSmrg }, 11828dd4bdcdSmrg { 11838dd4bdcdSmrg { 11848dd4bdcdSmrg "cortex-a7", 11858dd4bdcdSmrg cpu_opttab_cortexa7, 11868dd4bdcdSmrg { 11878dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1188*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1189*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1190*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1191*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1192*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 11938dd4bdcdSmrg } 11948dd4bdcdSmrg }, 1195*760c2415Smrg NULL, 11968dd4bdcdSmrg TARGET_ARCH_armv7ve 11978dd4bdcdSmrg }, 11988dd4bdcdSmrg { 11998dd4bdcdSmrg { 12008dd4bdcdSmrg "cortex-a8", 12018dd4bdcdSmrg cpu_opttab_cortexa8, 12028dd4bdcdSmrg { 1203*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1204*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1205*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1206*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_bit_sec, 1207*760c2415Smrg isa_nobit 12088dd4bdcdSmrg } 12098dd4bdcdSmrg }, 1210*760c2415Smrg NULL, 12118dd4bdcdSmrg TARGET_ARCH_armv7_a 12128dd4bdcdSmrg }, 12138dd4bdcdSmrg { 12148dd4bdcdSmrg { 12158dd4bdcdSmrg "cortex-a9", 12168dd4bdcdSmrg cpu_opttab_cortexa9, 12178dd4bdcdSmrg { 1218*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1219*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1220*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1221*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1222*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 12238dd4bdcdSmrg } 12248dd4bdcdSmrg }, 1225*760c2415Smrg NULL, 12268dd4bdcdSmrg TARGET_ARCH_armv7_a 12278dd4bdcdSmrg }, 12288dd4bdcdSmrg { 12298dd4bdcdSmrg { 12308dd4bdcdSmrg "cortex-a12", 12318dd4bdcdSmrg cpu_opttab_cortexa12, 12328dd4bdcdSmrg { 12338dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1234*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1235*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1236*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1237*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1238*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 12398dd4bdcdSmrg } 12408dd4bdcdSmrg }, 1241*760c2415Smrg NULL, 12428dd4bdcdSmrg TARGET_ARCH_armv7ve 12438dd4bdcdSmrg }, 12448dd4bdcdSmrg { 12458dd4bdcdSmrg { 12468dd4bdcdSmrg "cortex-a15", 12478dd4bdcdSmrg cpu_opttab_cortexa15, 12488dd4bdcdSmrg { 12498dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1250*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1251*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1252*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1253*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1254*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 12558dd4bdcdSmrg } 12568dd4bdcdSmrg }, 1257*760c2415Smrg NULL, 12588dd4bdcdSmrg TARGET_ARCH_armv7ve 12598dd4bdcdSmrg }, 12608dd4bdcdSmrg { 12618dd4bdcdSmrg { 12628dd4bdcdSmrg "cortex-a17", 12638dd4bdcdSmrg cpu_opttab_cortexa17, 12648dd4bdcdSmrg { 12658dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1266*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1267*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1268*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1269*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1270*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 12718dd4bdcdSmrg } 12728dd4bdcdSmrg }, 1273*760c2415Smrg NULL, 12748dd4bdcdSmrg TARGET_ARCH_armv7ve 12758dd4bdcdSmrg }, 12768dd4bdcdSmrg { 12778dd4bdcdSmrg { 12788dd4bdcdSmrg "cortex-r4", 12798dd4bdcdSmrg NULL, 12808dd4bdcdSmrg { 1281*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1282*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 1283*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit 12848dd4bdcdSmrg } 12858dd4bdcdSmrg }, 1286*760c2415Smrg NULL, 12878dd4bdcdSmrg TARGET_ARCH_armv7_r 12888dd4bdcdSmrg }, 12898dd4bdcdSmrg { 12908dd4bdcdSmrg { 12918dd4bdcdSmrg "cortex-r4f", 12928dd4bdcdSmrg NULL, 12938dd4bdcdSmrg { 1294*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1295*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, 1296*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, 1297*760c2415Smrg isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 12988dd4bdcdSmrg } 12998dd4bdcdSmrg }, 1300*760c2415Smrg NULL, 13018dd4bdcdSmrg TARGET_ARCH_armv7_r 13028dd4bdcdSmrg }, 13038dd4bdcdSmrg { 13048dd4bdcdSmrg { 13058dd4bdcdSmrg "cortex-r5", 13068dd4bdcdSmrg cpu_opttab_cortexr5, 13078dd4bdcdSmrg { 1308*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1309*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1310*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1311*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 13128dd4bdcdSmrg } 13138dd4bdcdSmrg }, 1314*760c2415Smrg NULL, 13158dd4bdcdSmrg TARGET_ARCH_armv7_r 13168dd4bdcdSmrg }, 13178dd4bdcdSmrg { 13188dd4bdcdSmrg { 13198dd4bdcdSmrg "cortex-r7", 13208dd4bdcdSmrg cpu_opttab_cortexr7, 13218dd4bdcdSmrg { 1322*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1323*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1324*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1325*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl, 1326*760c2415Smrg isa_nobit 13278dd4bdcdSmrg } 13288dd4bdcdSmrg }, 1329*760c2415Smrg NULL, 13308dd4bdcdSmrg TARGET_ARCH_armv7_r 13318dd4bdcdSmrg }, 13328dd4bdcdSmrg { 13338dd4bdcdSmrg { 13348dd4bdcdSmrg "cortex-r8", 13358dd4bdcdSmrg cpu_opttab_cortexr8, 13368dd4bdcdSmrg { 1337*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1338*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1339*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1340*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl, 1341*760c2415Smrg isa_nobit 13428dd4bdcdSmrg } 13438dd4bdcdSmrg }, 1344*760c2415Smrg NULL, 13458dd4bdcdSmrg TARGET_ARCH_armv7_r 13468dd4bdcdSmrg }, 13478dd4bdcdSmrg { 13488dd4bdcdSmrg { 13498dd4bdcdSmrg "cortex-m7", 13508dd4bdcdSmrg cpu_opttab_cortexm7, 13518dd4bdcdSmrg { 1352*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1353*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 13548dd4bdcdSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_fpv5, 1355*760c2415Smrg isa_bit_tdiv, isa_bit_quirk_no_volatile_ce, isa_bit_thumb2, isa_bit_fp16conv, 1356*760c2415Smrg isa_bit_fp_dbl, isa_nobit 13578dd4bdcdSmrg } 13588dd4bdcdSmrg }, 1359*760c2415Smrg NULL, 13608dd4bdcdSmrg TARGET_ARCH_armv7e_m 13618dd4bdcdSmrg }, 13628dd4bdcdSmrg { 13638dd4bdcdSmrg { 13648dd4bdcdSmrg "cortex-m4", 13658dd4bdcdSmrg cpu_opttab_cortexm4, 13668dd4bdcdSmrg { 1367*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1368*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 13698dd4bdcdSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_tdiv, 1370*760c2415Smrg isa_bit_thumb2, isa_bit_fp16conv, isa_nobit 13718dd4bdcdSmrg } 13728dd4bdcdSmrg }, 1373*760c2415Smrg NULL, 13748dd4bdcdSmrg TARGET_ARCH_armv7e_m 13758dd4bdcdSmrg }, 13768dd4bdcdSmrg { 13778dd4bdcdSmrg { 13788dd4bdcdSmrg "cortex-m3", 13798dd4bdcdSmrg NULL, 13808dd4bdcdSmrg { 1381*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_quirk_cm3_ldrd, isa_bit_be8, 1382*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, 1383*760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_nobit 13848dd4bdcdSmrg } 13858dd4bdcdSmrg }, 1386*760c2415Smrg NULL, 13878dd4bdcdSmrg TARGET_ARCH_armv7_m 13888dd4bdcdSmrg }, 13898dd4bdcdSmrg { 13908dd4bdcdSmrg { 13918dd4bdcdSmrg "marvell-pj4", 13928dd4bdcdSmrg NULL, 13938dd4bdcdSmrg { 1394*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1395*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, 1396*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec, 1397*760c2415Smrg isa_nobit 13988dd4bdcdSmrg } 13998dd4bdcdSmrg }, 1400*760c2415Smrg NULL, 14018dd4bdcdSmrg TARGET_ARCH_armv7_a 14028dd4bdcdSmrg }, 14038dd4bdcdSmrg { 14048dd4bdcdSmrg { 14058dd4bdcdSmrg "cortex-a15.cortex-a7", 14068dd4bdcdSmrg cpu_opttab_cortexa15cortexa7, 14078dd4bdcdSmrg { 14088dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1409*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1410*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1411*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1412*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1413*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 14148dd4bdcdSmrg } 14158dd4bdcdSmrg }, 1416*760c2415Smrg NULL, 14178dd4bdcdSmrg TARGET_ARCH_armv7ve 14188dd4bdcdSmrg }, 14198dd4bdcdSmrg { 14208dd4bdcdSmrg { 14218dd4bdcdSmrg "cortex-a17.cortex-a7", 14228dd4bdcdSmrg cpu_opttab_cortexa17cortexa7, 14238dd4bdcdSmrg { 14248dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1425*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1426*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1427*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1428*760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1429*760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 14308dd4bdcdSmrg } 14318dd4bdcdSmrg }, 1432*760c2415Smrg NULL, 14338dd4bdcdSmrg TARGET_ARCH_armv7ve 14348dd4bdcdSmrg }, 14358dd4bdcdSmrg { 14368dd4bdcdSmrg { 14378dd4bdcdSmrg "cortex-a32", 14388dd4bdcdSmrg cpu_opttab_cortexa32, 14398dd4bdcdSmrg { 14408dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1441*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1442*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 14438dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1444*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1445*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1446*760c2415Smrg isa_bit_sec, isa_nobit 14478dd4bdcdSmrg } 14488dd4bdcdSmrg }, 1449*760c2415Smrg NULL, 14508dd4bdcdSmrg TARGET_ARCH_armv8_a 14518dd4bdcdSmrg }, 14528dd4bdcdSmrg { 14538dd4bdcdSmrg { 14548dd4bdcdSmrg "cortex-a35", 14558dd4bdcdSmrg cpu_opttab_cortexa35, 14568dd4bdcdSmrg { 14578dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1458*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1459*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 14608dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1461*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1462*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1463*760c2415Smrg isa_bit_sec, isa_nobit 14648dd4bdcdSmrg } 14658dd4bdcdSmrg }, 1466*760c2415Smrg NULL, 14678dd4bdcdSmrg TARGET_ARCH_armv8_a 14688dd4bdcdSmrg }, 14698dd4bdcdSmrg { 14708dd4bdcdSmrg { 14718dd4bdcdSmrg "cortex-a53", 14728dd4bdcdSmrg cpu_opttab_cortexa53, 14738dd4bdcdSmrg { 14748dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1475*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1476*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 14778dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1478*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1479*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1480*760c2415Smrg isa_bit_sec, isa_nobit 14818dd4bdcdSmrg } 14828dd4bdcdSmrg }, 1483*760c2415Smrg NULL, 14848dd4bdcdSmrg TARGET_ARCH_armv8_a 14858dd4bdcdSmrg }, 14868dd4bdcdSmrg { 14878dd4bdcdSmrg { 14888dd4bdcdSmrg "cortex-a57", 14898dd4bdcdSmrg cpu_opttab_cortexa57, 14908dd4bdcdSmrg { 14918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1492*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1493*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 14948dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1495*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1496*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1497*760c2415Smrg isa_bit_sec, isa_nobit 14988dd4bdcdSmrg } 14998dd4bdcdSmrg }, 1500*760c2415Smrg NULL, 15018dd4bdcdSmrg TARGET_ARCH_armv8_a 15028dd4bdcdSmrg }, 15038dd4bdcdSmrg { 15048dd4bdcdSmrg { 15058dd4bdcdSmrg "cortex-a72", 15068dd4bdcdSmrg cpu_opttab_cortexa72, 15078dd4bdcdSmrg { 15088dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1509*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1510*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15118dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1512*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1513*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1514*760c2415Smrg isa_bit_sec, isa_nobit 15158dd4bdcdSmrg } 15168dd4bdcdSmrg }, 1517*760c2415Smrg NULL, 15188dd4bdcdSmrg TARGET_ARCH_armv8_a 15198dd4bdcdSmrg }, 15208dd4bdcdSmrg { 15218dd4bdcdSmrg { 15228dd4bdcdSmrg "cortex-a73", 15238dd4bdcdSmrg cpu_opttab_cortexa73, 15248dd4bdcdSmrg { 15258dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1526*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1527*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15288dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1529*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1530*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1531*760c2415Smrg isa_bit_sec, isa_nobit 15328dd4bdcdSmrg } 15338dd4bdcdSmrg }, 1534*760c2415Smrg NULL, 15358dd4bdcdSmrg TARGET_ARCH_armv8_a 15368dd4bdcdSmrg }, 15378dd4bdcdSmrg { 15388dd4bdcdSmrg { 15398dd4bdcdSmrg "exynos-m1", 15408dd4bdcdSmrg cpu_opttab_exynosm1, 15418dd4bdcdSmrg { 15428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1543*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1544*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15458dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1546*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1547*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1548*760c2415Smrg isa_bit_sec, isa_nobit 15498dd4bdcdSmrg } 15508dd4bdcdSmrg }, 1551*760c2415Smrg NULL, 15528dd4bdcdSmrg TARGET_ARCH_armv8_a 15538dd4bdcdSmrg }, 15548dd4bdcdSmrg { 15558dd4bdcdSmrg { 15568dd4bdcdSmrg "xgene1", 15578dd4bdcdSmrg cpu_opttab_xgene1, 15588dd4bdcdSmrg { 15598dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1560*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1561*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15628dd4bdcdSmrg isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, isa_bit_tdiv, 1563*760c2415Smrg isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, isa_bit_fp16conv, 1564*760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec, 1565*760c2415Smrg isa_nobit 15668dd4bdcdSmrg } 15678dd4bdcdSmrg }, 1568*760c2415Smrg NULL, 15698dd4bdcdSmrg TARGET_ARCH_armv8_a 15708dd4bdcdSmrg }, 15718dd4bdcdSmrg { 15728dd4bdcdSmrg { 15738dd4bdcdSmrg "cortex-a57.cortex-a53", 15748dd4bdcdSmrg cpu_opttab_cortexa57cortexa53, 15758dd4bdcdSmrg { 15768dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1577*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1578*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15798dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1580*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1581*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1582*760c2415Smrg isa_bit_sec, isa_nobit 15838dd4bdcdSmrg } 15848dd4bdcdSmrg }, 1585*760c2415Smrg NULL, 15868dd4bdcdSmrg TARGET_ARCH_armv8_a 15878dd4bdcdSmrg }, 15888dd4bdcdSmrg { 15898dd4bdcdSmrg { 15908dd4bdcdSmrg "cortex-a72.cortex-a53", 15918dd4bdcdSmrg cpu_opttab_cortexa72cortexa53, 15928dd4bdcdSmrg { 15938dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1594*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1595*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15968dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1597*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1598*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1599*760c2415Smrg isa_bit_sec, isa_nobit 16008dd4bdcdSmrg } 16018dd4bdcdSmrg }, 1602*760c2415Smrg NULL, 16038dd4bdcdSmrg TARGET_ARCH_armv8_a 16048dd4bdcdSmrg }, 16058dd4bdcdSmrg { 16068dd4bdcdSmrg { 16078dd4bdcdSmrg "cortex-a73.cortex-a35", 16088dd4bdcdSmrg cpu_opttab_cortexa73cortexa35, 16098dd4bdcdSmrg { 16108dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1611*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1612*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16138dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1614*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1615*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1616*760c2415Smrg isa_bit_sec, isa_nobit 16178dd4bdcdSmrg } 16188dd4bdcdSmrg }, 1619*760c2415Smrg NULL, 16208dd4bdcdSmrg TARGET_ARCH_armv8_a 16218dd4bdcdSmrg }, 16228dd4bdcdSmrg { 16238dd4bdcdSmrg { 16248dd4bdcdSmrg "cortex-a73.cortex-a53", 16258dd4bdcdSmrg cpu_opttab_cortexa73cortexa53, 16268dd4bdcdSmrg { 16278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1628*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1629*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16308dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1631*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1632*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1633*760c2415Smrg isa_bit_sec, isa_nobit 16348dd4bdcdSmrg } 16358dd4bdcdSmrg }, 1636*760c2415Smrg NULL, 16378dd4bdcdSmrg TARGET_ARCH_armv8_a 16388dd4bdcdSmrg }, 16398dd4bdcdSmrg { 16408dd4bdcdSmrg { 16418dd4bdcdSmrg "cortex-a55", 16428dd4bdcdSmrg cpu_opttab_cortexa55, 16438dd4bdcdSmrg { 16448dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1645*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1646*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1647*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1648*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1649*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1650*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1651*760c2415Smrg isa_bit_sec, isa_nobit 16528dd4bdcdSmrg } 16538dd4bdcdSmrg }, 1654*760c2415Smrg NULL, 16558dd4bdcdSmrg TARGET_ARCH_armv8_2_a 16568dd4bdcdSmrg }, 16578dd4bdcdSmrg { 16588dd4bdcdSmrg { 16598dd4bdcdSmrg "cortex-a75", 16608dd4bdcdSmrg cpu_opttab_cortexa75, 16618dd4bdcdSmrg { 16628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1663*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1664*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1665*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1666*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1667*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1668*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1669*760c2415Smrg isa_bit_sec, isa_nobit 16708dd4bdcdSmrg } 16718dd4bdcdSmrg }, 1672*760c2415Smrg NULL, 1673*760c2415Smrg TARGET_ARCH_armv8_2_a 1674*760c2415Smrg }, 1675*760c2415Smrg { 1676*760c2415Smrg { 1677*760c2415Smrg "cortex-a76", 1678*760c2415Smrg cpu_opttab_cortexa76, 1679*760c2415Smrg { 1680*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1681*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1682*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1683*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1684*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1685*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1686*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1687*760c2415Smrg isa_bit_sec, isa_nobit 1688*760c2415Smrg } 1689*760c2415Smrg }, 1690*760c2415Smrg NULL, 1691*760c2415Smrg TARGET_ARCH_armv8_2_a 1692*760c2415Smrg }, 1693*760c2415Smrg { 1694*760c2415Smrg { 1695*760c2415Smrg "neoverse-n1", 1696*760c2415Smrg cpu_opttab_neoversen1, 1697*760c2415Smrg { 1698*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1699*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1700*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1701*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1702*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1703*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1704*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1705*760c2415Smrg isa_bit_sec, isa_nobit 1706*760c2415Smrg } 1707*760c2415Smrg }, 1708*760c2415Smrg cpu_aliastab_neoversen1, 17098dd4bdcdSmrg TARGET_ARCH_armv8_2_a 17108dd4bdcdSmrg }, 17118dd4bdcdSmrg { 17128dd4bdcdSmrg { 17138dd4bdcdSmrg "cortex-a75.cortex-a55", 17148dd4bdcdSmrg cpu_opttab_cortexa75cortexa55, 17158dd4bdcdSmrg { 17168dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1717*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1718*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1719*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1720*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1721*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1722*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1723*760c2415Smrg isa_bit_sec, isa_nobit 17248dd4bdcdSmrg } 17258dd4bdcdSmrg }, 1726*760c2415Smrg NULL, 1727*760c2415Smrg TARGET_ARCH_armv8_2_a 1728*760c2415Smrg }, 1729*760c2415Smrg { 1730*760c2415Smrg { 1731*760c2415Smrg "cortex-a76.cortex-a55", 1732*760c2415Smrg cpu_opttab_cortexa76cortexa55, 1733*760c2415Smrg { 1734*760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1735*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1736*760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1737*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 1738*760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1739*760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1740*760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1741*760c2415Smrg isa_bit_sec, isa_nobit 1742*760c2415Smrg } 1743*760c2415Smrg }, 1744*760c2415Smrg NULL, 17458dd4bdcdSmrg TARGET_ARCH_armv8_2_a 17468dd4bdcdSmrg }, 17478dd4bdcdSmrg { 17488dd4bdcdSmrg { 17498dd4bdcdSmrg "cortex-m23", 17508dd4bdcdSmrg NULL, 17518dd4bdcdSmrg { 1752*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1753*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_cmse, isa_bit_armv8, 1754*760c2415Smrg isa_bit_tdiv, isa_nobit 17558dd4bdcdSmrg } 17568dd4bdcdSmrg }, 1757*760c2415Smrg NULL, 17588dd4bdcdSmrg TARGET_ARCH_armv8_m_base 17598dd4bdcdSmrg }, 17608dd4bdcdSmrg { 17618dd4bdcdSmrg { 17628dd4bdcdSmrg "cortex-m33", 17638dd4bdcdSmrg cpu_opttab_cortexm33, 17648dd4bdcdSmrg { 1765*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1766*760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1767*760c2415Smrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_cmse, 1768*760c2415Smrg isa_bit_armv8, isa_bit_fpv5, isa_bit_tdiv, isa_bit_thumb2, 1769*760c2415Smrg isa_bit_fp16conv, isa_nobit 17708dd4bdcdSmrg } 17718dd4bdcdSmrg }, 1772*760c2415Smrg NULL, 17738dd4bdcdSmrg TARGET_ARCH_armv8_m_main 17748dd4bdcdSmrg }, 17758dd4bdcdSmrg { 17768dd4bdcdSmrg { 17778dd4bdcdSmrg "cortex-r52", 17788dd4bdcdSmrg cpu_opttab_cortexr52, 17798dd4bdcdSmrg { 17808dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1781*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1782*760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 17838dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1784*760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1785*760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1786*760c2415Smrg isa_bit_sec, isa_nobit 17878dd4bdcdSmrg } 17888dd4bdcdSmrg }, 1789*760c2415Smrg NULL, 17908dd4bdcdSmrg TARGET_ARCH_armv8_r 17918dd4bdcdSmrg }, 1792*760c2415Smrg {{NULL, NULL, {isa_nobit}}, NULL, TARGET_ARCH_arm_none} 17938dd4bdcdSmrg }; 17948dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv5te[] = { 17958dd4bdcdSmrg { 17968dd4bdcdSmrg "fp", false, false, 17978dd4bdcdSmrg { 17988dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 17998dd4bdcdSmrg } 18008dd4bdcdSmrg }, 18018dd4bdcdSmrg { 18028dd4bdcdSmrg "nofp", true, false, 18038dd4bdcdSmrg { 18048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 18058dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 18068dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 18078dd4bdcdSmrg } 18088dd4bdcdSmrg }, 18098dd4bdcdSmrg { 18108dd4bdcdSmrg "vfpv2", false, true, 18118dd4bdcdSmrg { 18128dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18138dd4bdcdSmrg } 18148dd4bdcdSmrg }, 18158dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 18168dd4bdcdSmrg }; 18178dd4bdcdSmrg 18188dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv5tej[] = { 18198dd4bdcdSmrg { 18208dd4bdcdSmrg "fp", false, false, 18218dd4bdcdSmrg { 18228dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18238dd4bdcdSmrg } 18248dd4bdcdSmrg }, 18258dd4bdcdSmrg { 18268dd4bdcdSmrg "nofp", true, false, 18278dd4bdcdSmrg { 18288dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 18298dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 18308dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 18318dd4bdcdSmrg } 18328dd4bdcdSmrg }, 18338dd4bdcdSmrg { 18348dd4bdcdSmrg "vfpv2", false, true, 18358dd4bdcdSmrg { 18368dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18378dd4bdcdSmrg } 18388dd4bdcdSmrg }, 18398dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 18408dd4bdcdSmrg }; 18418dd4bdcdSmrg 18428dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6[] = { 18438dd4bdcdSmrg { 18448dd4bdcdSmrg "fp", false, false, 18458dd4bdcdSmrg { 18468dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18478dd4bdcdSmrg } 18488dd4bdcdSmrg }, 18498dd4bdcdSmrg { 18508dd4bdcdSmrg "nofp", true, false, 18518dd4bdcdSmrg { 18528dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 18538dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 18548dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 18558dd4bdcdSmrg } 18568dd4bdcdSmrg }, 18578dd4bdcdSmrg { 18588dd4bdcdSmrg "vfpv2", false, true, 18598dd4bdcdSmrg { 18608dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18618dd4bdcdSmrg } 18628dd4bdcdSmrg }, 18638dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 18648dd4bdcdSmrg }; 18658dd4bdcdSmrg 18668dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6j[] = { 18678dd4bdcdSmrg { 18688dd4bdcdSmrg "fp", false, false, 18698dd4bdcdSmrg { 18708dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18718dd4bdcdSmrg } 18728dd4bdcdSmrg }, 18738dd4bdcdSmrg { 18748dd4bdcdSmrg "nofp", true, false, 18758dd4bdcdSmrg { 18768dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 18778dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 18788dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 18798dd4bdcdSmrg } 18808dd4bdcdSmrg }, 18818dd4bdcdSmrg { 18828dd4bdcdSmrg "vfpv2", false, true, 18838dd4bdcdSmrg { 18848dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18858dd4bdcdSmrg } 18868dd4bdcdSmrg }, 18878dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 18888dd4bdcdSmrg }; 18898dd4bdcdSmrg 18908dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6k[] = { 18918dd4bdcdSmrg { 18928dd4bdcdSmrg "fp", false, false, 18938dd4bdcdSmrg { 18948dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 18958dd4bdcdSmrg } 18968dd4bdcdSmrg }, 18978dd4bdcdSmrg { 18988dd4bdcdSmrg "nofp", true, false, 18998dd4bdcdSmrg { 19008dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 19018dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 19028dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 19038dd4bdcdSmrg } 19048dd4bdcdSmrg }, 19058dd4bdcdSmrg { 19068dd4bdcdSmrg "vfpv2", false, true, 19078dd4bdcdSmrg { 19088dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19098dd4bdcdSmrg } 19108dd4bdcdSmrg }, 19118dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 19128dd4bdcdSmrg }; 19138dd4bdcdSmrg 19148dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6z[] = { 19158dd4bdcdSmrg { 19168dd4bdcdSmrg "fp", false, false, 19178dd4bdcdSmrg { 19188dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19198dd4bdcdSmrg } 19208dd4bdcdSmrg }, 19218dd4bdcdSmrg { 19228dd4bdcdSmrg "nofp", true, false, 19238dd4bdcdSmrg { 19248dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 19258dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 19268dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 19278dd4bdcdSmrg } 19288dd4bdcdSmrg }, 19298dd4bdcdSmrg { 19308dd4bdcdSmrg "vfpv2", false, true, 19318dd4bdcdSmrg { 19328dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19338dd4bdcdSmrg } 19348dd4bdcdSmrg }, 19358dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 19368dd4bdcdSmrg }; 19378dd4bdcdSmrg 19388dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6kz[] = { 19398dd4bdcdSmrg { 19408dd4bdcdSmrg "fp", false, false, 19418dd4bdcdSmrg { 19428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19438dd4bdcdSmrg } 19448dd4bdcdSmrg }, 19458dd4bdcdSmrg { 19468dd4bdcdSmrg "nofp", true, false, 19478dd4bdcdSmrg { 19488dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 19498dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 19508dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 19518dd4bdcdSmrg } 19528dd4bdcdSmrg }, 19538dd4bdcdSmrg { 19548dd4bdcdSmrg "vfpv2", false, true, 19558dd4bdcdSmrg { 19568dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19578dd4bdcdSmrg } 19588dd4bdcdSmrg }, 19598dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 19608dd4bdcdSmrg }; 19618dd4bdcdSmrg 19628dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6zk[] = { 19638dd4bdcdSmrg { 19648dd4bdcdSmrg "fp", false, false, 19658dd4bdcdSmrg { 19668dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19678dd4bdcdSmrg } 19688dd4bdcdSmrg }, 19698dd4bdcdSmrg { 19708dd4bdcdSmrg "nofp", true, false, 19718dd4bdcdSmrg { 19728dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 19738dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 19748dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 19758dd4bdcdSmrg } 19768dd4bdcdSmrg }, 19778dd4bdcdSmrg { 19788dd4bdcdSmrg "vfpv2", false, true, 19798dd4bdcdSmrg { 19808dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19818dd4bdcdSmrg } 19828dd4bdcdSmrg }, 19838dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 19848dd4bdcdSmrg }; 19858dd4bdcdSmrg 19868dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6t2[] = { 19878dd4bdcdSmrg { 19888dd4bdcdSmrg "fp", false, false, 19898dd4bdcdSmrg { 19908dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 19918dd4bdcdSmrg } 19928dd4bdcdSmrg }, 19938dd4bdcdSmrg { 19948dd4bdcdSmrg "nofp", true, false, 19958dd4bdcdSmrg { 19968dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 19978dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 19988dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 19998dd4bdcdSmrg } 20008dd4bdcdSmrg }, 20018dd4bdcdSmrg { 20028dd4bdcdSmrg "vfpv2", false, true, 20038dd4bdcdSmrg { 20048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20058dd4bdcdSmrg } 20068dd4bdcdSmrg }, 20078dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 20088dd4bdcdSmrg }; 20098dd4bdcdSmrg 20108dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7[] = { 20118dd4bdcdSmrg { 20128dd4bdcdSmrg "fp", false, false, 20138dd4bdcdSmrg { 20148dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 20158dd4bdcdSmrg } 20168dd4bdcdSmrg }, 20178dd4bdcdSmrg { 20188dd4bdcdSmrg "nofp", true, false, 20198dd4bdcdSmrg { 20208dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 20218dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 20228dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 20238dd4bdcdSmrg } 20248dd4bdcdSmrg }, 20258dd4bdcdSmrg { 20268dd4bdcdSmrg "vfpv3-d16", false, true, 20278dd4bdcdSmrg { 20288dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 20298dd4bdcdSmrg } 20308dd4bdcdSmrg }, 20318dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 20328dd4bdcdSmrg }; 20338dd4bdcdSmrg 20348dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7_a[] = { 20358dd4bdcdSmrg { 20368dd4bdcdSmrg "mp", false, false, 20378dd4bdcdSmrg { 20388dd4bdcdSmrg isa_bit_mp, isa_nobit 20398dd4bdcdSmrg } 20408dd4bdcdSmrg }, 20418dd4bdcdSmrg { 20428dd4bdcdSmrg "sec", false, false, 20438dd4bdcdSmrg { 20448dd4bdcdSmrg isa_bit_sec, isa_nobit 20458dd4bdcdSmrg } 20468dd4bdcdSmrg }, 20478dd4bdcdSmrg { 20488dd4bdcdSmrg "fp", false, false, 20498dd4bdcdSmrg { 20508dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 20518dd4bdcdSmrg } 20528dd4bdcdSmrg }, 20538dd4bdcdSmrg { 20548dd4bdcdSmrg "vfpv3", false, false, 20558dd4bdcdSmrg { 20568dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 20578dd4bdcdSmrg isa_nobit 20588dd4bdcdSmrg } 20598dd4bdcdSmrg }, 20608dd4bdcdSmrg { 20618dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 20628dd4bdcdSmrg { 20638dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 20648dd4bdcdSmrg isa_nobit 20658dd4bdcdSmrg } 20668dd4bdcdSmrg }, 20678dd4bdcdSmrg { 20688dd4bdcdSmrg "vfpv3-fp16", false, false, 20698dd4bdcdSmrg { 20708dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 20718dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 20728dd4bdcdSmrg } 20738dd4bdcdSmrg }, 20748dd4bdcdSmrg { 20758dd4bdcdSmrg "vfpv4-d16", false, false, 20768dd4bdcdSmrg { 20778dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 20788dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 20798dd4bdcdSmrg } 20808dd4bdcdSmrg }, 20818dd4bdcdSmrg { 20828dd4bdcdSmrg "vfpv4", false, false, 20838dd4bdcdSmrg { 20848dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 20858dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 20868dd4bdcdSmrg } 20878dd4bdcdSmrg }, 20888dd4bdcdSmrg { 20898dd4bdcdSmrg "simd", false, false, 20908dd4bdcdSmrg { 20918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 20928dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 20938dd4bdcdSmrg } 20948dd4bdcdSmrg }, 20958dd4bdcdSmrg { 20968dd4bdcdSmrg "neon-fp16", false, false, 20978dd4bdcdSmrg { 20988dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 20998dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 21008dd4bdcdSmrg } 21018dd4bdcdSmrg }, 21028dd4bdcdSmrg { 21038dd4bdcdSmrg "neon-vfpv4", false, false, 21048dd4bdcdSmrg { 21058dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 21068dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 21078dd4bdcdSmrg } 21088dd4bdcdSmrg }, 21098dd4bdcdSmrg { 21108dd4bdcdSmrg "nosimd", true, false, 21118dd4bdcdSmrg { 21128dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 21138dd4bdcdSmrg isa_bit_crypto, isa_nobit 21148dd4bdcdSmrg } 21158dd4bdcdSmrg }, 21168dd4bdcdSmrg { 21178dd4bdcdSmrg "nofp", true, false, 21188dd4bdcdSmrg { 21198dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 21208dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 21218dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 21228dd4bdcdSmrg } 21238dd4bdcdSmrg }, 21248dd4bdcdSmrg { 21258dd4bdcdSmrg "vfpv3-d16", false, true, 21268dd4bdcdSmrg { 21278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 21288dd4bdcdSmrg } 21298dd4bdcdSmrg }, 21308dd4bdcdSmrg { 21318dd4bdcdSmrg "neon", false, true, 21328dd4bdcdSmrg { 21338dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 21348dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 21358dd4bdcdSmrg } 21368dd4bdcdSmrg }, 21378dd4bdcdSmrg { 21388dd4bdcdSmrg "neon-vfpv3", false, true, 21398dd4bdcdSmrg { 21408dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 21418dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 21428dd4bdcdSmrg } 21438dd4bdcdSmrg }, 21448dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 21458dd4bdcdSmrg }; 21468dd4bdcdSmrg 21478dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7ve[] = { 21488dd4bdcdSmrg { 21498dd4bdcdSmrg "vfpv3-d16", false, false, 21508dd4bdcdSmrg { 21518dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 21528dd4bdcdSmrg } 21538dd4bdcdSmrg }, 21548dd4bdcdSmrg { 21558dd4bdcdSmrg "vfpv3", false, false, 21568dd4bdcdSmrg { 21578dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 21588dd4bdcdSmrg isa_nobit 21598dd4bdcdSmrg } 21608dd4bdcdSmrg }, 21618dd4bdcdSmrg { 21628dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 21638dd4bdcdSmrg { 21648dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 21658dd4bdcdSmrg isa_nobit 21668dd4bdcdSmrg } 21678dd4bdcdSmrg }, 21688dd4bdcdSmrg { 21698dd4bdcdSmrg "vfpv3-fp16", false, false, 21708dd4bdcdSmrg { 21718dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 21728dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 21738dd4bdcdSmrg } 21748dd4bdcdSmrg }, 21758dd4bdcdSmrg { 21768dd4bdcdSmrg "fp", false, false, 21778dd4bdcdSmrg { 21788dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 21798dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 21808dd4bdcdSmrg } 21818dd4bdcdSmrg }, 21828dd4bdcdSmrg { 21838dd4bdcdSmrg "vfpv4", false, false, 21848dd4bdcdSmrg { 21858dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 21868dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 21878dd4bdcdSmrg } 21888dd4bdcdSmrg }, 21898dd4bdcdSmrg { 21908dd4bdcdSmrg "neon", false, false, 21918dd4bdcdSmrg { 21928dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 21938dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 21948dd4bdcdSmrg } 21958dd4bdcdSmrg }, 21968dd4bdcdSmrg { 21978dd4bdcdSmrg "neon-fp16", false, false, 21988dd4bdcdSmrg { 21998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 22008dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 22018dd4bdcdSmrg } 22028dd4bdcdSmrg }, 22038dd4bdcdSmrg { 22048dd4bdcdSmrg "simd", false, false, 22058dd4bdcdSmrg { 22068dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 22078dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 22088dd4bdcdSmrg } 22098dd4bdcdSmrg }, 22108dd4bdcdSmrg { 22118dd4bdcdSmrg "nosimd", true, false, 22128dd4bdcdSmrg { 22138dd4bdcdSmrg isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32, 22148dd4bdcdSmrg isa_bit_crypto, isa_nobit 22158dd4bdcdSmrg } 22168dd4bdcdSmrg }, 22178dd4bdcdSmrg { 22188dd4bdcdSmrg "nofp", true, false, 22198dd4bdcdSmrg { 22208dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 22218dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 22228dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 22238dd4bdcdSmrg } 22248dd4bdcdSmrg }, 22258dd4bdcdSmrg { 22268dd4bdcdSmrg "vfpv4-d16", false, true, 22278dd4bdcdSmrg { 22288dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 22298dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 22308dd4bdcdSmrg } 22318dd4bdcdSmrg }, 22328dd4bdcdSmrg { 22338dd4bdcdSmrg "neon-vfpv3", false, true, 22348dd4bdcdSmrg { 22358dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 22368dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 22378dd4bdcdSmrg } 22388dd4bdcdSmrg }, 22398dd4bdcdSmrg { 22408dd4bdcdSmrg "neon-vfpv4", false, true, 22418dd4bdcdSmrg { 22428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 22438dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 22448dd4bdcdSmrg } 22458dd4bdcdSmrg }, 22468dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 22478dd4bdcdSmrg }; 22488dd4bdcdSmrg 22498dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7_r[] = { 22508dd4bdcdSmrg { 22518dd4bdcdSmrg "fp.sp", false, false, 22528dd4bdcdSmrg { 22538dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 22548dd4bdcdSmrg } 22558dd4bdcdSmrg }, 22568dd4bdcdSmrg { 22578dd4bdcdSmrg "fp", false, false, 22588dd4bdcdSmrg { 22598dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 22608dd4bdcdSmrg } 22618dd4bdcdSmrg }, 22628dd4bdcdSmrg { 22638dd4bdcdSmrg "vfpv3xd-fp16", false, false, 22648dd4bdcdSmrg { 22658dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit 22668dd4bdcdSmrg } 22678dd4bdcdSmrg }, 22688dd4bdcdSmrg { 22698dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 22708dd4bdcdSmrg { 22718dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 22728dd4bdcdSmrg isa_nobit 22738dd4bdcdSmrg } 22748dd4bdcdSmrg }, 22758dd4bdcdSmrg { 22768dd4bdcdSmrg "idiv", false, false, 22778dd4bdcdSmrg { 22788dd4bdcdSmrg isa_bit_adiv, isa_nobit 22798dd4bdcdSmrg } 22808dd4bdcdSmrg }, 22818dd4bdcdSmrg { 22828dd4bdcdSmrg "nofp", true, false, 22838dd4bdcdSmrg { 22848dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 22858dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 22868dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 22878dd4bdcdSmrg } 22888dd4bdcdSmrg }, 22898dd4bdcdSmrg { 22908dd4bdcdSmrg "noidiv", true, false, 22918dd4bdcdSmrg { 22928dd4bdcdSmrg isa_bit_adiv, isa_nobit 22938dd4bdcdSmrg } 22948dd4bdcdSmrg }, 22958dd4bdcdSmrg { 22968dd4bdcdSmrg "vfpv3xd", false, true, 22978dd4bdcdSmrg { 22988dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 22998dd4bdcdSmrg } 23008dd4bdcdSmrg }, 23018dd4bdcdSmrg { 23028dd4bdcdSmrg "vfpv3-d16", false, true, 23038dd4bdcdSmrg { 23048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 23058dd4bdcdSmrg } 23068dd4bdcdSmrg }, 23078dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 23088dd4bdcdSmrg }; 23098dd4bdcdSmrg 23108dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7e_m[] = { 23118dd4bdcdSmrg { 23128dd4bdcdSmrg "fp", false, false, 23138dd4bdcdSmrg { 23148dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 23158dd4bdcdSmrg isa_nobit 23168dd4bdcdSmrg } 23178dd4bdcdSmrg }, 23188dd4bdcdSmrg { 23198dd4bdcdSmrg "fpv5", false, false, 23208dd4bdcdSmrg { 23218dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 23228dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 23238dd4bdcdSmrg } 23248dd4bdcdSmrg }, 23258dd4bdcdSmrg { 23268dd4bdcdSmrg "fp.dp", false, false, 23278dd4bdcdSmrg { 23288dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 23298dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 23308dd4bdcdSmrg } 23318dd4bdcdSmrg }, 23328dd4bdcdSmrg { 23338dd4bdcdSmrg "nofp", true, false, 23348dd4bdcdSmrg { 23358dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 23368dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 23378dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 23388dd4bdcdSmrg } 23398dd4bdcdSmrg }, 23408dd4bdcdSmrg { 23418dd4bdcdSmrg "vfpv4-sp-d16", false, true, 23428dd4bdcdSmrg { 23438dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 23448dd4bdcdSmrg isa_nobit 23458dd4bdcdSmrg } 23468dd4bdcdSmrg }, 23478dd4bdcdSmrg { 23488dd4bdcdSmrg "fpv5-d16", false, true, 23498dd4bdcdSmrg { 23508dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 23518dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 23528dd4bdcdSmrg } 23538dd4bdcdSmrg }, 23548dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 23558dd4bdcdSmrg }; 23568dd4bdcdSmrg 23578dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_a[] = { 23588dd4bdcdSmrg { 23598dd4bdcdSmrg "crc", false, false, 23608dd4bdcdSmrg { 23618dd4bdcdSmrg isa_bit_crc32, isa_nobit 23628dd4bdcdSmrg } 23638dd4bdcdSmrg }, 23648dd4bdcdSmrg { 23658dd4bdcdSmrg "simd", false, false, 23668dd4bdcdSmrg { 23678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 23688dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 23698dd4bdcdSmrg isa_nobit 23708dd4bdcdSmrg } 23718dd4bdcdSmrg }, 23728dd4bdcdSmrg { 23738dd4bdcdSmrg "crypto", false, false, 23748dd4bdcdSmrg { 23758dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 23768dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 23778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23788dd4bdcdSmrg } 23798dd4bdcdSmrg }, 23808dd4bdcdSmrg { 23818dd4bdcdSmrg "nocrypto", true, false, 23828dd4bdcdSmrg { 23838dd4bdcdSmrg isa_bit_crypto, isa_nobit 23848dd4bdcdSmrg } 23858dd4bdcdSmrg }, 23868dd4bdcdSmrg { 23878dd4bdcdSmrg "nofp", true, false, 23888dd4bdcdSmrg { 23898dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 23908dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 23918dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 23928dd4bdcdSmrg } 23938dd4bdcdSmrg }, 2394*760c2415Smrg { 2395*760c2415Smrg "sb", false, false, 2396*760c2415Smrg { 2397*760c2415Smrg isa_bit_sb, isa_nobit 2398*760c2415Smrg } 2399*760c2415Smrg }, 2400*760c2415Smrg { 2401*760c2415Smrg "predres", false, false, 2402*760c2415Smrg { 2403*760c2415Smrg isa_bit_predres, isa_nobit 2404*760c2415Smrg } 2405*760c2415Smrg }, 24068dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 24078dd4bdcdSmrg }; 24088dd4bdcdSmrg 24098dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = { 24108dd4bdcdSmrg { 24118dd4bdcdSmrg "simd", false, false, 24128dd4bdcdSmrg { 24138dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24148dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 24158dd4bdcdSmrg isa_nobit 24168dd4bdcdSmrg } 24178dd4bdcdSmrg }, 24188dd4bdcdSmrg { 24198dd4bdcdSmrg "crypto", false, false, 24208dd4bdcdSmrg { 24218dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24228dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 24238dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24248dd4bdcdSmrg } 24258dd4bdcdSmrg }, 24268dd4bdcdSmrg { 24278dd4bdcdSmrg "nocrypto", true, false, 24288dd4bdcdSmrg { 24298dd4bdcdSmrg isa_bit_crypto, isa_nobit 24308dd4bdcdSmrg } 24318dd4bdcdSmrg }, 24328dd4bdcdSmrg { 24338dd4bdcdSmrg "nofp", true, false, 24348dd4bdcdSmrg { 24358dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24368dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 24378dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 24388dd4bdcdSmrg } 24398dd4bdcdSmrg }, 2440*760c2415Smrg { 2441*760c2415Smrg "sb", false, false, 2442*760c2415Smrg { 2443*760c2415Smrg isa_bit_sb, isa_nobit 2444*760c2415Smrg } 2445*760c2415Smrg }, 2446*760c2415Smrg { 2447*760c2415Smrg "predres", false, false, 2448*760c2415Smrg { 2449*760c2415Smrg isa_bit_predres, isa_nobit 2450*760c2415Smrg } 2451*760c2415Smrg }, 24528dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 24538dd4bdcdSmrg }; 24548dd4bdcdSmrg 24558dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = { 24568dd4bdcdSmrg { 24578dd4bdcdSmrg "simd", false, false, 24588dd4bdcdSmrg { 24598dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 24618dd4bdcdSmrg isa_nobit 24628dd4bdcdSmrg } 24638dd4bdcdSmrg }, 24648dd4bdcdSmrg { 24658dd4bdcdSmrg "fp16", false, false, 24668dd4bdcdSmrg { 24678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24688dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 24698dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24708dd4bdcdSmrg } 24718dd4bdcdSmrg }, 24728dd4bdcdSmrg { 24738dd4bdcdSmrg "fp16fml", false, false, 24748dd4bdcdSmrg { 24758dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 24768dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, 24778dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 24788dd4bdcdSmrg } 24798dd4bdcdSmrg }, 24808dd4bdcdSmrg { 24818dd4bdcdSmrg "crypto", false, false, 24828dd4bdcdSmrg { 24838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24848dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 24858dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24868dd4bdcdSmrg } 24878dd4bdcdSmrg }, 24888dd4bdcdSmrg { 24898dd4bdcdSmrg "nocrypto", true, false, 24908dd4bdcdSmrg { 24918dd4bdcdSmrg isa_bit_crypto, isa_nobit 24928dd4bdcdSmrg } 24938dd4bdcdSmrg }, 24948dd4bdcdSmrg { 24958dd4bdcdSmrg "nofp", true, false, 24968dd4bdcdSmrg { 24978dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24988dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 24998dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 25008dd4bdcdSmrg } 25018dd4bdcdSmrg }, 25028dd4bdcdSmrg { 25038dd4bdcdSmrg "dotprod", false, false, 25048dd4bdcdSmrg { 25058dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 25068dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 25078dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 25088dd4bdcdSmrg } 25098dd4bdcdSmrg }, 2510*760c2415Smrg { 2511*760c2415Smrg "sb", false, false, 2512*760c2415Smrg { 2513*760c2415Smrg isa_bit_sb, isa_nobit 2514*760c2415Smrg } 2515*760c2415Smrg }, 2516*760c2415Smrg { 2517*760c2415Smrg "predres", false, false, 2518*760c2415Smrg { 2519*760c2415Smrg isa_bit_predres, isa_nobit 2520*760c2415Smrg } 2521*760c2415Smrg }, 25228dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 25238dd4bdcdSmrg }; 25248dd4bdcdSmrg 25258dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_3_a[] = { 25268dd4bdcdSmrg { 25278dd4bdcdSmrg "simd", false, false, 25288dd4bdcdSmrg { 25298dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 25308dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 25318dd4bdcdSmrg isa_nobit 25328dd4bdcdSmrg } 25338dd4bdcdSmrg }, 25348dd4bdcdSmrg { 25358dd4bdcdSmrg "fp16", false, false, 25368dd4bdcdSmrg { 25378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 25388dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 25398dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 25408dd4bdcdSmrg } 25418dd4bdcdSmrg }, 25428dd4bdcdSmrg { 25438dd4bdcdSmrg "fp16fml", false, false, 25448dd4bdcdSmrg { 25458dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 25468dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, 25478dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 25488dd4bdcdSmrg } 25498dd4bdcdSmrg }, 25508dd4bdcdSmrg { 25518dd4bdcdSmrg "crypto", false, false, 25528dd4bdcdSmrg { 25538dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 25548dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 25558dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 25568dd4bdcdSmrg } 25578dd4bdcdSmrg }, 25588dd4bdcdSmrg { 25598dd4bdcdSmrg "nocrypto", true, false, 25608dd4bdcdSmrg { 25618dd4bdcdSmrg isa_bit_crypto, isa_nobit 25628dd4bdcdSmrg } 25638dd4bdcdSmrg }, 25648dd4bdcdSmrg { 25658dd4bdcdSmrg "nofp", true, false, 25668dd4bdcdSmrg { 25678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 25688dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 25698dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 25708dd4bdcdSmrg } 25718dd4bdcdSmrg }, 25728dd4bdcdSmrg { 25738dd4bdcdSmrg "dotprod", false, false, 25748dd4bdcdSmrg { 25758dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 25768dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 25778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 25788dd4bdcdSmrg } 25798dd4bdcdSmrg }, 2580*760c2415Smrg { 2581*760c2415Smrg "sb", false, false, 2582*760c2415Smrg { 2583*760c2415Smrg isa_bit_sb, isa_nobit 2584*760c2415Smrg } 2585*760c2415Smrg }, 2586*760c2415Smrg { 2587*760c2415Smrg "predres", false, false, 2588*760c2415Smrg { 2589*760c2415Smrg isa_bit_predres, isa_nobit 2590*760c2415Smrg } 2591*760c2415Smrg }, 25928dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 25938dd4bdcdSmrg }; 25948dd4bdcdSmrg 25958dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_4_a[] = { 25968dd4bdcdSmrg { 25978dd4bdcdSmrg "simd", false, false, 25988dd4bdcdSmrg { 25998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 26008dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 26018dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 26028dd4bdcdSmrg } 26038dd4bdcdSmrg }, 26048dd4bdcdSmrg { 26058dd4bdcdSmrg "fp16", false, false, 26068dd4bdcdSmrg { 26078dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 26088dd4bdcdSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 26098dd4bdcdSmrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 26108dd4bdcdSmrg } 26118dd4bdcdSmrg }, 26128dd4bdcdSmrg { 26138dd4bdcdSmrg "crypto", false, false, 26148dd4bdcdSmrg { 26158dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 26168dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 26178dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 26188dd4bdcdSmrg } 26198dd4bdcdSmrg }, 26208dd4bdcdSmrg { 26218dd4bdcdSmrg "nocrypto", true, false, 26228dd4bdcdSmrg { 26238dd4bdcdSmrg isa_bit_crypto, isa_nobit 26248dd4bdcdSmrg } 26258dd4bdcdSmrg }, 26268dd4bdcdSmrg { 26278dd4bdcdSmrg "nofp", true, false, 26288dd4bdcdSmrg { 26298dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 26308dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 26318dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 26328dd4bdcdSmrg } 26338dd4bdcdSmrg }, 2634*760c2415Smrg { 2635*760c2415Smrg "sb", false, false, 2636*760c2415Smrg { 2637*760c2415Smrg isa_bit_sb, isa_nobit 2638*760c2415Smrg } 2639*760c2415Smrg }, 2640*760c2415Smrg { 2641*760c2415Smrg "predres", false, false, 2642*760c2415Smrg { 2643*760c2415Smrg isa_bit_predres, isa_nobit 2644*760c2415Smrg } 2645*760c2415Smrg }, 2646*760c2415Smrg { NULL, false, false, {isa_nobit}} 2647*760c2415Smrg }; 2648*760c2415Smrg 2649*760c2415Smrg static const struct cpu_arch_extension arch_opttab_armv8_5_a[] = { 2650*760c2415Smrg { 2651*760c2415Smrg "simd", false, false, 2652*760c2415Smrg { 2653*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 2654*760c2415Smrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2655*760c2415Smrg isa_bit_fp_dbl, isa_nobit 2656*760c2415Smrg } 2657*760c2415Smrg }, 2658*760c2415Smrg { 2659*760c2415Smrg "fp16", false, false, 2660*760c2415Smrg { 2661*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 2662*760c2415Smrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2663*760c2415Smrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2664*760c2415Smrg } 2665*760c2415Smrg }, 2666*760c2415Smrg { 2667*760c2415Smrg "crypto", false, false, 2668*760c2415Smrg { 2669*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 2670*760c2415Smrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2671*760c2415Smrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2672*760c2415Smrg } 2673*760c2415Smrg }, 2674*760c2415Smrg { 2675*760c2415Smrg "nocrypto", true, false, 2676*760c2415Smrg { 2677*760c2415Smrg isa_bit_crypto, isa_nobit 2678*760c2415Smrg } 2679*760c2415Smrg }, 2680*760c2415Smrg { 2681*760c2415Smrg "nofp", true, false, 2682*760c2415Smrg { 2683*760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 2684*760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2685*760c2415Smrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2686*760c2415Smrg } 2687*760c2415Smrg }, 26888dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 26898dd4bdcdSmrg }; 26908dd4bdcdSmrg 26918dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = { 26928dd4bdcdSmrg { 26938dd4bdcdSmrg "dsp", false, false, 26948dd4bdcdSmrg { 26958dd4bdcdSmrg isa_bit_armv7em, isa_nobit 26968dd4bdcdSmrg } 26978dd4bdcdSmrg }, 26988dd4bdcdSmrg { 26998dd4bdcdSmrg "fp", false, false, 27008dd4bdcdSmrg { 27018dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 27028dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 27038dd4bdcdSmrg } 27048dd4bdcdSmrg }, 27058dd4bdcdSmrg { 27068dd4bdcdSmrg "fp.dp", false, false, 27078dd4bdcdSmrg { 27088dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 27098dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 27108dd4bdcdSmrg } 27118dd4bdcdSmrg }, 27128dd4bdcdSmrg { 27138dd4bdcdSmrg "nofp", true, false, 27148dd4bdcdSmrg { 27158dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27168dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 27178dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 27188dd4bdcdSmrg } 27198dd4bdcdSmrg }, 27208dd4bdcdSmrg { 27218dd4bdcdSmrg "nodsp", true, false, 27228dd4bdcdSmrg { 27238dd4bdcdSmrg isa_bit_armv7em, isa_nobit 27248dd4bdcdSmrg } 27258dd4bdcdSmrg }, 27268dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 27278dd4bdcdSmrg }; 27288dd4bdcdSmrg 27298dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_r[] = { 27308dd4bdcdSmrg { 27318dd4bdcdSmrg "crc", false, false, 27328dd4bdcdSmrg { 27338dd4bdcdSmrg isa_bit_crc32, isa_nobit 27348dd4bdcdSmrg } 27358dd4bdcdSmrg }, 27368dd4bdcdSmrg { 27378dd4bdcdSmrg "fp.sp", false, false, 27388dd4bdcdSmrg { 27398dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 27408dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 27418dd4bdcdSmrg } 27428dd4bdcdSmrg }, 27438dd4bdcdSmrg { 27448dd4bdcdSmrg "simd", false, false, 27458dd4bdcdSmrg { 27468dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27478dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 27488dd4bdcdSmrg isa_nobit 27498dd4bdcdSmrg } 27508dd4bdcdSmrg }, 27518dd4bdcdSmrg { 27528dd4bdcdSmrg "crypto", false, false, 27538dd4bdcdSmrg { 27548dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27558dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 27568dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 27578dd4bdcdSmrg } 27588dd4bdcdSmrg }, 27598dd4bdcdSmrg { 27608dd4bdcdSmrg "nocrypto", true, false, 27618dd4bdcdSmrg { 27628dd4bdcdSmrg isa_bit_crypto, isa_nobit 27638dd4bdcdSmrg } 27648dd4bdcdSmrg }, 27658dd4bdcdSmrg { 27668dd4bdcdSmrg "nofp", true, false, 27678dd4bdcdSmrg { 27688dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27698dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 27708dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 27718dd4bdcdSmrg } 27728dd4bdcdSmrg }, 27738dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 27748dd4bdcdSmrg }; 27758dd4bdcdSmrg 27768dd4bdcdSmrg const arch_option all_architectures[] = 27778dd4bdcdSmrg { 27788dd4bdcdSmrg { 27798dd4bdcdSmrg "armv4", 27808dd4bdcdSmrg NULL, 27818dd4bdcdSmrg { 2782*760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 27838dd4bdcdSmrg }, 27848dd4bdcdSmrg "4", BASE_ARCH_4, 27858dd4bdcdSmrg 0, 27868dd4bdcdSmrg TARGET_CPU_arm7tdmi, 27878dd4bdcdSmrg }, 27888dd4bdcdSmrg { 27898dd4bdcdSmrg "armv4t", 27908dd4bdcdSmrg NULL, 27918dd4bdcdSmrg { 2792*760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 27938dd4bdcdSmrg }, 27948dd4bdcdSmrg "4T", BASE_ARCH_4T, 27958dd4bdcdSmrg 0, 27968dd4bdcdSmrg TARGET_CPU_arm7tdmi, 27978dd4bdcdSmrg }, 27988dd4bdcdSmrg { 27998dd4bdcdSmrg "armv5t", 28008dd4bdcdSmrg NULL, 28018dd4bdcdSmrg { 2802*760c2415Smrg isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, 2803*760c2415Smrg isa_nobit 28048dd4bdcdSmrg }, 28058dd4bdcdSmrg "5T", BASE_ARCH_5T, 28068dd4bdcdSmrg 0, 28078dd4bdcdSmrg TARGET_CPU_arm10tdmi, 28088dd4bdcdSmrg }, 28098dd4bdcdSmrg { 28108dd4bdcdSmrg "armv5te", 28118dd4bdcdSmrg arch_opttab_armv5te, 28128dd4bdcdSmrg { 2813*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 2814*760c2415Smrg isa_bit_notm, isa_nobit 28158dd4bdcdSmrg }, 28168dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 28178dd4bdcdSmrg 0, 28188dd4bdcdSmrg TARGET_CPU_arm1026ejs, 28198dd4bdcdSmrg }, 28208dd4bdcdSmrg { 28218dd4bdcdSmrg "armv5tej", 28228dd4bdcdSmrg arch_opttab_armv5tej, 28238dd4bdcdSmrg { 2824*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 2825*760c2415Smrg isa_bit_notm, isa_nobit 28268dd4bdcdSmrg }, 28278dd4bdcdSmrg "5TEJ", BASE_ARCH_5TEJ, 28288dd4bdcdSmrg 0, 28298dd4bdcdSmrg TARGET_CPU_arm1026ejs, 28308dd4bdcdSmrg }, 28318dd4bdcdSmrg { 28328dd4bdcdSmrg "armv6", 28338dd4bdcdSmrg arch_opttab_armv6, 28348dd4bdcdSmrg { 2835*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2836*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 28378dd4bdcdSmrg }, 28388dd4bdcdSmrg "6", BASE_ARCH_6, 28398dd4bdcdSmrg 0, 28408dd4bdcdSmrg TARGET_CPU_arm1136js, 28418dd4bdcdSmrg }, 28428dd4bdcdSmrg { 28438dd4bdcdSmrg "armv6j", 28448dd4bdcdSmrg arch_opttab_armv6j, 28458dd4bdcdSmrg { 2846*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2847*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 28488dd4bdcdSmrg }, 28498dd4bdcdSmrg "6J", BASE_ARCH_6J, 28508dd4bdcdSmrg 0, 28518dd4bdcdSmrg TARGET_CPU_arm1136js, 28528dd4bdcdSmrg }, 28538dd4bdcdSmrg { 28548dd4bdcdSmrg "armv6k", 28558dd4bdcdSmrg arch_opttab_armv6k, 28568dd4bdcdSmrg { 2857*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2858*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k, 2859*760c2415Smrg isa_nobit 28608dd4bdcdSmrg }, 28618dd4bdcdSmrg "6K", BASE_ARCH_6K, 28628dd4bdcdSmrg 0, 28638dd4bdcdSmrg TARGET_CPU_mpcore, 28648dd4bdcdSmrg }, 28658dd4bdcdSmrg { 28668dd4bdcdSmrg "armv6z", 28678dd4bdcdSmrg arch_opttab_armv6z, 28688dd4bdcdSmrg { 2869*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2870*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 28718dd4bdcdSmrg }, 28728dd4bdcdSmrg "6Z", BASE_ARCH_6Z, 28738dd4bdcdSmrg 0, 28748dd4bdcdSmrg TARGET_CPU_arm1176jzs, 28758dd4bdcdSmrg }, 28768dd4bdcdSmrg { 28778dd4bdcdSmrg "armv6kz", 28788dd4bdcdSmrg arch_opttab_armv6kz, 28798dd4bdcdSmrg { 2880*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2881*760c2415Smrg isa_bit_armv4, isa_bit_quirk_armv6kz, isa_bit_armv6, isa_bit_notm, 2882*760c2415Smrg isa_bit_armv6k, isa_nobit 28838dd4bdcdSmrg }, 28848dd4bdcdSmrg "6KZ", BASE_ARCH_6KZ, 28858dd4bdcdSmrg 0, 28868dd4bdcdSmrg TARGET_CPU_arm1176jzs, 28878dd4bdcdSmrg }, 28888dd4bdcdSmrg { 28898dd4bdcdSmrg "armv6zk", 28908dd4bdcdSmrg arch_opttab_armv6zk, 28918dd4bdcdSmrg { 2892*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2893*760c2415Smrg isa_bit_armv4, isa_bit_quirk_armv6kz, isa_bit_armv6, isa_bit_notm, 2894*760c2415Smrg isa_bit_armv6k, isa_nobit 28958dd4bdcdSmrg }, 28968dd4bdcdSmrg "6KZ", BASE_ARCH_6KZ, 28978dd4bdcdSmrg 0, 28988dd4bdcdSmrg TARGET_CPU_arm1176jzs, 28998dd4bdcdSmrg }, 29008dd4bdcdSmrg { 29018dd4bdcdSmrg "armv6t2", 29028dd4bdcdSmrg arch_opttab_armv6t2, 29038dd4bdcdSmrg { 2904*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2905*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm, 2906*760c2415Smrg isa_nobit 29078dd4bdcdSmrg }, 29088dd4bdcdSmrg "6T2", BASE_ARCH_6T2, 29098dd4bdcdSmrg 0, 29108dd4bdcdSmrg TARGET_CPU_arm1156t2s, 29118dd4bdcdSmrg }, 29128dd4bdcdSmrg { 29138dd4bdcdSmrg "armv6-m", 29148dd4bdcdSmrg NULL, 29158dd4bdcdSmrg { 2916*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2917*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 29188dd4bdcdSmrg }, 29198dd4bdcdSmrg "6M", BASE_ARCH_6M, 29208dd4bdcdSmrg 'M', 29218dd4bdcdSmrg TARGET_CPU_cortexm1, 29228dd4bdcdSmrg }, 29238dd4bdcdSmrg { 29248dd4bdcdSmrg "armv6s-m", 29258dd4bdcdSmrg NULL, 29268dd4bdcdSmrg { 2927*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2928*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 29298dd4bdcdSmrg }, 29308dd4bdcdSmrg "6M", BASE_ARCH_6M, 29318dd4bdcdSmrg 'M', 29328dd4bdcdSmrg TARGET_CPU_cortexm1, 29338dd4bdcdSmrg }, 29348dd4bdcdSmrg { 29358dd4bdcdSmrg "armv7", 29368dd4bdcdSmrg arch_opttab_armv7, 29378dd4bdcdSmrg { 2938*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2939*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, 2940*760c2415Smrg isa_nobit 29418dd4bdcdSmrg }, 29428dd4bdcdSmrg "7", BASE_ARCH_7, 29438dd4bdcdSmrg 0, 29448dd4bdcdSmrg TARGET_CPU_cortexa8, 29458dd4bdcdSmrg }, 29468dd4bdcdSmrg { 29478dd4bdcdSmrg "armv7-a", 29488dd4bdcdSmrg arch_opttab_armv7_a, 29498dd4bdcdSmrg { 2950*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2951*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, 2952*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_nobit 29538dd4bdcdSmrg }, 29548dd4bdcdSmrg "7A", BASE_ARCH_7A, 29558dd4bdcdSmrg 'A', 29568dd4bdcdSmrg TARGET_CPU_cortexa8, 29578dd4bdcdSmrg }, 29588dd4bdcdSmrg { 29598dd4bdcdSmrg "armv7ve", 29608dd4bdcdSmrg arch_opttab_armv7ve, 29618dd4bdcdSmrg { 2962*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 2963*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 2964*760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, 2965*760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit 29668dd4bdcdSmrg }, 29678dd4bdcdSmrg "7A", BASE_ARCH_7A, 29688dd4bdcdSmrg 'A', 29698dd4bdcdSmrg TARGET_CPU_cortexa8, 29708dd4bdcdSmrg }, 29718dd4bdcdSmrg { 29728dd4bdcdSmrg "armv7-r", 29738dd4bdcdSmrg arch_opttab_armv7_r, 29748dd4bdcdSmrg { 2975*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2976*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 2977*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit 29788dd4bdcdSmrg }, 29798dd4bdcdSmrg "7R", BASE_ARCH_7R, 29808dd4bdcdSmrg 'R', 29818dd4bdcdSmrg TARGET_CPU_cortexr4, 29828dd4bdcdSmrg }, 29838dd4bdcdSmrg { 29848dd4bdcdSmrg "armv7-m", 29858dd4bdcdSmrg NULL, 29868dd4bdcdSmrg { 2987*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2988*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 2989*760c2415Smrg isa_bit_thumb2, isa_nobit 29908dd4bdcdSmrg }, 29918dd4bdcdSmrg "7M", BASE_ARCH_7M, 29928dd4bdcdSmrg 'M', 29938dd4bdcdSmrg TARGET_CPU_cortexm3, 29948dd4bdcdSmrg }, 29958dd4bdcdSmrg { 29968dd4bdcdSmrg "armv7e-m", 29978dd4bdcdSmrg arch_opttab_armv7e_m, 29988dd4bdcdSmrg { 2999*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3000*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, 3001*760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_nobit 30028dd4bdcdSmrg }, 30038dd4bdcdSmrg "7EM", BASE_ARCH_7EM, 30048dd4bdcdSmrg 'M', 30058dd4bdcdSmrg TARGET_CPU_cortexm4, 30068dd4bdcdSmrg }, 30078dd4bdcdSmrg { 30088dd4bdcdSmrg "armv8-a", 30098dd4bdcdSmrg arch_opttab_armv8_a, 30108dd4bdcdSmrg { 3011*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3012*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3013*760c2415Smrg isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2, 3014*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec, 3015*760c2415Smrg isa_nobit 30168dd4bdcdSmrg }, 30178dd4bdcdSmrg "8A", BASE_ARCH_8A, 30188dd4bdcdSmrg 'A', 30198dd4bdcdSmrg TARGET_CPU_cortexa53, 30208dd4bdcdSmrg }, 30218dd4bdcdSmrg { 30228dd4bdcdSmrg "armv8.1-a", 30238dd4bdcdSmrg arch_opttab_armv8_1_a, 30248dd4bdcdSmrg { 3025*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3026*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 30278dd4bdcdSmrg isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv, 3028*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv6k, 3029*760c2415Smrg isa_bit_mp, isa_bit_sec, isa_nobit 30308dd4bdcdSmrg }, 30318dd4bdcdSmrg "8A", BASE_ARCH_8A, 30328dd4bdcdSmrg 'A', 30338dd4bdcdSmrg TARGET_CPU_cortexa53, 30348dd4bdcdSmrg }, 30358dd4bdcdSmrg { 30368dd4bdcdSmrg "armv8.2-a", 30378dd4bdcdSmrg arch_opttab_armv8_2_a, 30388dd4bdcdSmrg { 3039*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3040*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3041*760c2415Smrg isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv, 3042*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2, 3043*760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit 30448dd4bdcdSmrg }, 30458dd4bdcdSmrg "8A", BASE_ARCH_8A, 30468dd4bdcdSmrg 'A', 30478dd4bdcdSmrg TARGET_CPU_cortexa53, 30488dd4bdcdSmrg }, 30498dd4bdcdSmrg { 30508dd4bdcdSmrg "armv8.3-a", 30518dd4bdcdSmrg arch_opttab_armv8_3_a, 30528dd4bdcdSmrg { 3053*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3054*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 30558dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, 3056*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv6k, 3057*760c2415Smrg isa_bit_armv8_2, isa_bit_armv8_3, isa_bit_mp, isa_bit_sec, 3058*760c2415Smrg isa_nobit 30598dd4bdcdSmrg }, 30608dd4bdcdSmrg "8A", BASE_ARCH_8A, 30618dd4bdcdSmrg 'A', 30628dd4bdcdSmrg TARGET_CPU_cortexa53, 30638dd4bdcdSmrg }, 30648dd4bdcdSmrg { 30658dd4bdcdSmrg "armv8.4-a", 30668dd4bdcdSmrg arch_opttab_armv8_4_a, 30678dd4bdcdSmrg { 3068*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3069*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3070*760c2415Smrg isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv, 3071*760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2, 3072*760c2415Smrg isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp, 3073*760c2415Smrg isa_bit_sec, isa_nobit 3074*760c2415Smrg }, 3075*760c2415Smrg "8A", BASE_ARCH_8A, 3076*760c2415Smrg 'A', 3077*760c2415Smrg TARGET_CPU_cortexa53, 3078*760c2415Smrg }, 3079*760c2415Smrg { 3080*760c2415Smrg "armv8.5-a", 3081*760c2415Smrg arch_opttab_armv8_5_a, 3082*760c2415Smrg { 3083*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb, 3084*760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, 3085*760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, 3086*760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, 30878dd4bdcdSmrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, 3088*760c2415Smrg isa_bit_mp, isa_bit_armv8_5, isa_bit_sec, isa_bit_predres, 3089*760c2415Smrg isa_nobit 30908dd4bdcdSmrg }, 30918dd4bdcdSmrg "8A", BASE_ARCH_8A, 30928dd4bdcdSmrg 'A', 30938dd4bdcdSmrg TARGET_CPU_cortexa53, 30948dd4bdcdSmrg }, 30958dd4bdcdSmrg { 30968dd4bdcdSmrg "armv8-m.base", 30978dd4bdcdSmrg NULL, 30988dd4bdcdSmrg { 3099*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3100*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_cmse, isa_bit_armv8, 3101*760c2415Smrg isa_bit_tdiv, isa_nobit 31028dd4bdcdSmrg }, 31038dd4bdcdSmrg "8M_BASE", BASE_ARCH_8M_BASE, 31048dd4bdcdSmrg 'M', 31058dd4bdcdSmrg TARGET_CPU_cortexm23, 31068dd4bdcdSmrg }, 31078dd4bdcdSmrg { 31088dd4bdcdSmrg "armv8-m.main", 31098dd4bdcdSmrg arch_opttab_armv8_m_main, 31108dd4bdcdSmrg { 3111*760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3112*760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_cmse, 3113*760c2415Smrg isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2, isa_nobit 31148dd4bdcdSmrg }, 31158dd4bdcdSmrg "8M_MAIN", BASE_ARCH_8M_MAIN, 31168dd4bdcdSmrg 'M', 31178dd4bdcdSmrg TARGET_CPU_cortexm7, 31188dd4bdcdSmrg }, 31198dd4bdcdSmrg { 31208dd4bdcdSmrg "armv8-r", 31218dd4bdcdSmrg arch_opttab_armv8_r, 31228dd4bdcdSmrg { 3123*760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3124*760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3125*760c2415Smrg isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2, 3126*760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec, 3127*760c2415Smrg isa_nobit 31288dd4bdcdSmrg }, 31298dd4bdcdSmrg "8R", BASE_ARCH_8R, 31308dd4bdcdSmrg 'R', 31318dd4bdcdSmrg TARGET_CPU_cortexr52, 31328dd4bdcdSmrg }, 31338dd4bdcdSmrg { 31348dd4bdcdSmrg "iwmmxt", 31358dd4bdcdSmrg NULL, 31368dd4bdcdSmrg { 3137*760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 3138*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit 31398dd4bdcdSmrg }, 31408dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 31418dd4bdcdSmrg 0, 31428dd4bdcdSmrg TARGET_CPU_iwmmxt, 31438dd4bdcdSmrg }, 31448dd4bdcdSmrg { 31458dd4bdcdSmrg "iwmmxt2", 31468dd4bdcdSmrg NULL, 31478dd4bdcdSmrg { 3148*760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 3149*760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm, 3150*760c2415Smrg isa_nobit 31518dd4bdcdSmrg }, 31528dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 31538dd4bdcdSmrg 0, 31548dd4bdcdSmrg TARGET_CPU_iwmmxt2, 31558dd4bdcdSmrg }, 31568dd4bdcdSmrg {{NULL, NULL, {isa_nobit}}, 31578dd4bdcdSmrg NULL, BASE_ARCH_0, 0, TARGET_CPU_arm_none} 31588dd4bdcdSmrg }; 31598dd4bdcdSmrg 31608dd4bdcdSmrg const arm_fpu_desc all_fpus[] = 31618dd4bdcdSmrg { 31628dd4bdcdSmrg { 31638dd4bdcdSmrg "vfp", 31648dd4bdcdSmrg { 31658dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 31668dd4bdcdSmrg } 31678dd4bdcdSmrg }, 31688dd4bdcdSmrg { 31698dd4bdcdSmrg "vfpv2", 31708dd4bdcdSmrg { 31718dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 31728dd4bdcdSmrg } 31738dd4bdcdSmrg }, 31748dd4bdcdSmrg { 31758dd4bdcdSmrg "vfpv3", 31768dd4bdcdSmrg { 31778dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 31788dd4bdcdSmrg isa_nobit 31798dd4bdcdSmrg } 31808dd4bdcdSmrg }, 31818dd4bdcdSmrg { 31828dd4bdcdSmrg "vfpv3-fp16", 31838dd4bdcdSmrg { 31848dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 31858dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 31868dd4bdcdSmrg } 31878dd4bdcdSmrg }, 31888dd4bdcdSmrg { 31898dd4bdcdSmrg "vfpv3-d16", 31908dd4bdcdSmrg { 31918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 31928dd4bdcdSmrg } 31938dd4bdcdSmrg }, 31948dd4bdcdSmrg { 31958dd4bdcdSmrg "vfpv3-d16-fp16", 31968dd4bdcdSmrg { 31978dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 31988dd4bdcdSmrg isa_nobit 31998dd4bdcdSmrg } 32008dd4bdcdSmrg }, 32018dd4bdcdSmrg { 32028dd4bdcdSmrg "vfpv3xd", 32038dd4bdcdSmrg { 32048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 32058dd4bdcdSmrg } 32068dd4bdcdSmrg }, 32078dd4bdcdSmrg { 32088dd4bdcdSmrg "vfpv3xd-fp16", 32098dd4bdcdSmrg { 32108dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit 32118dd4bdcdSmrg } 32128dd4bdcdSmrg }, 32138dd4bdcdSmrg { 32148dd4bdcdSmrg "neon", 32158dd4bdcdSmrg { 32168dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 32178dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 32188dd4bdcdSmrg } 32198dd4bdcdSmrg }, 32208dd4bdcdSmrg { 32218dd4bdcdSmrg "neon-vfpv3", 32228dd4bdcdSmrg { 32238dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 32248dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 32258dd4bdcdSmrg } 32268dd4bdcdSmrg }, 32278dd4bdcdSmrg { 32288dd4bdcdSmrg "neon-fp16", 32298dd4bdcdSmrg { 32308dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 32318dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 32328dd4bdcdSmrg } 32338dd4bdcdSmrg }, 32348dd4bdcdSmrg { 32358dd4bdcdSmrg "vfpv4", 32368dd4bdcdSmrg { 32378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 32388dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 32398dd4bdcdSmrg } 32408dd4bdcdSmrg }, 32418dd4bdcdSmrg { 32428dd4bdcdSmrg "neon-vfpv4", 32438dd4bdcdSmrg { 32448dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 32458dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 32468dd4bdcdSmrg } 32478dd4bdcdSmrg }, 32488dd4bdcdSmrg { 32498dd4bdcdSmrg "vfpv4-d16", 32508dd4bdcdSmrg { 32518dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 32528dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 32538dd4bdcdSmrg } 32548dd4bdcdSmrg }, 32558dd4bdcdSmrg { 32568dd4bdcdSmrg "fpv4-sp-d16", 32578dd4bdcdSmrg { 32588dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 32598dd4bdcdSmrg isa_nobit 32608dd4bdcdSmrg } 32618dd4bdcdSmrg }, 32628dd4bdcdSmrg { 32638dd4bdcdSmrg "fpv5-sp-d16", 32648dd4bdcdSmrg { 32658dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 32668dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 32678dd4bdcdSmrg } 32688dd4bdcdSmrg }, 32698dd4bdcdSmrg { 32708dd4bdcdSmrg "fpv5-d16", 32718dd4bdcdSmrg { 32728dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 32738dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 32748dd4bdcdSmrg } 32758dd4bdcdSmrg }, 32768dd4bdcdSmrg { 32778dd4bdcdSmrg "fp-armv8", 32788dd4bdcdSmrg { 32798dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 32808dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 32818dd4bdcdSmrg } 32828dd4bdcdSmrg }, 32838dd4bdcdSmrg { 32848dd4bdcdSmrg "neon-fp-armv8", 32858dd4bdcdSmrg { 32868dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 32878dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 32888dd4bdcdSmrg isa_nobit 32898dd4bdcdSmrg } 32908dd4bdcdSmrg }, 32918dd4bdcdSmrg { 32928dd4bdcdSmrg "crypto-neon-fp-armv8", 32938dd4bdcdSmrg { 32948dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 32958dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 32968dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 32978dd4bdcdSmrg } 32988dd4bdcdSmrg }, 32998dd4bdcdSmrg { 33008dd4bdcdSmrg "vfp3", 33018dd4bdcdSmrg { 33028dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 33038dd4bdcdSmrg isa_nobit 33048dd4bdcdSmrg } 33058dd4bdcdSmrg }, 33068dd4bdcdSmrg }; 3307