18dd4bdcdSmrg /* This file is automatically generated. DO NOT EDIT! */ 2*0bfacb9bSmrg /* Generated from: NetBSD: mknative-gcc,v 1.116 2022/07/22 06:50:26 mrg Exp */ 38dd4bdcdSmrg /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp */ 48dd4bdcdSmrg 58dd4bdcdSmrg /* -*- buffer-read-only: t -*- 68dd4bdcdSmrg Generated automatically by parsecpu.awk from arm-cpus.in. 78dd4bdcdSmrg Do not edit. 88dd4bdcdSmrg 9*0bfacb9bSmrg Copyright (C) 2011-2020 Free Software Foundation, Inc. 108dd4bdcdSmrg 118dd4bdcdSmrg This file is part of GCC. 128dd4bdcdSmrg 138dd4bdcdSmrg GCC is free software; you can redistribute it and/or modify 148dd4bdcdSmrg it under the terms of the GNU General Public License as 158dd4bdcdSmrg published by the Free Software Foundation; either version 3, 168dd4bdcdSmrg or (at your option) any later version. 178dd4bdcdSmrg 188dd4bdcdSmrg GCC is distributed in the hope that it will be useful, 198dd4bdcdSmrg but WITHOUT ANY WARRANTY; without even the implied warranty of 208dd4bdcdSmrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 218dd4bdcdSmrg GNU General Public License for more details. 228dd4bdcdSmrg 238dd4bdcdSmrg You should have received a copy of the GNU General Public 248dd4bdcdSmrg License along with GCC; see the file COPYING3. If not see 258dd4bdcdSmrg <http://www.gnu.org/licenses/>. */ 268dd4bdcdSmrg 27760c2415Smrg static const cpu_alias cpu_aliastab_strongarm[] = { 28760c2415Smrg { "strongarm110", true}, 29760c2415Smrg { "strongarm1100", false}, 30760c2415Smrg { "strongarm1110", false}, 31760c2415Smrg { NULL, false} 32760c2415Smrg }; 33760c2415Smrg 34760c2415Smrg static const cpu_alias cpu_aliastab_arm7tdmi[] = { 35760c2415Smrg { "arm7tdmi-s", true}, 36760c2415Smrg { NULL, false} 37760c2415Smrg }; 38760c2415Smrg 39760c2415Smrg static const cpu_alias cpu_aliastab_arm710t[] = { 40760c2415Smrg { "arm720t", true}, 41760c2415Smrg { "arm740t", true}, 42760c2415Smrg { NULL, false} 43760c2415Smrg }; 44760c2415Smrg 45760c2415Smrg static const cpu_alias cpu_aliastab_arm920t[] = { 46760c2415Smrg { "arm920", true}, 47760c2415Smrg { "arm922t", true}, 48760c2415Smrg { "arm940t", true}, 49760c2415Smrg { "ep9312", true}, 50760c2415Smrg { NULL, false} 51760c2415Smrg }; 52760c2415Smrg 53760c2415Smrg static const cpu_alias cpu_aliastab_arm10tdmi[] = { 54760c2415Smrg { "arm1020t", true}, 55760c2415Smrg { NULL, false} 56760c2415Smrg }; 57760c2415Smrg 588dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm9e[] = { 598dd4bdcdSmrg { 608dd4bdcdSmrg "nofp", true, false, 618dd4bdcdSmrg { 62*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 63*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 648dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 658dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 668dd4bdcdSmrg } 678dd4bdcdSmrg }, 688dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 698dd4bdcdSmrg }; 708dd4bdcdSmrg 71760c2415Smrg static const cpu_alias cpu_aliastab_arm9e[] = { 72760c2415Smrg { "arm946e-s", true}, 73760c2415Smrg { "arm966e-s", true}, 74760c2415Smrg { "arm968e-s", true}, 75760c2415Smrg { NULL, false} 768dd4bdcdSmrg }; 778dd4bdcdSmrg 788dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm10e[] = { 798dd4bdcdSmrg { 808dd4bdcdSmrg "nofp", true, false, 818dd4bdcdSmrg { 82*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 83*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 848dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 858dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 868dd4bdcdSmrg } 878dd4bdcdSmrg }, 888dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 898dd4bdcdSmrg }; 908dd4bdcdSmrg 91760c2415Smrg static const cpu_alias cpu_aliastab_arm10e[] = { 92760c2415Smrg { "arm1020e", true}, 93760c2415Smrg { "arm1022e", true}, 94760c2415Smrg { NULL, false} 958dd4bdcdSmrg }; 968dd4bdcdSmrg 978dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm926ejs[] = { 988dd4bdcdSmrg { 998dd4bdcdSmrg "nofp", true, false, 1008dd4bdcdSmrg { 101*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 102*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 1038dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 1048dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 1058dd4bdcdSmrg } 1068dd4bdcdSmrg }, 1078dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 1088dd4bdcdSmrg }; 1098dd4bdcdSmrg 1108dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_arm1026ejs[] = { 1118dd4bdcdSmrg { 1128dd4bdcdSmrg "nofp", true, false, 1138dd4bdcdSmrg { 114*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 115*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 1168dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 1178dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 1188dd4bdcdSmrg } 1198dd4bdcdSmrg }, 1208dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 1218dd4bdcdSmrg }; 1228dd4bdcdSmrg 1238dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_genericv7a[] = { 1248dd4bdcdSmrg { 1258dd4bdcdSmrg "mp", false, false, 1268dd4bdcdSmrg { 1278dd4bdcdSmrg isa_bit_mp, isa_nobit 1288dd4bdcdSmrg } 1298dd4bdcdSmrg }, 1308dd4bdcdSmrg { 1318dd4bdcdSmrg "sec", false, false, 1328dd4bdcdSmrg { 1338dd4bdcdSmrg isa_bit_sec, isa_nobit 1348dd4bdcdSmrg } 1358dd4bdcdSmrg }, 1368dd4bdcdSmrg { 1378dd4bdcdSmrg "vfpv3-d16", false, false, 1388dd4bdcdSmrg { 1398dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 1408dd4bdcdSmrg } 1418dd4bdcdSmrg }, 1428dd4bdcdSmrg { 1438dd4bdcdSmrg "vfpv3", false, false, 1448dd4bdcdSmrg { 1458dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 1468dd4bdcdSmrg isa_nobit 1478dd4bdcdSmrg } 1488dd4bdcdSmrg }, 1498dd4bdcdSmrg { 1508dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 1518dd4bdcdSmrg { 1528dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 1538dd4bdcdSmrg isa_nobit 1548dd4bdcdSmrg } 1558dd4bdcdSmrg }, 1568dd4bdcdSmrg { 1578dd4bdcdSmrg "vfpv3-fp16", false, false, 1588dd4bdcdSmrg { 1598dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 1608dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1618dd4bdcdSmrg } 1628dd4bdcdSmrg }, 1638dd4bdcdSmrg { 1648dd4bdcdSmrg "vfpv4-d16", false, false, 1658dd4bdcdSmrg { 1668dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 1678dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1688dd4bdcdSmrg } 1698dd4bdcdSmrg }, 1708dd4bdcdSmrg { 1718dd4bdcdSmrg "vfpv4", false, false, 1728dd4bdcdSmrg { 1738dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 1748dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1758dd4bdcdSmrg } 1768dd4bdcdSmrg }, 1778dd4bdcdSmrg { 1788dd4bdcdSmrg "simd", false, false, 1798dd4bdcdSmrg { 1808dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 1818dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 1828dd4bdcdSmrg } 1838dd4bdcdSmrg }, 1848dd4bdcdSmrg { 1858dd4bdcdSmrg "neon-fp16", false, false, 1868dd4bdcdSmrg { 1878dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 1888dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1898dd4bdcdSmrg } 1908dd4bdcdSmrg }, 1918dd4bdcdSmrg { 1928dd4bdcdSmrg "neon-vfpv4", false, false, 1938dd4bdcdSmrg { 1948dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 1958dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 1968dd4bdcdSmrg } 1978dd4bdcdSmrg }, 1988dd4bdcdSmrg { 1998dd4bdcdSmrg "nosimd", true, false, 2008dd4bdcdSmrg { 201*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 202*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 2038dd4bdcdSmrg } 2048dd4bdcdSmrg }, 2058dd4bdcdSmrg { 2068dd4bdcdSmrg "nofp", true, false, 2078dd4bdcdSmrg { 208*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 209*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2118dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2128dd4bdcdSmrg } 2138dd4bdcdSmrg }, 2148dd4bdcdSmrg { 2158dd4bdcdSmrg "neon", false, true, 2168dd4bdcdSmrg { 2178dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 2188dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 2198dd4bdcdSmrg } 2208dd4bdcdSmrg }, 2218dd4bdcdSmrg { 2228dd4bdcdSmrg "neon-vfpv3", false, true, 2238dd4bdcdSmrg { 2248dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 2258dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 2268dd4bdcdSmrg } 2278dd4bdcdSmrg }, 2288dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2298dd4bdcdSmrg }; 2308dd4bdcdSmrg 2318dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa5[] = { 2328dd4bdcdSmrg { 2338dd4bdcdSmrg "nosimd", true, false, 2348dd4bdcdSmrg { 235*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 236*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 2378dd4bdcdSmrg } 2388dd4bdcdSmrg }, 2398dd4bdcdSmrg { 2408dd4bdcdSmrg "nofp", true, false, 2418dd4bdcdSmrg { 242*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 243*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2448dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2458dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2468dd4bdcdSmrg } 2478dd4bdcdSmrg }, 2488dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2498dd4bdcdSmrg }; 2508dd4bdcdSmrg 2518dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa7[] = { 2528dd4bdcdSmrg { 2538dd4bdcdSmrg "nosimd", true, false, 2548dd4bdcdSmrg { 255*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 256*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 2578dd4bdcdSmrg } 2588dd4bdcdSmrg }, 2598dd4bdcdSmrg { 2608dd4bdcdSmrg "nofp", true, false, 2618dd4bdcdSmrg { 262*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 263*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2648dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2658dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2668dd4bdcdSmrg } 2678dd4bdcdSmrg }, 2688dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2698dd4bdcdSmrg }; 2708dd4bdcdSmrg 2718dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa8[] = { 2728dd4bdcdSmrg { 2738dd4bdcdSmrg "nofp", true, false, 2748dd4bdcdSmrg { 275*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 276*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2778dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2788dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2798dd4bdcdSmrg } 2808dd4bdcdSmrg }, 2818dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 2828dd4bdcdSmrg }; 2838dd4bdcdSmrg 2848dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa9[] = { 2858dd4bdcdSmrg { 2868dd4bdcdSmrg "nosimd", true, false, 2878dd4bdcdSmrg { 288*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 289*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 2908dd4bdcdSmrg } 2918dd4bdcdSmrg }, 2928dd4bdcdSmrg { 2938dd4bdcdSmrg "nofp", true, false, 2948dd4bdcdSmrg { 295*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 296*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2978dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2988dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2998dd4bdcdSmrg } 3008dd4bdcdSmrg }, 3018dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3028dd4bdcdSmrg }; 3038dd4bdcdSmrg 3048dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa12[] = { 3058dd4bdcdSmrg { 3068dd4bdcdSmrg "nofp", true, false, 3078dd4bdcdSmrg { 308*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 309*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3118dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3128dd4bdcdSmrg } 3138dd4bdcdSmrg }, 3148dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3158dd4bdcdSmrg }; 3168dd4bdcdSmrg 3178dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa15[] = { 3188dd4bdcdSmrg { 3198dd4bdcdSmrg "nofp", true, false, 3208dd4bdcdSmrg { 321*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 322*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3238dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3248dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3258dd4bdcdSmrg } 3268dd4bdcdSmrg }, 3278dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3288dd4bdcdSmrg }; 3298dd4bdcdSmrg 3308dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa17[] = { 3318dd4bdcdSmrg { 3328dd4bdcdSmrg "nofp", true, false, 3338dd4bdcdSmrg { 334*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 335*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3368dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3378dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3388dd4bdcdSmrg } 3398dd4bdcdSmrg }, 3408dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3418dd4bdcdSmrg }; 3428dd4bdcdSmrg 3438dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr5[] = { 3448dd4bdcdSmrg { 3458dd4bdcdSmrg "nofp.dp", true, false, 3468dd4bdcdSmrg { 3478dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3488dd4bdcdSmrg } 3498dd4bdcdSmrg }, 3508dd4bdcdSmrg { 3518dd4bdcdSmrg "nofp", true, false, 3528dd4bdcdSmrg { 353*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 354*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3558dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3568dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3578dd4bdcdSmrg } 3588dd4bdcdSmrg }, 3598dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3608dd4bdcdSmrg }; 3618dd4bdcdSmrg 3628dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr7[] = { 3638dd4bdcdSmrg { 3648dd4bdcdSmrg "nofp.dp", true, false, 3658dd4bdcdSmrg { 3668dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3678dd4bdcdSmrg } 3688dd4bdcdSmrg }, 3698dd4bdcdSmrg { 3708dd4bdcdSmrg "nofp", true, false, 3718dd4bdcdSmrg { 372*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 373*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3748dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3758dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3768dd4bdcdSmrg } 3778dd4bdcdSmrg }, 3788dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3798dd4bdcdSmrg }; 3808dd4bdcdSmrg 3818dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr8[] = { 3828dd4bdcdSmrg { 3838dd4bdcdSmrg "nofp.dp", true, false, 3848dd4bdcdSmrg { 3858dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 3868dd4bdcdSmrg } 3878dd4bdcdSmrg }, 3888dd4bdcdSmrg { 3898dd4bdcdSmrg "nofp", true, false, 3908dd4bdcdSmrg { 391*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 392*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3938dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3948dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3958dd4bdcdSmrg } 3968dd4bdcdSmrg }, 3978dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 3988dd4bdcdSmrg }; 3998dd4bdcdSmrg 4008dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm7[] = { 4018dd4bdcdSmrg { 4028dd4bdcdSmrg "nofp.dp", true, false, 4038dd4bdcdSmrg { 4048dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4058dd4bdcdSmrg } 4068dd4bdcdSmrg }, 4078dd4bdcdSmrg { 4088dd4bdcdSmrg "nofp", true, false, 4098dd4bdcdSmrg { 410*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 411*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4128dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4138dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4148dd4bdcdSmrg } 4158dd4bdcdSmrg }, 4168dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4178dd4bdcdSmrg }; 4188dd4bdcdSmrg 4198dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm4[] = { 4208dd4bdcdSmrg { 4218dd4bdcdSmrg "nofp", true, false, 4228dd4bdcdSmrg { 423*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 424*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4258dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4268dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4278dd4bdcdSmrg } 4288dd4bdcdSmrg }, 4298dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4308dd4bdcdSmrg }; 4318dd4bdcdSmrg 4328dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = { 4338dd4bdcdSmrg { 4348dd4bdcdSmrg "nofp", true, false, 4358dd4bdcdSmrg { 436*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 437*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4388dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4398dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4408dd4bdcdSmrg } 4418dd4bdcdSmrg }, 4428dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4438dd4bdcdSmrg }; 4448dd4bdcdSmrg 4458dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = { 4468dd4bdcdSmrg { 4478dd4bdcdSmrg "nofp", true, false, 4488dd4bdcdSmrg { 449*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 450*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4518dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4528dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4538dd4bdcdSmrg } 4548dd4bdcdSmrg }, 4558dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4568dd4bdcdSmrg }; 4578dd4bdcdSmrg 4588dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa32[] = { 4598dd4bdcdSmrg { 4608dd4bdcdSmrg "crypto", false, false, 4618dd4bdcdSmrg { 4628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4638dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 4648dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4658dd4bdcdSmrg } 4668dd4bdcdSmrg }, 4678dd4bdcdSmrg { 4688dd4bdcdSmrg "nofp", true, false, 4698dd4bdcdSmrg { 470*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 471*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4728dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4738dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4748dd4bdcdSmrg } 4758dd4bdcdSmrg }, 4768dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4778dd4bdcdSmrg }; 4788dd4bdcdSmrg 4798dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa35[] = { 4808dd4bdcdSmrg { 4818dd4bdcdSmrg "crypto", false, false, 4828dd4bdcdSmrg { 4838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 4848dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 4858dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 4868dd4bdcdSmrg } 4878dd4bdcdSmrg }, 4888dd4bdcdSmrg { 4898dd4bdcdSmrg "nofp", true, false, 4908dd4bdcdSmrg { 491*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 492*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 4938dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 4948dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 4958dd4bdcdSmrg } 4968dd4bdcdSmrg }, 4978dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 4988dd4bdcdSmrg }; 4998dd4bdcdSmrg 5008dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa53[] = { 5018dd4bdcdSmrg { 5028dd4bdcdSmrg "crypto", false, false, 5038dd4bdcdSmrg { 5048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5058dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5068dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5078dd4bdcdSmrg } 5088dd4bdcdSmrg }, 5098dd4bdcdSmrg { 5108dd4bdcdSmrg "nofp", true, false, 5118dd4bdcdSmrg { 512*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 513*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 5148dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 5158dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 5168dd4bdcdSmrg } 5178dd4bdcdSmrg }, 5188dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5198dd4bdcdSmrg }; 5208dd4bdcdSmrg 5218dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa57[] = { 5228dd4bdcdSmrg { 5238dd4bdcdSmrg "crypto", false, false, 5248dd4bdcdSmrg { 5258dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5268dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5278dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5288dd4bdcdSmrg } 5298dd4bdcdSmrg }, 5308dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5318dd4bdcdSmrg }; 5328dd4bdcdSmrg 5338dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa72[] = { 5348dd4bdcdSmrg { 5358dd4bdcdSmrg "crypto", false, false, 5368dd4bdcdSmrg { 5378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5388dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5398dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5408dd4bdcdSmrg } 5418dd4bdcdSmrg }, 5428dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5438dd4bdcdSmrg }; 5448dd4bdcdSmrg 5458dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73[] = { 5468dd4bdcdSmrg { 5478dd4bdcdSmrg "crypto", false, false, 5488dd4bdcdSmrg { 5498dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5508dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5518dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5528dd4bdcdSmrg } 5538dd4bdcdSmrg }, 5548dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5558dd4bdcdSmrg }; 5568dd4bdcdSmrg 5578dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_exynosm1[] = { 5588dd4bdcdSmrg { 5598dd4bdcdSmrg "crypto", false, false, 5608dd4bdcdSmrg { 5618dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5628dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5638dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5648dd4bdcdSmrg } 5658dd4bdcdSmrg }, 5668dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5678dd4bdcdSmrg }; 5688dd4bdcdSmrg 5698dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_xgene1[] = { 5708dd4bdcdSmrg { 5718dd4bdcdSmrg "crypto", false, false, 5728dd4bdcdSmrg { 5738dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5748dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5758dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5768dd4bdcdSmrg } 5778dd4bdcdSmrg }, 5788dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5798dd4bdcdSmrg }; 5808dd4bdcdSmrg 5818dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = { 5828dd4bdcdSmrg { 5838dd4bdcdSmrg "crypto", false, false, 5848dd4bdcdSmrg { 5858dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5868dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5878dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 5888dd4bdcdSmrg } 5898dd4bdcdSmrg }, 5908dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 5918dd4bdcdSmrg }; 5928dd4bdcdSmrg 5938dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = { 5948dd4bdcdSmrg { 5958dd4bdcdSmrg "crypto", false, false, 5968dd4bdcdSmrg { 5978dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 5988dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 5998dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6008dd4bdcdSmrg } 6018dd4bdcdSmrg }, 6028dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6038dd4bdcdSmrg }; 6048dd4bdcdSmrg 6058dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = { 6068dd4bdcdSmrg { 6078dd4bdcdSmrg "crypto", false, false, 6088dd4bdcdSmrg { 6098dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6118dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6128dd4bdcdSmrg } 6138dd4bdcdSmrg }, 6148dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6158dd4bdcdSmrg }; 6168dd4bdcdSmrg 6178dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = { 6188dd4bdcdSmrg { 6198dd4bdcdSmrg "crypto", false, false, 6208dd4bdcdSmrg { 6218dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6228dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6238dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6248dd4bdcdSmrg } 6258dd4bdcdSmrg }, 6268dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6278dd4bdcdSmrg }; 6288dd4bdcdSmrg 6298dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa55[] = { 6308dd4bdcdSmrg { 6318dd4bdcdSmrg "crypto", false, false, 6328dd4bdcdSmrg { 6338dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6348dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6358dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6368dd4bdcdSmrg } 6378dd4bdcdSmrg }, 6388dd4bdcdSmrg { 6398dd4bdcdSmrg "nofp", true, false, 6408dd4bdcdSmrg { 641*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 642*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 6438dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 6448dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 6458dd4bdcdSmrg } 6468dd4bdcdSmrg }, 6478dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6488dd4bdcdSmrg }; 6498dd4bdcdSmrg 6508dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa75[] = { 6518dd4bdcdSmrg { 6528dd4bdcdSmrg "crypto", false, false, 6538dd4bdcdSmrg { 6548dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 6558dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 6568dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 6578dd4bdcdSmrg } 6588dd4bdcdSmrg }, 6598dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 6608dd4bdcdSmrg }; 6618dd4bdcdSmrg 662760c2415Smrg static const cpu_arch_extension cpu_opttab_cortexa76[] = { 663760c2415Smrg { 664760c2415Smrg "crypto", false, false, 665760c2415Smrg { 666760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 667760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 668760c2415Smrg isa_bit_fp_dbl, isa_nobit 669760c2415Smrg } 670760c2415Smrg }, 671760c2415Smrg { NULL, false, false, {isa_nobit}} 672760c2415Smrg }; 673760c2415Smrg 674*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_cortexa76ae[] = { 675*0bfacb9bSmrg { 676*0bfacb9bSmrg "crypto", false, false, 677*0bfacb9bSmrg { 678*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 679*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 680*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 681*0bfacb9bSmrg } 682*0bfacb9bSmrg }, 683*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 684*0bfacb9bSmrg }; 685*0bfacb9bSmrg 686*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_cortexa77[] = { 687*0bfacb9bSmrg { 688*0bfacb9bSmrg "crypto", false, false, 689*0bfacb9bSmrg { 690*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 691*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 692*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 693*0bfacb9bSmrg } 694*0bfacb9bSmrg }, 695*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 696*0bfacb9bSmrg }; 697*0bfacb9bSmrg 698760c2415Smrg static const cpu_arch_extension cpu_opttab_neoversen1[] = { 699760c2415Smrg { 700760c2415Smrg "crypto", false, false, 701760c2415Smrg { 702760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 703760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 704760c2415Smrg isa_bit_fp_dbl, isa_nobit 705760c2415Smrg } 706760c2415Smrg }, 707760c2415Smrg { NULL, false, false, {isa_nobit}} 708760c2415Smrg }; 709760c2415Smrg 710760c2415Smrg static const cpu_alias cpu_aliastab_neoversen1[] = { 711760c2415Smrg { "ares", false}, 712760c2415Smrg { NULL, false} 713760c2415Smrg }; 714760c2415Smrg 7158dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexa75cortexa55[] = { 7168dd4bdcdSmrg { 7178dd4bdcdSmrg "crypto", false, false, 7188dd4bdcdSmrg { 7198dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 7208dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 7218dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 7228dd4bdcdSmrg } 7238dd4bdcdSmrg }, 7248dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 7258dd4bdcdSmrg }; 7268dd4bdcdSmrg 727760c2415Smrg static const cpu_arch_extension cpu_opttab_cortexa76cortexa55[] = { 728760c2415Smrg { 729760c2415Smrg "crypto", false, false, 730760c2415Smrg { 731760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 732760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 733760c2415Smrg isa_bit_fp_dbl, isa_nobit 734760c2415Smrg } 735760c2415Smrg }, 736760c2415Smrg { NULL, false, false, {isa_nobit}} 737760c2415Smrg }; 738760c2415Smrg 739*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_neoversev1[] = { 740*0bfacb9bSmrg { 741*0bfacb9bSmrg "crypto", false, false, 742*0bfacb9bSmrg { 743*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 744*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 745*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 746*0bfacb9bSmrg } 747*0bfacb9bSmrg }, 748*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 749*0bfacb9bSmrg }; 750*0bfacb9bSmrg 751*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_neoversen2[] = { 752*0bfacb9bSmrg { 753*0bfacb9bSmrg "crypto", false, false, 754*0bfacb9bSmrg { 755*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 756*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 757*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 758*0bfacb9bSmrg } 759*0bfacb9bSmrg }, 760*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 761*0bfacb9bSmrg }; 762*0bfacb9bSmrg 7638dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexm33[] = { 7648dd4bdcdSmrg { 7658dd4bdcdSmrg "nofp", true, false, 7668dd4bdcdSmrg { 767*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 768*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 7698dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 7708dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 7718dd4bdcdSmrg } 7728dd4bdcdSmrg }, 7738dd4bdcdSmrg { 7748dd4bdcdSmrg "nodsp", true, false, 7758dd4bdcdSmrg { 7768dd4bdcdSmrg isa_bit_armv7em, isa_nobit 7778dd4bdcdSmrg } 7788dd4bdcdSmrg }, 7798dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 7808dd4bdcdSmrg }; 7818dd4bdcdSmrg 782*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_cortexm35p[] = { 783*0bfacb9bSmrg { 784*0bfacb9bSmrg "nofp", true, false, 785*0bfacb9bSmrg { 786*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 787*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 788*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 789*0bfacb9bSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 790*0bfacb9bSmrg } 791*0bfacb9bSmrg }, 792*0bfacb9bSmrg { 793*0bfacb9bSmrg "nodsp", true, false, 794*0bfacb9bSmrg { 795*0bfacb9bSmrg isa_bit_armv7em, isa_nobit 796*0bfacb9bSmrg } 797*0bfacb9bSmrg }, 798*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 799*0bfacb9bSmrg }; 800*0bfacb9bSmrg 801*0bfacb9bSmrg static const cpu_arch_extension cpu_opttab_cortexm55[] = { 802*0bfacb9bSmrg { 803*0bfacb9bSmrg "nomve.fp", true, false, 804*0bfacb9bSmrg { 805*0bfacb9bSmrg isa_bit_mve_float, isa_nobit 806*0bfacb9bSmrg } 807*0bfacb9bSmrg }, 808*0bfacb9bSmrg { 809*0bfacb9bSmrg "nomve", true, false, 810*0bfacb9bSmrg { 811*0bfacb9bSmrg isa_bit_mve, isa_bit_mve_float, isa_nobit 812*0bfacb9bSmrg } 813*0bfacb9bSmrg }, 814*0bfacb9bSmrg { 815*0bfacb9bSmrg "nofp", true, false, 816*0bfacb9bSmrg { 817*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 818*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 819*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 820*0bfacb9bSmrg isa_bit_crypto, isa_bit_mve_float, isa_bit_fp_dbl, isa_nobit 821*0bfacb9bSmrg } 822*0bfacb9bSmrg }, 823*0bfacb9bSmrg { 824*0bfacb9bSmrg "nodsp", true, false, 825*0bfacb9bSmrg { 826*0bfacb9bSmrg isa_bit_mve, isa_bit_armv7em, isa_bit_mve_float, isa_nobit 827*0bfacb9bSmrg } 828*0bfacb9bSmrg }, 829*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 830*0bfacb9bSmrg }; 831*0bfacb9bSmrg 8328dd4bdcdSmrg static const cpu_arch_extension cpu_opttab_cortexr52[] = { 8338dd4bdcdSmrg { 8348dd4bdcdSmrg "nofp.dp", true, false, 8358dd4bdcdSmrg { 836*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 837*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 8388dd4bdcdSmrg } 8398dd4bdcdSmrg }, 8408dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 8418dd4bdcdSmrg }; 8428dd4bdcdSmrg 8438dd4bdcdSmrg const cpu_option all_cores[] = 8448dd4bdcdSmrg { 8458dd4bdcdSmrg { 8468dd4bdcdSmrg { 8478dd4bdcdSmrg "arm8", 8488dd4bdcdSmrg NULL, 8498dd4bdcdSmrg { 850760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8518dd4bdcdSmrg } 8528dd4bdcdSmrg }, 853760c2415Smrg NULL, 8548dd4bdcdSmrg TARGET_ARCH_armv4 8558dd4bdcdSmrg }, 8568dd4bdcdSmrg { 8578dd4bdcdSmrg { 8588dd4bdcdSmrg "arm810", 8598dd4bdcdSmrg NULL, 8608dd4bdcdSmrg { 861760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8628dd4bdcdSmrg } 8638dd4bdcdSmrg }, 864760c2415Smrg NULL, 8658dd4bdcdSmrg TARGET_ARCH_armv4 8668dd4bdcdSmrg }, 8678dd4bdcdSmrg { 8688dd4bdcdSmrg { 8698dd4bdcdSmrg "strongarm", 8708dd4bdcdSmrg NULL, 8718dd4bdcdSmrg { 872760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8738dd4bdcdSmrg } 8748dd4bdcdSmrg }, 875760c2415Smrg cpu_aliastab_strongarm, 8768dd4bdcdSmrg TARGET_ARCH_armv4 8778dd4bdcdSmrg }, 8788dd4bdcdSmrg { 8798dd4bdcdSmrg { 8808dd4bdcdSmrg "fa526", 8818dd4bdcdSmrg NULL, 8828dd4bdcdSmrg { 883760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8848dd4bdcdSmrg } 8858dd4bdcdSmrg }, 886760c2415Smrg NULL, 8878dd4bdcdSmrg TARGET_ARCH_armv4 8888dd4bdcdSmrg }, 8898dd4bdcdSmrg { 8908dd4bdcdSmrg { 8918dd4bdcdSmrg "fa626", 8928dd4bdcdSmrg NULL, 8938dd4bdcdSmrg { 894760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 8958dd4bdcdSmrg } 8968dd4bdcdSmrg }, 897760c2415Smrg NULL, 8988dd4bdcdSmrg TARGET_ARCH_armv4 8998dd4bdcdSmrg }, 9008dd4bdcdSmrg { 9018dd4bdcdSmrg { 9028dd4bdcdSmrg "arm7tdmi", 9038dd4bdcdSmrg NULL, 9048dd4bdcdSmrg { 905760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 9068dd4bdcdSmrg } 9078dd4bdcdSmrg }, 908760c2415Smrg cpu_aliastab_arm7tdmi, 9098dd4bdcdSmrg TARGET_ARCH_armv4t 9108dd4bdcdSmrg }, 9118dd4bdcdSmrg { 9128dd4bdcdSmrg { 9138dd4bdcdSmrg "arm710t", 9148dd4bdcdSmrg NULL, 9158dd4bdcdSmrg { 916760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 9178dd4bdcdSmrg } 9188dd4bdcdSmrg }, 919760c2415Smrg cpu_aliastab_arm710t, 9208dd4bdcdSmrg TARGET_ARCH_armv4t 9218dd4bdcdSmrg }, 9228dd4bdcdSmrg { 9238dd4bdcdSmrg { 9248dd4bdcdSmrg "arm9", 9258dd4bdcdSmrg NULL, 9268dd4bdcdSmrg { 927760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 9288dd4bdcdSmrg } 9298dd4bdcdSmrg }, 930760c2415Smrg NULL, 9318dd4bdcdSmrg TARGET_ARCH_armv4t 9328dd4bdcdSmrg }, 9338dd4bdcdSmrg { 9348dd4bdcdSmrg { 9358dd4bdcdSmrg "arm9tdmi", 9368dd4bdcdSmrg NULL, 9378dd4bdcdSmrg { 938760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 9398dd4bdcdSmrg } 9408dd4bdcdSmrg }, 9418dd4bdcdSmrg NULL, 9428dd4bdcdSmrg TARGET_ARCH_armv4t 9438dd4bdcdSmrg }, 9448dd4bdcdSmrg { 9458dd4bdcdSmrg { 9468dd4bdcdSmrg "arm920t", 9478dd4bdcdSmrg NULL, 9488dd4bdcdSmrg { 949760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 9508dd4bdcdSmrg } 9518dd4bdcdSmrg }, 952760c2415Smrg cpu_aliastab_arm920t, 9538dd4bdcdSmrg TARGET_ARCH_armv4t 9548dd4bdcdSmrg }, 9558dd4bdcdSmrg { 9568dd4bdcdSmrg { 9578dd4bdcdSmrg "arm10tdmi", 9588dd4bdcdSmrg NULL, 9598dd4bdcdSmrg { 960760c2415Smrg isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, 961760c2415Smrg isa_nobit 9628dd4bdcdSmrg } 9638dd4bdcdSmrg }, 964760c2415Smrg cpu_aliastab_arm10tdmi, 9658dd4bdcdSmrg TARGET_ARCH_armv5t 9668dd4bdcdSmrg }, 9678dd4bdcdSmrg { 9688dd4bdcdSmrg { 9698dd4bdcdSmrg "arm9e", 9708dd4bdcdSmrg cpu_opttab_arm9e, 9718dd4bdcdSmrg { 972760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 973760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 9748dd4bdcdSmrg } 9758dd4bdcdSmrg }, 976760c2415Smrg cpu_aliastab_arm9e, 9778dd4bdcdSmrg TARGET_ARCH_armv5te 9788dd4bdcdSmrg }, 9798dd4bdcdSmrg { 9808dd4bdcdSmrg { 9818dd4bdcdSmrg "arm10e", 9828dd4bdcdSmrg cpu_opttab_arm10e, 9838dd4bdcdSmrg { 984760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 985760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 9868dd4bdcdSmrg } 9878dd4bdcdSmrg }, 988760c2415Smrg cpu_aliastab_arm10e, 9898dd4bdcdSmrg TARGET_ARCH_armv5te 9908dd4bdcdSmrg }, 9918dd4bdcdSmrg { 9928dd4bdcdSmrg { 9938dd4bdcdSmrg "xscale", 9948dd4bdcdSmrg NULL, 9958dd4bdcdSmrg { 996760c2415Smrg isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, isa_bit_armv5t, 997760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 9988dd4bdcdSmrg } 9998dd4bdcdSmrg }, 1000760c2415Smrg NULL, 10018dd4bdcdSmrg TARGET_ARCH_armv5te 10028dd4bdcdSmrg }, 10038dd4bdcdSmrg { 10048dd4bdcdSmrg { 10058dd4bdcdSmrg "iwmmxt", 10068dd4bdcdSmrg NULL, 10078dd4bdcdSmrg { 1008760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 1009760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit 10108dd4bdcdSmrg } 10118dd4bdcdSmrg }, 1012760c2415Smrg NULL, 10138dd4bdcdSmrg TARGET_ARCH_iwmmxt 10148dd4bdcdSmrg }, 10158dd4bdcdSmrg { 10168dd4bdcdSmrg { 10178dd4bdcdSmrg "iwmmxt2", 10188dd4bdcdSmrg NULL, 10198dd4bdcdSmrg { 1020760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 1021760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm, 1022760c2415Smrg isa_nobit 10238dd4bdcdSmrg } 10248dd4bdcdSmrg }, 1025760c2415Smrg NULL, 10268dd4bdcdSmrg TARGET_ARCH_iwmmxt2 10278dd4bdcdSmrg }, 10288dd4bdcdSmrg { 10298dd4bdcdSmrg { 10308dd4bdcdSmrg "fa606te", 10318dd4bdcdSmrg NULL, 10328dd4bdcdSmrg { 1033760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 1034760c2415Smrg isa_bit_notm, isa_nobit 10358dd4bdcdSmrg } 10368dd4bdcdSmrg }, 1037760c2415Smrg NULL, 10388dd4bdcdSmrg TARGET_ARCH_armv5te 10398dd4bdcdSmrg }, 10408dd4bdcdSmrg { 10418dd4bdcdSmrg { 10428dd4bdcdSmrg "fa626te", 10438dd4bdcdSmrg NULL, 10448dd4bdcdSmrg { 1045760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 1046760c2415Smrg isa_bit_notm, isa_nobit 10478dd4bdcdSmrg } 10488dd4bdcdSmrg }, 1049760c2415Smrg NULL, 10508dd4bdcdSmrg TARGET_ARCH_armv5te 10518dd4bdcdSmrg }, 10528dd4bdcdSmrg { 10538dd4bdcdSmrg { 10548dd4bdcdSmrg "fmp626", 10558dd4bdcdSmrg NULL, 10568dd4bdcdSmrg { 1057760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 1058760c2415Smrg isa_bit_notm, isa_nobit 10598dd4bdcdSmrg } 10608dd4bdcdSmrg }, 1061760c2415Smrg NULL, 10628dd4bdcdSmrg TARGET_ARCH_armv5te 10638dd4bdcdSmrg }, 10648dd4bdcdSmrg { 10658dd4bdcdSmrg { 10668dd4bdcdSmrg "fa726te", 10678dd4bdcdSmrg NULL, 10688dd4bdcdSmrg { 1069760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 1070760c2415Smrg isa_bit_notm, isa_nobit 10718dd4bdcdSmrg } 10728dd4bdcdSmrg }, 1073760c2415Smrg NULL, 10748dd4bdcdSmrg TARGET_ARCH_armv5te 10758dd4bdcdSmrg }, 10768dd4bdcdSmrg { 10778dd4bdcdSmrg { 10788dd4bdcdSmrg "arm926ej-s", 10798dd4bdcdSmrg cpu_opttab_arm926ejs, 10808dd4bdcdSmrg { 1081760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 1082760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 10838dd4bdcdSmrg } 10848dd4bdcdSmrg }, 1085760c2415Smrg NULL, 10868dd4bdcdSmrg TARGET_ARCH_armv5tej 10878dd4bdcdSmrg }, 10888dd4bdcdSmrg { 10898dd4bdcdSmrg { 10908dd4bdcdSmrg "arm1026ej-s", 10918dd4bdcdSmrg cpu_opttab_arm1026ejs, 10928dd4bdcdSmrg { 1093760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, 1094760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit 10958dd4bdcdSmrg } 10968dd4bdcdSmrg }, 1097760c2415Smrg NULL, 10988dd4bdcdSmrg TARGET_ARCH_armv5tej 10998dd4bdcdSmrg }, 11008dd4bdcdSmrg { 11018dd4bdcdSmrg { 11028dd4bdcdSmrg "arm1136j-s", 11038dd4bdcdSmrg NULL, 11048dd4bdcdSmrg { 1105760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1106760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 11078dd4bdcdSmrg } 11088dd4bdcdSmrg }, 1109760c2415Smrg NULL, 11108dd4bdcdSmrg TARGET_ARCH_armv6j 11118dd4bdcdSmrg }, 11128dd4bdcdSmrg { 11138dd4bdcdSmrg { 11148dd4bdcdSmrg "arm1136jf-s", 11158dd4bdcdSmrg NULL, 11168dd4bdcdSmrg { 1117760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1118760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm, 1119760c2415Smrg isa_bit_fp_dbl, isa_nobit 11208dd4bdcdSmrg } 11218dd4bdcdSmrg }, 1122760c2415Smrg NULL, 11238dd4bdcdSmrg TARGET_ARCH_armv6j 11248dd4bdcdSmrg }, 11258dd4bdcdSmrg { 11268dd4bdcdSmrg { 11278dd4bdcdSmrg "arm1176jz-s", 11288dd4bdcdSmrg NULL, 11298dd4bdcdSmrg { 1130760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1131*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm, 1132760c2415Smrg isa_bit_armv6k, isa_nobit 11338dd4bdcdSmrg } 11348dd4bdcdSmrg }, 1135760c2415Smrg NULL, 11368dd4bdcdSmrg TARGET_ARCH_armv6kz 11378dd4bdcdSmrg }, 11388dd4bdcdSmrg { 11398dd4bdcdSmrg { 11408dd4bdcdSmrg "arm1176jzf-s", 11418dd4bdcdSmrg NULL, 11428dd4bdcdSmrg { 1143760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1144*0bfacb9bSmrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, 1145760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 11468dd4bdcdSmrg } 11478dd4bdcdSmrg }, 1148760c2415Smrg NULL, 11498dd4bdcdSmrg TARGET_ARCH_armv6kz 11508dd4bdcdSmrg }, 11518dd4bdcdSmrg { 11528dd4bdcdSmrg { 11538dd4bdcdSmrg "mpcorenovfp", 11548dd4bdcdSmrg NULL, 11558dd4bdcdSmrg { 1156760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1157760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k, 1158760c2415Smrg isa_nobit 11598dd4bdcdSmrg } 11608dd4bdcdSmrg }, 1161760c2415Smrg NULL, 11628dd4bdcdSmrg TARGET_ARCH_armv6k 11638dd4bdcdSmrg }, 11648dd4bdcdSmrg { 11658dd4bdcdSmrg { 11668dd4bdcdSmrg "mpcore", 11678dd4bdcdSmrg NULL, 11688dd4bdcdSmrg { 1169760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1170760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm, 1171760c2415Smrg isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 11728dd4bdcdSmrg } 11738dd4bdcdSmrg }, 1174760c2415Smrg NULL, 11758dd4bdcdSmrg TARGET_ARCH_armv6k 11768dd4bdcdSmrg }, 11778dd4bdcdSmrg { 11788dd4bdcdSmrg { 11798dd4bdcdSmrg "arm1156t2-s", 11808dd4bdcdSmrg NULL, 11818dd4bdcdSmrg { 1182760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1183760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm, 1184760c2415Smrg isa_nobit 11858dd4bdcdSmrg } 11868dd4bdcdSmrg }, 1187760c2415Smrg NULL, 11888dd4bdcdSmrg TARGET_ARCH_armv6t2 11898dd4bdcdSmrg }, 11908dd4bdcdSmrg { 11918dd4bdcdSmrg { 11928dd4bdcdSmrg "arm1156t2f-s", 11938dd4bdcdSmrg NULL, 11948dd4bdcdSmrg { 1195760c2415Smrg isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 1196760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, 1197760c2415Smrg isa_bit_notm, isa_bit_fp_dbl, isa_nobit 11988dd4bdcdSmrg } 11998dd4bdcdSmrg }, 1200760c2415Smrg NULL, 12018dd4bdcdSmrg TARGET_ARCH_armv6t2 12028dd4bdcdSmrg }, 12038dd4bdcdSmrg { 12048dd4bdcdSmrg { 12058dd4bdcdSmrg "cortex-m1", 12068dd4bdcdSmrg NULL, 12078dd4bdcdSmrg { 1208760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1209760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12108dd4bdcdSmrg } 12118dd4bdcdSmrg }, 1212760c2415Smrg NULL, 12138dd4bdcdSmrg TARGET_ARCH_armv6s_m 12148dd4bdcdSmrg }, 12158dd4bdcdSmrg { 12168dd4bdcdSmrg { 12178dd4bdcdSmrg "cortex-m0", 12188dd4bdcdSmrg NULL, 12198dd4bdcdSmrg { 1220760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1221760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12228dd4bdcdSmrg } 12238dd4bdcdSmrg }, 1224760c2415Smrg NULL, 12258dd4bdcdSmrg TARGET_ARCH_armv6s_m 12268dd4bdcdSmrg }, 12278dd4bdcdSmrg { 12288dd4bdcdSmrg { 12298dd4bdcdSmrg "cortex-m0plus", 12308dd4bdcdSmrg NULL, 12318dd4bdcdSmrg { 1232760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1233760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12348dd4bdcdSmrg } 12358dd4bdcdSmrg }, 1236760c2415Smrg NULL, 12378dd4bdcdSmrg TARGET_ARCH_armv6s_m 12388dd4bdcdSmrg }, 12398dd4bdcdSmrg { 12408dd4bdcdSmrg { 12418dd4bdcdSmrg "cortex-m1.small-multiply", 12428dd4bdcdSmrg NULL, 12438dd4bdcdSmrg { 1244760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1245760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12468dd4bdcdSmrg } 12478dd4bdcdSmrg }, 1248760c2415Smrg NULL, 12498dd4bdcdSmrg TARGET_ARCH_armv6s_m 12508dd4bdcdSmrg }, 12518dd4bdcdSmrg { 12528dd4bdcdSmrg { 12538dd4bdcdSmrg "cortex-m0.small-multiply", 12548dd4bdcdSmrg NULL, 12558dd4bdcdSmrg { 1256760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1257760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12588dd4bdcdSmrg } 12598dd4bdcdSmrg }, 1260760c2415Smrg NULL, 12618dd4bdcdSmrg TARGET_ARCH_armv6s_m 12628dd4bdcdSmrg }, 12638dd4bdcdSmrg { 12648dd4bdcdSmrg { 12658dd4bdcdSmrg "cortex-m0plus.small-multiply", 12668dd4bdcdSmrg NULL, 12678dd4bdcdSmrg { 1268760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1269760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 12708dd4bdcdSmrg } 12718dd4bdcdSmrg }, 1272760c2415Smrg NULL, 12738dd4bdcdSmrg TARGET_ARCH_armv6s_m 12748dd4bdcdSmrg }, 12758dd4bdcdSmrg { 12768dd4bdcdSmrg { 12778dd4bdcdSmrg "generic-armv7-a", 12788dd4bdcdSmrg cpu_opttab_genericv7a, 12798dd4bdcdSmrg { 1280*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_quirk_no_asmcpu, 1281*0bfacb9bSmrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1282*0bfacb9bSmrg isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, isa_bit_notm, 1283*0bfacb9bSmrg isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 12848dd4bdcdSmrg } 12858dd4bdcdSmrg }, 1286760c2415Smrg NULL, 12878dd4bdcdSmrg TARGET_ARCH_armv7_a 12888dd4bdcdSmrg }, 12898dd4bdcdSmrg { 12908dd4bdcdSmrg { 12918dd4bdcdSmrg "cortex-a5", 12928dd4bdcdSmrg cpu_opttab_cortexa5, 12938dd4bdcdSmrg { 1294760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1295760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1296760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1297760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1298760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 12998dd4bdcdSmrg } 13008dd4bdcdSmrg }, 1301760c2415Smrg NULL, 13028dd4bdcdSmrg TARGET_ARCH_armv7_a 13038dd4bdcdSmrg }, 13048dd4bdcdSmrg { 13058dd4bdcdSmrg { 13068dd4bdcdSmrg "cortex-a7", 13078dd4bdcdSmrg cpu_opttab_cortexa7, 13088dd4bdcdSmrg { 13098dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1310760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1311760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1312760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1313760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1314760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 13158dd4bdcdSmrg } 13168dd4bdcdSmrg }, 1317760c2415Smrg NULL, 13188dd4bdcdSmrg TARGET_ARCH_armv7ve 13198dd4bdcdSmrg }, 13208dd4bdcdSmrg { 13218dd4bdcdSmrg { 13228dd4bdcdSmrg "cortex-a8", 13238dd4bdcdSmrg cpu_opttab_cortexa8, 13248dd4bdcdSmrg { 1325760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1326760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1327760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1328760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_bit_sec, 1329760c2415Smrg isa_nobit 13308dd4bdcdSmrg } 13318dd4bdcdSmrg }, 1332760c2415Smrg NULL, 13338dd4bdcdSmrg TARGET_ARCH_armv7_a 13348dd4bdcdSmrg }, 13358dd4bdcdSmrg { 13368dd4bdcdSmrg { 13378dd4bdcdSmrg "cortex-a9", 13388dd4bdcdSmrg cpu_opttab_cortexa9, 13398dd4bdcdSmrg { 1340760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1341760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon, 1342760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2, 1343760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1344760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 13458dd4bdcdSmrg } 13468dd4bdcdSmrg }, 1347760c2415Smrg NULL, 13488dd4bdcdSmrg TARGET_ARCH_armv7_a 13498dd4bdcdSmrg }, 13508dd4bdcdSmrg { 13518dd4bdcdSmrg { 13528dd4bdcdSmrg "cortex-a12", 13538dd4bdcdSmrg cpu_opttab_cortexa12, 13548dd4bdcdSmrg { 13558dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1356760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1357760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1358760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1359760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1360760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 13618dd4bdcdSmrg } 13628dd4bdcdSmrg }, 1363760c2415Smrg NULL, 13648dd4bdcdSmrg TARGET_ARCH_armv7ve 13658dd4bdcdSmrg }, 13668dd4bdcdSmrg { 13678dd4bdcdSmrg { 13688dd4bdcdSmrg "cortex-a15", 13698dd4bdcdSmrg cpu_opttab_cortexa15, 13708dd4bdcdSmrg { 13718dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1372760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1373760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1374760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1375760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1376760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 13778dd4bdcdSmrg } 13788dd4bdcdSmrg }, 1379760c2415Smrg NULL, 13808dd4bdcdSmrg TARGET_ARCH_armv7ve 13818dd4bdcdSmrg }, 13828dd4bdcdSmrg { 13838dd4bdcdSmrg { 13848dd4bdcdSmrg "cortex-a17", 13858dd4bdcdSmrg cpu_opttab_cortexa17, 13868dd4bdcdSmrg { 13878dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1388760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1389760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1390760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1391760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1392760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 13938dd4bdcdSmrg } 13948dd4bdcdSmrg }, 1395760c2415Smrg NULL, 13968dd4bdcdSmrg TARGET_ARCH_armv7ve 13978dd4bdcdSmrg }, 13988dd4bdcdSmrg { 13998dd4bdcdSmrg { 14008dd4bdcdSmrg "cortex-r4", 14018dd4bdcdSmrg NULL, 14028dd4bdcdSmrg { 1403760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1404760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 1405760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit 14068dd4bdcdSmrg } 14078dd4bdcdSmrg }, 1408760c2415Smrg NULL, 14098dd4bdcdSmrg TARGET_ARCH_armv7_r 14108dd4bdcdSmrg }, 14118dd4bdcdSmrg { 14128dd4bdcdSmrg { 14138dd4bdcdSmrg "cortex-r4f", 14148dd4bdcdSmrg NULL, 14158dd4bdcdSmrg { 1416760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1417760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, 1418760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, 1419760c2415Smrg isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 14208dd4bdcdSmrg } 14218dd4bdcdSmrg }, 1422760c2415Smrg NULL, 14238dd4bdcdSmrg TARGET_ARCH_armv7_r 14248dd4bdcdSmrg }, 14258dd4bdcdSmrg { 14268dd4bdcdSmrg { 14278dd4bdcdSmrg "cortex-r5", 14288dd4bdcdSmrg cpu_opttab_cortexr5, 14298dd4bdcdSmrg { 1430760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1431760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1432760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1433760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit 14348dd4bdcdSmrg } 14358dd4bdcdSmrg }, 1436760c2415Smrg NULL, 14378dd4bdcdSmrg TARGET_ARCH_armv7_r 14388dd4bdcdSmrg }, 14398dd4bdcdSmrg { 14408dd4bdcdSmrg { 14418dd4bdcdSmrg "cortex-r7", 14428dd4bdcdSmrg cpu_opttab_cortexr7, 14438dd4bdcdSmrg { 1444760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1445760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1446760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1447760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl, 1448760c2415Smrg isa_nobit 14498dd4bdcdSmrg } 14508dd4bdcdSmrg }, 1451760c2415Smrg NULL, 14528dd4bdcdSmrg TARGET_ARCH_armv7_r 14538dd4bdcdSmrg }, 14548dd4bdcdSmrg { 14558dd4bdcdSmrg { 14568dd4bdcdSmrg "cortex-r8", 14578dd4bdcdSmrg cpu_opttab_cortexr8, 14588dd4bdcdSmrg { 1459760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te, 1460760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1461760c2415Smrg isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, 1462760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl, 1463760c2415Smrg isa_nobit 14648dd4bdcdSmrg } 14658dd4bdcdSmrg }, 1466760c2415Smrg NULL, 14678dd4bdcdSmrg TARGET_ARCH_armv7_r 14688dd4bdcdSmrg }, 14698dd4bdcdSmrg { 14708dd4bdcdSmrg { 14718dd4bdcdSmrg "cortex-m7", 14728dd4bdcdSmrg cpu_opttab_cortexm7, 14738dd4bdcdSmrg { 1474760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1475760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 14768dd4bdcdSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_fpv5, 1477760c2415Smrg isa_bit_tdiv, isa_bit_quirk_no_volatile_ce, isa_bit_thumb2, isa_bit_fp16conv, 1478760c2415Smrg isa_bit_fp_dbl, isa_nobit 14798dd4bdcdSmrg } 14808dd4bdcdSmrg }, 1481760c2415Smrg NULL, 14828dd4bdcdSmrg TARGET_ARCH_armv7e_m 14838dd4bdcdSmrg }, 14848dd4bdcdSmrg { 14858dd4bdcdSmrg { 14868dd4bdcdSmrg "cortex-m4", 14878dd4bdcdSmrg cpu_opttab_cortexm4, 14888dd4bdcdSmrg { 1489760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1490760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 14918dd4bdcdSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_tdiv, 1492760c2415Smrg isa_bit_thumb2, isa_bit_fp16conv, isa_nobit 14938dd4bdcdSmrg } 14948dd4bdcdSmrg }, 1495760c2415Smrg NULL, 14968dd4bdcdSmrg TARGET_ARCH_armv7e_m 14978dd4bdcdSmrg }, 14988dd4bdcdSmrg { 14998dd4bdcdSmrg { 15008dd4bdcdSmrg "cortex-m3", 15018dd4bdcdSmrg NULL, 15028dd4bdcdSmrg { 1503760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_quirk_cm3_ldrd, isa_bit_be8, 1504760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, 1505760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_nobit 15068dd4bdcdSmrg } 15078dd4bdcdSmrg }, 1508760c2415Smrg NULL, 15098dd4bdcdSmrg TARGET_ARCH_armv7_m 15108dd4bdcdSmrg }, 15118dd4bdcdSmrg { 15128dd4bdcdSmrg { 15138dd4bdcdSmrg "marvell-pj4", 15148dd4bdcdSmrg NULL, 15158dd4bdcdSmrg { 1516*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb, 1517*0bfacb9bSmrg isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, 1518*0bfacb9bSmrg isa_bit_armv7, isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, 1519*0bfacb9bSmrg isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec, isa_nobit 15208dd4bdcdSmrg } 15218dd4bdcdSmrg }, 1522760c2415Smrg NULL, 15238dd4bdcdSmrg TARGET_ARCH_armv7_a 15248dd4bdcdSmrg }, 15258dd4bdcdSmrg { 15268dd4bdcdSmrg { 15278dd4bdcdSmrg "cortex-a15.cortex-a7", 15288dd4bdcdSmrg cpu_opttab_cortexa15cortexa7, 15298dd4bdcdSmrg { 15308dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1531760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1532760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1533760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1534760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1535760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 15368dd4bdcdSmrg } 15378dd4bdcdSmrg }, 1538760c2415Smrg NULL, 15398dd4bdcdSmrg TARGET_ARCH_armv7ve 15408dd4bdcdSmrg }, 15418dd4bdcdSmrg { 15428dd4bdcdSmrg { 15438dd4bdcdSmrg "cortex-a17.cortex-a7", 15448dd4bdcdSmrg cpu_opttab_cortexa17cortexa7, 15458dd4bdcdSmrg { 15468dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1547760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1548760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1549760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1550760c2415Smrg isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, 1551760c2415Smrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 15528dd4bdcdSmrg } 15538dd4bdcdSmrg }, 1554760c2415Smrg NULL, 15558dd4bdcdSmrg TARGET_ARCH_armv7ve 15568dd4bdcdSmrg }, 15578dd4bdcdSmrg { 15588dd4bdcdSmrg { 15598dd4bdcdSmrg "cortex-a32", 15608dd4bdcdSmrg cpu_opttab_cortexa32, 15618dd4bdcdSmrg { 15628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1563760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1564760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15658dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1566760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1567760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1568760c2415Smrg isa_bit_sec, isa_nobit 15698dd4bdcdSmrg } 15708dd4bdcdSmrg }, 1571760c2415Smrg NULL, 15728dd4bdcdSmrg TARGET_ARCH_armv8_a 15738dd4bdcdSmrg }, 15748dd4bdcdSmrg { 15758dd4bdcdSmrg { 15768dd4bdcdSmrg "cortex-a35", 15778dd4bdcdSmrg cpu_opttab_cortexa35, 15788dd4bdcdSmrg { 15798dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1580760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1581760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15828dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1583760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1584760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1585760c2415Smrg isa_bit_sec, isa_nobit 15868dd4bdcdSmrg } 15878dd4bdcdSmrg }, 1588760c2415Smrg NULL, 15898dd4bdcdSmrg TARGET_ARCH_armv8_a 15908dd4bdcdSmrg }, 15918dd4bdcdSmrg { 15928dd4bdcdSmrg { 15938dd4bdcdSmrg "cortex-a53", 15948dd4bdcdSmrg cpu_opttab_cortexa53, 15958dd4bdcdSmrg { 15968dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1597760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1598760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 15998dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1600760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1601760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1602760c2415Smrg isa_bit_sec, isa_nobit 16038dd4bdcdSmrg } 16048dd4bdcdSmrg }, 1605760c2415Smrg NULL, 16068dd4bdcdSmrg TARGET_ARCH_armv8_a 16078dd4bdcdSmrg }, 16088dd4bdcdSmrg { 16098dd4bdcdSmrg { 16108dd4bdcdSmrg "cortex-a57", 16118dd4bdcdSmrg cpu_opttab_cortexa57, 16128dd4bdcdSmrg { 16138dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1614760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1615760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16168dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1617760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1618760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1619760c2415Smrg isa_bit_sec, isa_nobit 16208dd4bdcdSmrg } 16218dd4bdcdSmrg }, 1622760c2415Smrg NULL, 16238dd4bdcdSmrg TARGET_ARCH_armv8_a 16248dd4bdcdSmrg }, 16258dd4bdcdSmrg { 16268dd4bdcdSmrg { 16278dd4bdcdSmrg "cortex-a72", 16288dd4bdcdSmrg cpu_opttab_cortexa72, 16298dd4bdcdSmrg { 16308dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1631760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1632760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16338dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1634760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1635760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1636760c2415Smrg isa_bit_sec, isa_nobit 16378dd4bdcdSmrg } 16388dd4bdcdSmrg }, 1639760c2415Smrg NULL, 16408dd4bdcdSmrg TARGET_ARCH_armv8_a 16418dd4bdcdSmrg }, 16428dd4bdcdSmrg { 16438dd4bdcdSmrg { 16448dd4bdcdSmrg "cortex-a73", 16458dd4bdcdSmrg cpu_opttab_cortexa73, 16468dd4bdcdSmrg { 16478dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1648760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1649760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16508dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1651760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1652760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1653760c2415Smrg isa_bit_sec, isa_nobit 16548dd4bdcdSmrg } 16558dd4bdcdSmrg }, 1656760c2415Smrg NULL, 16578dd4bdcdSmrg TARGET_ARCH_armv8_a 16588dd4bdcdSmrg }, 16598dd4bdcdSmrg { 16608dd4bdcdSmrg { 16618dd4bdcdSmrg "exynos-m1", 16628dd4bdcdSmrg cpu_opttab_exynosm1, 16638dd4bdcdSmrg { 16648dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1665760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1666760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16678dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1668760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1669760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1670760c2415Smrg isa_bit_sec, isa_nobit 16718dd4bdcdSmrg } 16728dd4bdcdSmrg }, 1673760c2415Smrg NULL, 16748dd4bdcdSmrg TARGET_ARCH_armv8_a 16758dd4bdcdSmrg }, 16768dd4bdcdSmrg { 16778dd4bdcdSmrg { 16788dd4bdcdSmrg "xgene1", 16798dd4bdcdSmrg cpu_opttab_xgene1, 16808dd4bdcdSmrg { 16818dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1682760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1683760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 16848dd4bdcdSmrg isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, isa_bit_tdiv, 1685760c2415Smrg isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, isa_bit_fp16conv, 1686760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec, 1687760c2415Smrg isa_nobit 16888dd4bdcdSmrg } 16898dd4bdcdSmrg }, 1690760c2415Smrg NULL, 16918dd4bdcdSmrg TARGET_ARCH_armv8_a 16928dd4bdcdSmrg }, 16938dd4bdcdSmrg { 16948dd4bdcdSmrg { 16958dd4bdcdSmrg "cortex-a57.cortex-a53", 16968dd4bdcdSmrg cpu_opttab_cortexa57cortexa53, 16978dd4bdcdSmrg { 16988dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1699760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1700760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 17018dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1702760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1703760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1704760c2415Smrg isa_bit_sec, isa_nobit 17058dd4bdcdSmrg } 17068dd4bdcdSmrg }, 1707760c2415Smrg NULL, 17088dd4bdcdSmrg TARGET_ARCH_armv8_a 17098dd4bdcdSmrg }, 17108dd4bdcdSmrg { 17118dd4bdcdSmrg { 17128dd4bdcdSmrg "cortex-a72.cortex-a53", 17138dd4bdcdSmrg cpu_opttab_cortexa72cortexa53, 17148dd4bdcdSmrg { 17158dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1716760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1717760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 17188dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1719760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1720760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1721760c2415Smrg isa_bit_sec, isa_nobit 17228dd4bdcdSmrg } 17238dd4bdcdSmrg }, 1724760c2415Smrg NULL, 17258dd4bdcdSmrg TARGET_ARCH_armv8_a 17268dd4bdcdSmrg }, 17278dd4bdcdSmrg { 17288dd4bdcdSmrg { 17298dd4bdcdSmrg "cortex-a73.cortex-a35", 17308dd4bdcdSmrg cpu_opttab_cortexa73cortexa35, 17318dd4bdcdSmrg { 17328dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1733760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1734760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 17358dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1736760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1737760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1738760c2415Smrg isa_bit_sec, isa_nobit 17398dd4bdcdSmrg } 17408dd4bdcdSmrg }, 1741760c2415Smrg NULL, 17428dd4bdcdSmrg TARGET_ARCH_armv8_a 17438dd4bdcdSmrg }, 17448dd4bdcdSmrg { 17458dd4bdcdSmrg { 17468dd4bdcdSmrg "cortex-a73.cortex-a53", 17478dd4bdcdSmrg cpu_opttab_cortexa73cortexa53, 17488dd4bdcdSmrg { 17498dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1750760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1751760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 17528dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1753760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1754760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1755760c2415Smrg isa_bit_sec, isa_nobit 17568dd4bdcdSmrg } 17578dd4bdcdSmrg }, 1758760c2415Smrg NULL, 17598dd4bdcdSmrg TARGET_ARCH_armv8_a 17608dd4bdcdSmrg }, 17618dd4bdcdSmrg { 17628dd4bdcdSmrg { 17638dd4bdcdSmrg "cortex-a55", 17648dd4bdcdSmrg cpu_opttab_cortexa55, 17658dd4bdcdSmrg { 17668dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1767760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1768760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1769*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1770760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1771760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1772760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1773760c2415Smrg isa_bit_sec, isa_nobit 17748dd4bdcdSmrg } 17758dd4bdcdSmrg }, 1776760c2415Smrg NULL, 17778dd4bdcdSmrg TARGET_ARCH_armv8_2_a 17788dd4bdcdSmrg }, 17798dd4bdcdSmrg { 17808dd4bdcdSmrg { 17818dd4bdcdSmrg "cortex-a75", 17828dd4bdcdSmrg cpu_opttab_cortexa75, 17838dd4bdcdSmrg { 17848dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1785760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1786760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1787*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1788760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1789760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1790760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1791760c2415Smrg isa_bit_sec, isa_nobit 17928dd4bdcdSmrg } 17938dd4bdcdSmrg }, 1794760c2415Smrg NULL, 1795760c2415Smrg TARGET_ARCH_armv8_2_a 1796760c2415Smrg }, 1797760c2415Smrg { 1798760c2415Smrg { 1799760c2415Smrg "cortex-a76", 1800760c2415Smrg cpu_opttab_cortexa76, 1801760c2415Smrg { 1802760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1803760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1804760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1805*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1806*0bfacb9bSmrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1807*0bfacb9bSmrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1808*0bfacb9bSmrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1809*0bfacb9bSmrg isa_bit_sec, isa_nobit 1810*0bfacb9bSmrg } 1811*0bfacb9bSmrg }, 1812*0bfacb9bSmrg NULL, 1813*0bfacb9bSmrg TARGET_ARCH_armv8_2_a 1814*0bfacb9bSmrg }, 1815*0bfacb9bSmrg { 1816*0bfacb9bSmrg { 1817*0bfacb9bSmrg "cortex-a76ae", 1818*0bfacb9bSmrg cpu_opttab_cortexa76ae, 1819*0bfacb9bSmrg { 1820*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1821*0bfacb9bSmrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1822*0bfacb9bSmrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1823*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1824*0bfacb9bSmrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1825*0bfacb9bSmrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1826*0bfacb9bSmrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1827*0bfacb9bSmrg isa_bit_sec, isa_nobit 1828*0bfacb9bSmrg } 1829*0bfacb9bSmrg }, 1830*0bfacb9bSmrg NULL, 1831*0bfacb9bSmrg TARGET_ARCH_armv8_2_a 1832*0bfacb9bSmrg }, 1833*0bfacb9bSmrg { 1834*0bfacb9bSmrg { 1835*0bfacb9bSmrg "cortex-a77", 1836*0bfacb9bSmrg cpu_opttab_cortexa77, 1837*0bfacb9bSmrg { 1838*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1839*0bfacb9bSmrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1840*0bfacb9bSmrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1841*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1842760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1843760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1844760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1845760c2415Smrg isa_bit_sec, isa_nobit 1846760c2415Smrg } 1847760c2415Smrg }, 1848760c2415Smrg NULL, 1849760c2415Smrg TARGET_ARCH_armv8_2_a 1850760c2415Smrg }, 1851760c2415Smrg { 1852760c2415Smrg { 1853760c2415Smrg "neoverse-n1", 1854760c2415Smrg cpu_opttab_neoversen1, 1855760c2415Smrg { 1856760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1857760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1858760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1859*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1860760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1861760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1862760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1863760c2415Smrg isa_bit_sec, isa_nobit 1864760c2415Smrg } 1865760c2415Smrg }, 1866760c2415Smrg cpu_aliastab_neoversen1, 18678dd4bdcdSmrg TARGET_ARCH_armv8_2_a 18688dd4bdcdSmrg }, 18698dd4bdcdSmrg { 18708dd4bdcdSmrg { 18718dd4bdcdSmrg "cortex-a75.cortex-a55", 18728dd4bdcdSmrg cpu_opttab_cortexa75cortexa55, 18738dd4bdcdSmrg { 18748dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1875760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1876760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1877*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1878760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1879760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1880760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1881760c2415Smrg isa_bit_sec, isa_nobit 18828dd4bdcdSmrg } 18838dd4bdcdSmrg }, 1884760c2415Smrg NULL, 1885760c2415Smrg TARGET_ARCH_armv8_2_a 1886760c2415Smrg }, 1887760c2415Smrg { 1888760c2415Smrg { 1889760c2415Smrg "cortex-a76.cortex-a55", 1890760c2415Smrg cpu_opttab_cortexa76cortexa55, 1891760c2415Smrg { 1892760c2415Smrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1893760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1894760c2415Smrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1895*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1896760c2415Smrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1897760c2415Smrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1898760c2415Smrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 1899760c2415Smrg isa_bit_sec, isa_nobit 1900760c2415Smrg } 1901760c2415Smrg }, 1902760c2415Smrg NULL, 19038dd4bdcdSmrg TARGET_ARCH_armv8_2_a 19048dd4bdcdSmrg }, 19058dd4bdcdSmrg { 19068dd4bdcdSmrg { 1907*0bfacb9bSmrg "neoverse-v1", 1908*0bfacb9bSmrg cpu_opttab_neoversev1, 1909*0bfacb9bSmrg { 1910*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1911*0bfacb9bSmrg isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16, 1912*0bfacb9bSmrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_dotprod, 1913*0bfacb9bSmrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 1914*0bfacb9bSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 1915*0bfacb9bSmrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 1916*0bfacb9bSmrg isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, isa_bit_armv8_2, 1917*0bfacb9bSmrg isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp, 1918*0bfacb9bSmrg isa_bit_fp_dbl, isa_bit_sec, isa_nobit 1919*0bfacb9bSmrg } 1920*0bfacb9bSmrg }, 1921*0bfacb9bSmrg NULL, 1922*0bfacb9bSmrg TARGET_ARCH_armv8_4_a 1923*0bfacb9bSmrg }, 1924*0bfacb9bSmrg { 1925*0bfacb9bSmrg { 1926*0bfacb9bSmrg "neoverse-n2", 1927*0bfacb9bSmrg cpu_opttab_neoversen2, 1928*0bfacb9bSmrg { 1929*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 1930*0bfacb9bSmrg isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16, 1931*0bfacb9bSmrg isa_bit_sb, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1932*0bfacb9bSmrg isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon, 1933*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 1934*0bfacb9bSmrg isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, 1935*0bfacb9bSmrg isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, 1936*0bfacb9bSmrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, 1937*0bfacb9bSmrg isa_bit_mp, isa_bit_armv8_5, isa_bit_fp_dbl, isa_bit_sec, 1938*0bfacb9bSmrg isa_bit_predres, isa_nobit 1939*0bfacb9bSmrg } 1940*0bfacb9bSmrg }, 1941*0bfacb9bSmrg NULL, 1942*0bfacb9bSmrg TARGET_ARCH_armv8_5_a 1943*0bfacb9bSmrg }, 1944*0bfacb9bSmrg { 1945*0bfacb9bSmrg { 19468dd4bdcdSmrg "cortex-m23", 19478dd4bdcdSmrg NULL, 19488dd4bdcdSmrg { 1949760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 1950*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse, 1951760c2415Smrg isa_bit_tdiv, isa_nobit 19528dd4bdcdSmrg } 19538dd4bdcdSmrg }, 1954760c2415Smrg NULL, 19558dd4bdcdSmrg TARGET_ARCH_armv8_m_base 19568dd4bdcdSmrg }, 19578dd4bdcdSmrg { 19588dd4bdcdSmrg { 19598dd4bdcdSmrg "cortex-m33", 19608dd4bdcdSmrg cpu_opttab_cortexm33, 19618dd4bdcdSmrg { 1962760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1963760c2415Smrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1964*0bfacb9bSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8, 1965*0bfacb9bSmrg isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv, 1966*0bfacb9bSmrg isa_bit_thumb2, isa_bit_fp16conv, isa_nobit 19678dd4bdcdSmrg } 19688dd4bdcdSmrg }, 1969760c2415Smrg NULL, 19708dd4bdcdSmrg TARGET_ARCH_armv8_m_main 19718dd4bdcdSmrg }, 19728dd4bdcdSmrg { 19738dd4bdcdSmrg { 1974*0bfacb9bSmrg "cortex-m35p", 1975*0bfacb9bSmrg cpu_opttab_cortexm35p, 1976*0bfacb9bSmrg { 1977*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te, 1978*0bfacb9bSmrg isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, 1979*0bfacb9bSmrg isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8, 1980*0bfacb9bSmrg isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv, 1981*0bfacb9bSmrg isa_bit_thumb2, isa_bit_fp16conv, isa_nobit 1982*0bfacb9bSmrg } 1983*0bfacb9bSmrg }, 1984*0bfacb9bSmrg NULL, 1985*0bfacb9bSmrg TARGET_ARCH_armv8_m_main 1986*0bfacb9bSmrg }, 1987*0bfacb9bSmrg { 1988*0bfacb9bSmrg { 1989*0bfacb9bSmrg "cortex-m55", 1990*0bfacb9bSmrg cpu_opttab_cortexm55, 1991*0bfacb9bSmrg { 1992*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve, 1993*0bfacb9bSmrg isa_bit_armv5te, isa_bit_quirk_no_asmcpu, isa_bit_thumb, isa_bit_be8, 1994*0bfacb9bSmrg isa_bit_armv5t, isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6, 1995*0bfacb9bSmrg isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8, isa_bit_cmse, 1996*0bfacb9bSmrg isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv, isa_bit_thumb2, 1997*0bfacb9bSmrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_bit_mve_float, 1998*0bfacb9bSmrg isa_nobit 1999*0bfacb9bSmrg } 2000*0bfacb9bSmrg }, 2001*0bfacb9bSmrg NULL, 2002*0bfacb9bSmrg TARGET_ARCH_armv8_1_m_main 2003*0bfacb9bSmrg }, 2004*0bfacb9bSmrg { 2005*0bfacb9bSmrg { 20068dd4bdcdSmrg "cortex-r52", 20078dd4bdcdSmrg cpu_opttab_cortexr52, 20088dd4bdcdSmrg { 20098dd4bdcdSmrg isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4, 2010760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 2011760c2415Smrg isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6, 20128dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, 2013760c2415Smrg isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, 2014760c2415Smrg isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, 2015760c2415Smrg isa_bit_sec, isa_nobit 20168dd4bdcdSmrg } 20178dd4bdcdSmrg }, 2018760c2415Smrg NULL, 20198dd4bdcdSmrg TARGET_ARCH_armv8_r 20208dd4bdcdSmrg }, 2021760c2415Smrg {{NULL, NULL, {isa_nobit}}, NULL, TARGET_ARCH_arm_none} 20228dd4bdcdSmrg }; 20238dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv5te[] = { 20248dd4bdcdSmrg { 20258dd4bdcdSmrg "fp", false, false, 20268dd4bdcdSmrg { 20278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20288dd4bdcdSmrg } 20298dd4bdcdSmrg }, 20308dd4bdcdSmrg { 20318dd4bdcdSmrg "nofp", true, false, 20328dd4bdcdSmrg { 2033*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2034*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 20358dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 20368dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 20378dd4bdcdSmrg } 20388dd4bdcdSmrg }, 20398dd4bdcdSmrg { 20408dd4bdcdSmrg "vfpv2", false, true, 20418dd4bdcdSmrg { 20428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20438dd4bdcdSmrg } 20448dd4bdcdSmrg }, 20458dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 20468dd4bdcdSmrg }; 20478dd4bdcdSmrg 20488dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv5tej[] = { 20498dd4bdcdSmrg { 20508dd4bdcdSmrg "fp", false, false, 20518dd4bdcdSmrg { 20528dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20538dd4bdcdSmrg } 20548dd4bdcdSmrg }, 20558dd4bdcdSmrg { 20568dd4bdcdSmrg "nofp", true, false, 20578dd4bdcdSmrg { 2058*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2059*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 20608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 20618dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 20628dd4bdcdSmrg } 20638dd4bdcdSmrg }, 20648dd4bdcdSmrg { 20658dd4bdcdSmrg "vfpv2", false, true, 20668dd4bdcdSmrg { 20678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20688dd4bdcdSmrg } 20698dd4bdcdSmrg }, 20708dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 20718dd4bdcdSmrg }; 20728dd4bdcdSmrg 20738dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6[] = { 20748dd4bdcdSmrg { 20758dd4bdcdSmrg "fp", false, false, 20768dd4bdcdSmrg { 20778dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20788dd4bdcdSmrg } 20798dd4bdcdSmrg }, 20808dd4bdcdSmrg { 20818dd4bdcdSmrg "nofp", true, false, 20828dd4bdcdSmrg { 2083*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2084*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 20858dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 20868dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 20878dd4bdcdSmrg } 20888dd4bdcdSmrg }, 20898dd4bdcdSmrg { 20908dd4bdcdSmrg "vfpv2", false, true, 20918dd4bdcdSmrg { 20928dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 20938dd4bdcdSmrg } 20948dd4bdcdSmrg }, 20958dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 20968dd4bdcdSmrg }; 20978dd4bdcdSmrg 20988dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6j[] = { 20998dd4bdcdSmrg { 21008dd4bdcdSmrg "fp", false, false, 21018dd4bdcdSmrg { 21028dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21038dd4bdcdSmrg } 21048dd4bdcdSmrg }, 21058dd4bdcdSmrg { 21068dd4bdcdSmrg "nofp", true, false, 21078dd4bdcdSmrg { 2108*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2109*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 21108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 21118dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 21128dd4bdcdSmrg } 21138dd4bdcdSmrg }, 21148dd4bdcdSmrg { 21158dd4bdcdSmrg "vfpv2", false, true, 21168dd4bdcdSmrg { 21178dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21188dd4bdcdSmrg } 21198dd4bdcdSmrg }, 21208dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 21218dd4bdcdSmrg }; 21228dd4bdcdSmrg 21238dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6k[] = { 21248dd4bdcdSmrg { 21258dd4bdcdSmrg "fp", false, false, 21268dd4bdcdSmrg { 21278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21288dd4bdcdSmrg } 21298dd4bdcdSmrg }, 21308dd4bdcdSmrg { 21318dd4bdcdSmrg "nofp", true, false, 21328dd4bdcdSmrg { 2133*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2134*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 21358dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 21368dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 21378dd4bdcdSmrg } 21388dd4bdcdSmrg }, 21398dd4bdcdSmrg { 21408dd4bdcdSmrg "vfpv2", false, true, 21418dd4bdcdSmrg { 21428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21438dd4bdcdSmrg } 21448dd4bdcdSmrg }, 21458dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 21468dd4bdcdSmrg }; 21478dd4bdcdSmrg 21488dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6z[] = { 21498dd4bdcdSmrg { 21508dd4bdcdSmrg "fp", false, false, 21518dd4bdcdSmrg { 21528dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21538dd4bdcdSmrg } 21548dd4bdcdSmrg }, 21558dd4bdcdSmrg { 21568dd4bdcdSmrg "nofp", true, false, 21578dd4bdcdSmrg { 2158*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2159*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 21608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 21618dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 21628dd4bdcdSmrg } 21638dd4bdcdSmrg }, 21648dd4bdcdSmrg { 21658dd4bdcdSmrg "vfpv2", false, true, 21668dd4bdcdSmrg { 21678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21688dd4bdcdSmrg } 21698dd4bdcdSmrg }, 21708dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 21718dd4bdcdSmrg }; 21728dd4bdcdSmrg 21738dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6kz[] = { 21748dd4bdcdSmrg { 21758dd4bdcdSmrg "fp", false, false, 21768dd4bdcdSmrg { 21778dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21788dd4bdcdSmrg } 21798dd4bdcdSmrg }, 21808dd4bdcdSmrg { 21818dd4bdcdSmrg "nofp", true, false, 21828dd4bdcdSmrg { 2183*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2184*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 21858dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 21868dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 21878dd4bdcdSmrg } 21888dd4bdcdSmrg }, 21898dd4bdcdSmrg { 21908dd4bdcdSmrg "vfpv2", false, true, 21918dd4bdcdSmrg { 21928dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 21938dd4bdcdSmrg } 21948dd4bdcdSmrg }, 21958dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 21968dd4bdcdSmrg }; 21978dd4bdcdSmrg 21988dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6zk[] = { 21998dd4bdcdSmrg { 22008dd4bdcdSmrg "fp", false, false, 22018dd4bdcdSmrg { 22028dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 22038dd4bdcdSmrg } 22048dd4bdcdSmrg }, 22058dd4bdcdSmrg { 22068dd4bdcdSmrg "nofp", true, false, 22078dd4bdcdSmrg { 2208*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2209*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 22108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 22118dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 22128dd4bdcdSmrg } 22138dd4bdcdSmrg }, 22148dd4bdcdSmrg { 22158dd4bdcdSmrg "vfpv2", false, true, 22168dd4bdcdSmrg { 22178dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 22188dd4bdcdSmrg } 22198dd4bdcdSmrg }, 22208dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 22218dd4bdcdSmrg }; 22228dd4bdcdSmrg 22238dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv6t2[] = { 22248dd4bdcdSmrg { 22258dd4bdcdSmrg "fp", false, false, 22268dd4bdcdSmrg { 22278dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 22288dd4bdcdSmrg } 22298dd4bdcdSmrg }, 22308dd4bdcdSmrg { 22318dd4bdcdSmrg "nofp", true, false, 22328dd4bdcdSmrg { 2233*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2234*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 22358dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 22368dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 22378dd4bdcdSmrg } 22388dd4bdcdSmrg }, 22398dd4bdcdSmrg { 22408dd4bdcdSmrg "vfpv2", false, true, 22418dd4bdcdSmrg { 22428dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 22438dd4bdcdSmrg } 22448dd4bdcdSmrg }, 22458dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 22468dd4bdcdSmrg }; 22478dd4bdcdSmrg 22488dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7[] = { 22498dd4bdcdSmrg { 22508dd4bdcdSmrg "fp", false, false, 22518dd4bdcdSmrg { 22528dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 22538dd4bdcdSmrg } 22548dd4bdcdSmrg }, 22558dd4bdcdSmrg { 22568dd4bdcdSmrg "nofp", true, false, 22578dd4bdcdSmrg { 2258*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2259*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 22608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 22618dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 22628dd4bdcdSmrg } 22638dd4bdcdSmrg }, 22648dd4bdcdSmrg { 22658dd4bdcdSmrg "vfpv3-d16", false, true, 22668dd4bdcdSmrg { 22678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 22688dd4bdcdSmrg } 22698dd4bdcdSmrg }, 22708dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 22718dd4bdcdSmrg }; 22728dd4bdcdSmrg 22738dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7_a[] = { 22748dd4bdcdSmrg { 22758dd4bdcdSmrg "mp", false, false, 22768dd4bdcdSmrg { 22778dd4bdcdSmrg isa_bit_mp, isa_nobit 22788dd4bdcdSmrg } 22798dd4bdcdSmrg }, 22808dd4bdcdSmrg { 22818dd4bdcdSmrg "sec", false, false, 22828dd4bdcdSmrg { 22838dd4bdcdSmrg isa_bit_sec, isa_nobit 22848dd4bdcdSmrg } 22858dd4bdcdSmrg }, 22868dd4bdcdSmrg { 22878dd4bdcdSmrg "fp", false, false, 22888dd4bdcdSmrg { 22898dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 22908dd4bdcdSmrg } 22918dd4bdcdSmrg }, 22928dd4bdcdSmrg { 22938dd4bdcdSmrg "vfpv3", false, false, 22948dd4bdcdSmrg { 22958dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 22968dd4bdcdSmrg isa_nobit 22978dd4bdcdSmrg } 22988dd4bdcdSmrg }, 22998dd4bdcdSmrg { 23008dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 23018dd4bdcdSmrg { 23028dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 23038dd4bdcdSmrg isa_nobit 23048dd4bdcdSmrg } 23058dd4bdcdSmrg }, 23068dd4bdcdSmrg { 23078dd4bdcdSmrg "vfpv3-fp16", false, false, 23088dd4bdcdSmrg { 23098dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 23108dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23118dd4bdcdSmrg } 23128dd4bdcdSmrg }, 23138dd4bdcdSmrg { 23148dd4bdcdSmrg "vfpv4-d16", false, false, 23158dd4bdcdSmrg { 23168dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 23178dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23188dd4bdcdSmrg } 23198dd4bdcdSmrg }, 23208dd4bdcdSmrg { 23218dd4bdcdSmrg "vfpv4", false, false, 23228dd4bdcdSmrg { 23238dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 23248dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 23258dd4bdcdSmrg } 23268dd4bdcdSmrg }, 23278dd4bdcdSmrg { 23288dd4bdcdSmrg "simd", false, false, 23298dd4bdcdSmrg { 23308dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 23318dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23328dd4bdcdSmrg } 23338dd4bdcdSmrg }, 23348dd4bdcdSmrg { 23358dd4bdcdSmrg "neon-fp16", false, false, 23368dd4bdcdSmrg { 23378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 23388dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 23398dd4bdcdSmrg } 23408dd4bdcdSmrg }, 23418dd4bdcdSmrg { 23428dd4bdcdSmrg "neon-vfpv4", false, false, 23438dd4bdcdSmrg { 23448dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 23458dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 23468dd4bdcdSmrg } 23478dd4bdcdSmrg }, 23488dd4bdcdSmrg { 23498dd4bdcdSmrg "nosimd", true, false, 23508dd4bdcdSmrg { 2351*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 2352*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 23538dd4bdcdSmrg } 23548dd4bdcdSmrg }, 23558dd4bdcdSmrg { 23568dd4bdcdSmrg "nofp", true, false, 23578dd4bdcdSmrg { 2358*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2359*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 23608dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 23618dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 23628dd4bdcdSmrg } 23638dd4bdcdSmrg }, 23648dd4bdcdSmrg { 23658dd4bdcdSmrg "vfpv3-d16", false, true, 23668dd4bdcdSmrg { 23678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 23688dd4bdcdSmrg } 23698dd4bdcdSmrg }, 23708dd4bdcdSmrg { 23718dd4bdcdSmrg "neon", false, true, 23728dd4bdcdSmrg { 23738dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 23748dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23758dd4bdcdSmrg } 23768dd4bdcdSmrg }, 23778dd4bdcdSmrg { 23788dd4bdcdSmrg "neon-vfpv3", false, true, 23798dd4bdcdSmrg { 23808dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 23818dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 23828dd4bdcdSmrg } 23838dd4bdcdSmrg }, 23848dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 23858dd4bdcdSmrg }; 23868dd4bdcdSmrg 23878dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7ve[] = { 23888dd4bdcdSmrg { 23898dd4bdcdSmrg "vfpv3-d16", false, false, 23908dd4bdcdSmrg { 23918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 23928dd4bdcdSmrg } 23938dd4bdcdSmrg }, 23948dd4bdcdSmrg { 23958dd4bdcdSmrg "vfpv3", false, false, 23968dd4bdcdSmrg { 23978dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 23988dd4bdcdSmrg isa_nobit 23998dd4bdcdSmrg } 24008dd4bdcdSmrg }, 24018dd4bdcdSmrg { 24028dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 24038dd4bdcdSmrg { 24048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 24058dd4bdcdSmrg isa_nobit 24068dd4bdcdSmrg } 24078dd4bdcdSmrg }, 24088dd4bdcdSmrg { 24098dd4bdcdSmrg "vfpv3-fp16", false, false, 24108dd4bdcdSmrg { 24118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 24128dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24138dd4bdcdSmrg } 24148dd4bdcdSmrg }, 24158dd4bdcdSmrg { 24168dd4bdcdSmrg "fp", false, false, 24178dd4bdcdSmrg { 24188dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 24198dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24208dd4bdcdSmrg } 24218dd4bdcdSmrg }, 24228dd4bdcdSmrg { 24238dd4bdcdSmrg "vfpv4", false, false, 24248dd4bdcdSmrg { 24258dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 24268dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 24278dd4bdcdSmrg } 24288dd4bdcdSmrg }, 24298dd4bdcdSmrg { 24308dd4bdcdSmrg "neon", false, false, 24318dd4bdcdSmrg { 24328dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 24338dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24348dd4bdcdSmrg } 24358dd4bdcdSmrg }, 24368dd4bdcdSmrg { 24378dd4bdcdSmrg "neon-fp16", false, false, 24388dd4bdcdSmrg { 24398dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 24408dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 24418dd4bdcdSmrg } 24428dd4bdcdSmrg }, 24438dd4bdcdSmrg { 24448dd4bdcdSmrg "simd", false, false, 24458dd4bdcdSmrg { 24468dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24478dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 24488dd4bdcdSmrg } 24498dd4bdcdSmrg }, 24508dd4bdcdSmrg { 24518dd4bdcdSmrg "nosimd", true, false, 24528dd4bdcdSmrg { 2453*0bfacb9bSmrg isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, 2454*0bfacb9bSmrg isa_bit_fp_d32, isa_bit_crypto, isa_nobit 24558dd4bdcdSmrg } 24568dd4bdcdSmrg }, 24578dd4bdcdSmrg { 24588dd4bdcdSmrg "nofp", true, false, 24598dd4bdcdSmrg { 2460*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2461*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 24628dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 24638dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 24648dd4bdcdSmrg } 24658dd4bdcdSmrg }, 24668dd4bdcdSmrg { 24678dd4bdcdSmrg "vfpv4-d16", false, true, 24688dd4bdcdSmrg { 24698dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 24708dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24718dd4bdcdSmrg } 24728dd4bdcdSmrg }, 24738dd4bdcdSmrg { 24748dd4bdcdSmrg "neon-vfpv3", false, true, 24758dd4bdcdSmrg { 24768dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 24778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 24788dd4bdcdSmrg } 24798dd4bdcdSmrg }, 24808dd4bdcdSmrg { 24818dd4bdcdSmrg "neon-vfpv4", false, true, 24828dd4bdcdSmrg { 24838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 24848dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 24858dd4bdcdSmrg } 24868dd4bdcdSmrg }, 24878dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 24888dd4bdcdSmrg }; 24898dd4bdcdSmrg 24908dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7_r[] = { 24918dd4bdcdSmrg { 24928dd4bdcdSmrg "fp.sp", false, false, 24938dd4bdcdSmrg { 24948dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 24958dd4bdcdSmrg } 24968dd4bdcdSmrg }, 24978dd4bdcdSmrg { 24988dd4bdcdSmrg "fp", false, false, 24998dd4bdcdSmrg { 25008dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 25018dd4bdcdSmrg } 25028dd4bdcdSmrg }, 25038dd4bdcdSmrg { 25048dd4bdcdSmrg "vfpv3xd-fp16", false, false, 25058dd4bdcdSmrg { 25068dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit 25078dd4bdcdSmrg } 25088dd4bdcdSmrg }, 25098dd4bdcdSmrg { 25108dd4bdcdSmrg "vfpv3-d16-fp16", false, false, 25118dd4bdcdSmrg { 25128dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 25138dd4bdcdSmrg isa_nobit 25148dd4bdcdSmrg } 25158dd4bdcdSmrg }, 25168dd4bdcdSmrg { 25178dd4bdcdSmrg "idiv", false, false, 25188dd4bdcdSmrg { 25198dd4bdcdSmrg isa_bit_adiv, isa_nobit 25208dd4bdcdSmrg } 25218dd4bdcdSmrg }, 25228dd4bdcdSmrg { 25238dd4bdcdSmrg "nofp", true, false, 25248dd4bdcdSmrg { 2525*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2526*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 25278dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 25288dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 25298dd4bdcdSmrg } 25308dd4bdcdSmrg }, 25318dd4bdcdSmrg { 25328dd4bdcdSmrg "noidiv", true, false, 25338dd4bdcdSmrg { 25348dd4bdcdSmrg isa_bit_adiv, isa_nobit 25358dd4bdcdSmrg } 25368dd4bdcdSmrg }, 25378dd4bdcdSmrg { 25388dd4bdcdSmrg "vfpv3xd", false, true, 25398dd4bdcdSmrg { 25408dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 25418dd4bdcdSmrg } 25428dd4bdcdSmrg }, 25438dd4bdcdSmrg { 25448dd4bdcdSmrg "vfpv3-d16", false, true, 25458dd4bdcdSmrg { 25468dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 25478dd4bdcdSmrg } 25488dd4bdcdSmrg }, 25498dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 25508dd4bdcdSmrg }; 25518dd4bdcdSmrg 25528dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv7e_m[] = { 25538dd4bdcdSmrg { 25548dd4bdcdSmrg "fp", false, false, 25558dd4bdcdSmrg { 25568dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 25578dd4bdcdSmrg isa_nobit 25588dd4bdcdSmrg } 25598dd4bdcdSmrg }, 25608dd4bdcdSmrg { 25618dd4bdcdSmrg "fpv5", false, false, 25628dd4bdcdSmrg { 25638dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 25648dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 25658dd4bdcdSmrg } 25668dd4bdcdSmrg }, 25678dd4bdcdSmrg { 25688dd4bdcdSmrg "fp.dp", false, false, 25698dd4bdcdSmrg { 25708dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 25718dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 25728dd4bdcdSmrg } 25738dd4bdcdSmrg }, 25748dd4bdcdSmrg { 25758dd4bdcdSmrg "nofp", true, false, 25768dd4bdcdSmrg { 2577*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2578*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 25798dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 25808dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 25818dd4bdcdSmrg } 25828dd4bdcdSmrg }, 25838dd4bdcdSmrg { 25848dd4bdcdSmrg "vfpv4-sp-d16", false, true, 25858dd4bdcdSmrg { 25868dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 25878dd4bdcdSmrg isa_nobit 25888dd4bdcdSmrg } 25898dd4bdcdSmrg }, 25908dd4bdcdSmrg { 25918dd4bdcdSmrg "fpv5-d16", false, true, 25928dd4bdcdSmrg { 25938dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 25948dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 25958dd4bdcdSmrg } 25968dd4bdcdSmrg }, 25978dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 25988dd4bdcdSmrg }; 25998dd4bdcdSmrg 26008dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_a[] = { 26018dd4bdcdSmrg { 26028dd4bdcdSmrg "crc", false, false, 26038dd4bdcdSmrg { 26048dd4bdcdSmrg isa_bit_crc32, isa_nobit 26058dd4bdcdSmrg } 26068dd4bdcdSmrg }, 26078dd4bdcdSmrg { 26088dd4bdcdSmrg "simd", false, false, 26098dd4bdcdSmrg { 26108dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 26118dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 26128dd4bdcdSmrg isa_nobit 26138dd4bdcdSmrg } 26148dd4bdcdSmrg }, 26158dd4bdcdSmrg { 26168dd4bdcdSmrg "crypto", false, false, 26178dd4bdcdSmrg { 26188dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 26198dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 26208dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 26218dd4bdcdSmrg } 26228dd4bdcdSmrg }, 26238dd4bdcdSmrg { 26248dd4bdcdSmrg "nocrypto", true, false, 26258dd4bdcdSmrg { 26268dd4bdcdSmrg isa_bit_crypto, isa_nobit 26278dd4bdcdSmrg } 26288dd4bdcdSmrg }, 26298dd4bdcdSmrg { 26308dd4bdcdSmrg "nofp", true, false, 26318dd4bdcdSmrg { 2632*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2633*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 26348dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 26358dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 26368dd4bdcdSmrg } 26378dd4bdcdSmrg }, 2638760c2415Smrg { 2639760c2415Smrg "sb", false, false, 2640760c2415Smrg { 2641760c2415Smrg isa_bit_sb, isa_nobit 2642760c2415Smrg } 2643760c2415Smrg }, 2644760c2415Smrg { 2645760c2415Smrg "predres", false, false, 2646760c2415Smrg { 2647760c2415Smrg isa_bit_predres, isa_nobit 2648760c2415Smrg } 2649760c2415Smrg }, 26508dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 26518dd4bdcdSmrg }; 26528dd4bdcdSmrg 26538dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = { 26548dd4bdcdSmrg { 26558dd4bdcdSmrg "simd", false, false, 26568dd4bdcdSmrg { 26578dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 26588dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 26598dd4bdcdSmrg isa_nobit 26608dd4bdcdSmrg } 26618dd4bdcdSmrg }, 26628dd4bdcdSmrg { 26638dd4bdcdSmrg "crypto", false, false, 26648dd4bdcdSmrg { 26658dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 26668dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 26678dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 26688dd4bdcdSmrg } 26698dd4bdcdSmrg }, 26708dd4bdcdSmrg { 26718dd4bdcdSmrg "nocrypto", true, false, 26728dd4bdcdSmrg { 26738dd4bdcdSmrg isa_bit_crypto, isa_nobit 26748dd4bdcdSmrg } 26758dd4bdcdSmrg }, 26768dd4bdcdSmrg { 26778dd4bdcdSmrg "nofp", true, false, 26788dd4bdcdSmrg { 2679*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2680*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 26818dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 26828dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 26838dd4bdcdSmrg } 26848dd4bdcdSmrg }, 2685760c2415Smrg { 2686760c2415Smrg "sb", false, false, 2687760c2415Smrg { 2688760c2415Smrg isa_bit_sb, isa_nobit 2689760c2415Smrg } 2690760c2415Smrg }, 2691760c2415Smrg { 2692760c2415Smrg "predres", false, false, 2693760c2415Smrg { 2694760c2415Smrg isa_bit_predres, isa_nobit 2695760c2415Smrg } 2696760c2415Smrg }, 26978dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 26988dd4bdcdSmrg }; 26998dd4bdcdSmrg 27008dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = { 27018dd4bdcdSmrg { 27028dd4bdcdSmrg "simd", false, false, 27038dd4bdcdSmrg { 27048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27058dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 27068dd4bdcdSmrg isa_nobit 27078dd4bdcdSmrg } 27088dd4bdcdSmrg }, 27098dd4bdcdSmrg { 27108dd4bdcdSmrg "fp16", false, false, 27118dd4bdcdSmrg { 27128dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27138dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 27148dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 27158dd4bdcdSmrg } 27168dd4bdcdSmrg }, 27178dd4bdcdSmrg { 27188dd4bdcdSmrg "fp16fml", false, false, 27198dd4bdcdSmrg { 27208dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 27218dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, 27228dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 27238dd4bdcdSmrg } 27248dd4bdcdSmrg }, 27258dd4bdcdSmrg { 27268dd4bdcdSmrg "crypto", false, false, 27278dd4bdcdSmrg { 27288dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27298dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 27308dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 27318dd4bdcdSmrg } 27328dd4bdcdSmrg }, 27338dd4bdcdSmrg { 27348dd4bdcdSmrg "nocrypto", true, false, 27358dd4bdcdSmrg { 27368dd4bdcdSmrg isa_bit_crypto, isa_nobit 27378dd4bdcdSmrg } 27388dd4bdcdSmrg }, 27398dd4bdcdSmrg { 27408dd4bdcdSmrg "nofp", true, false, 27418dd4bdcdSmrg { 2742*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2743*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 27448dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 27458dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 27468dd4bdcdSmrg } 27478dd4bdcdSmrg }, 27488dd4bdcdSmrg { 27498dd4bdcdSmrg "dotprod", false, false, 27508dd4bdcdSmrg { 27518dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 27528dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 27538dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 27548dd4bdcdSmrg } 27558dd4bdcdSmrg }, 2756760c2415Smrg { 2757760c2415Smrg "sb", false, false, 2758760c2415Smrg { 2759760c2415Smrg isa_bit_sb, isa_nobit 2760760c2415Smrg } 2761760c2415Smrg }, 2762760c2415Smrg { 2763760c2415Smrg "predres", false, false, 2764760c2415Smrg { 2765760c2415Smrg isa_bit_predres, isa_nobit 2766760c2415Smrg } 2767760c2415Smrg }, 2768*0bfacb9bSmrg { 2769*0bfacb9bSmrg "i8mm", false, false, 2770*0bfacb9bSmrg { 2771*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2772*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2773*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 2774*0bfacb9bSmrg } 2775*0bfacb9bSmrg }, 2776*0bfacb9bSmrg { 2777*0bfacb9bSmrg "bf16", false, false, 2778*0bfacb9bSmrg { 2779*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16, 2780*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2781*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 2782*0bfacb9bSmrg } 2783*0bfacb9bSmrg }, 27848dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 27858dd4bdcdSmrg }; 27868dd4bdcdSmrg 27878dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_3_a[] = { 27888dd4bdcdSmrg { 27898dd4bdcdSmrg "simd", false, false, 27908dd4bdcdSmrg { 27918dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 27928dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 27938dd4bdcdSmrg isa_nobit 27948dd4bdcdSmrg } 27958dd4bdcdSmrg }, 27968dd4bdcdSmrg { 27978dd4bdcdSmrg "fp16", false, false, 27988dd4bdcdSmrg { 27998dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 28008dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 28018dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 28028dd4bdcdSmrg } 28038dd4bdcdSmrg }, 28048dd4bdcdSmrg { 28058dd4bdcdSmrg "fp16fml", false, false, 28068dd4bdcdSmrg { 28078dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 28088dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, 28098dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 28108dd4bdcdSmrg } 28118dd4bdcdSmrg }, 28128dd4bdcdSmrg { 28138dd4bdcdSmrg "crypto", false, false, 28148dd4bdcdSmrg { 28158dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 28168dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 28178dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 28188dd4bdcdSmrg } 28198dd4bdcdSmrg }, 28208dd4bdcdSmrg { 28218dd4bdcdSmrg "nocrypto", true, false, 28228dd4bdcdSmrg { 28238dd4bdcdSmrg isa_bit_crypto, isa_nobit 28248dd4bdcdSmrg } 28258dd4bdcdSmrg }, 28268dd4bdcdSmrg { 28278dd4bdcdSmrg "nofp", true, false, 28288dd4bdcdSmrg { 2829*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2830*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 28318dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 28328dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 28338dd4bdcdSmrg } 28348dd4bdcdSmrg }, 28358dd4bdcdSmrg { 28368dd4bdcdSmrg "dotprod", false, false, 28378dd4bdcdSmrg { 28388dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 28398dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 28408dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 28418dd4bdcdSmrg } 28428dd4bdcdSmrg }, 2843760c2415Smrg { 2844760c2415Smrg "sb", false, false, 2845760c2415Smrg { 2846760c2415Smrg isa_bit_sb, isa_nobit 2847760c2415Smrg } 2848760c2415Smrg }, 2849760c2415Smrg { 2850760c2415Smrg "predres", false, false, 2851760c2415Smrg { 2852760c2415Smrg isa_bit_predres, isa_nobit 2853760c2415Smrg } 2854760c2415Smrg }, 2855*0bfacb9bSmrg { 2856*0bfacb9bSmrg "i8mm", false, false, 2857*0bfacb9bSmrg { 2858*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2859*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2860*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 2861*0bfacb9bSmrg } 2862*0bfacb9bSmrg }, 2863*0bfacb9bSmrg { 2864*0bfacb9bSmrg "bf16", false, false, 2865*0bfacb9bSmrg { 2866*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16, 2867*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2868*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 2869*0bfacb9bSmrg } 2870*0bfacb9bSmrg }, 28718dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 28728dd4bdcdSmrg }; 28738dd4bdcdSmrg 28748dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_4_a[] = { 28758dd4bdcdSmrg { 28768dd4bdcdSmrg "simd", false, false, 28778dd4bdcdSmrg { 28788dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 28798dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 28808dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 28818dd4bdcdSmrg } 28828dd4bdcdSmrg }, 28838dd4bdcdSmrg { 28848dd4bdcdSmrg "fp16", false, false, 28858dd4bdcdSmrg { 28868dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 28878dd4bdcdSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 28888dd4bdcdSmrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 28898dd4bdcdSmrg } 28908dd4bdcdSmrg }, 28918dd4bdcdSmrg { 28928dd4bdcdSmrg "crypto", false, false, 28938dd4bdcdSmrg { 28948dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 28958dd4bdcdSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 28968dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 28978dd4bdcdSmrg } 28988dd4bdcdSmrg }, 28998dd4bdcdSmrg { 29008dd4bdcdSmrg "nocrypto", true, false, 29018dd4bdcdSmrg { 29028dd4bdcdSmrg isa_bit_crypto, isa_nobit 29038dd4bdcdSmrg } 29048dd4bdcdSmrg }, 29058dd4bdcdSmrg { 29068dd4bdcdSmrg "nofp", true, false, 29078dd4bdcdSmrg { 2908*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2909*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 29108dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 29118dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 29128dd4bdcdSmrg } 29138dd4bdcdSmrg }, 2914760c2415Smrg { 2915760c2415Smrg "sb", false, false, 2916760c2415Smrg { 2917760c2415Smrg isa_bit_sb, isa_nobit 2918760c2415Smrg } 2919760c2415Smrg }, 2920760c2415Smrg { 2921760c2415Smrg "predres", false, false, 2922760c2415Smrg { 2923760c2415Smrg isa_bit_predres, isa_nobit 2924760c2415Smrg } 2925760c2415Smrg }, 2926*0bfacb9bSmrg { 2927*0bfacb9bSmrg "i8mm", false, false, 2928*0bfacb9bSmrg { 2929*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2930*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2931*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2932*0bfacb9bSmrg } 2933*0bfacb9bSmrg }, 2934*0bfacb9bSmrg { 2935*0bfacb9bSmrg "bf16", false, false, 2936*0bfacb9bSmrg { 2937*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16, 2938*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2939*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2940*0bfacb9bSmrg } 2941*0bfacb9bSmrg }, 2942760c2415Smrg { NULL, false, false, {isa_nobit}} 2943760c2415Smrg }; 2944760c2415Smrg 2945760c2415Smrg static const struct cpu_arch_extension arch_opttab_armv8_5_a[] = { 2946760c2415Smrg { 2947760c2415Smrg "simd", false, false, 2948760c2415Smrg { 2949760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 2950760c2415Smrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2951760c2415Smrg isa_bit_fp_dbl, isa_nobit 2952760c2415Smrg } 2953760c2415Smrg }, 2954760c2415Smrg { 2955760c2415Smrg "fp16", false, false, 2956760c2415Smrg { 2957760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 2958760c2415Smrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2959760c2415Smrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2960760c2415Smrg } 2961760c2415Smrg }, 2962760c2415Smrg { 2963760c2415Smrg "crypto", false, false, 2964760c2415Smrg { 2965760c2415Smrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 2966760c2415Smrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 2967760c2415Smrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2968760c2415Smrg } 2969760c2415Smrg }, 2970760c2415Smrg { 2971760c2415Smrg "nocrypto", true, false, 2972760c2415Smrg { 2973760c2415Smrg isa_bit_crypto, isa_nobit 2974760c2415Smrg } 2975760c2415Smrg }, 2976760c2415Smrg { 2977760c2415Smrg "nofp", true, false, 2978760c2415Smrg { 2979*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2980*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 2981760c2415Smrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 2982760c2415Smrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 2983760c2415Smrg } 2984760c2415Smrg }, 2985*0bfacb9bSmrg { 2986*0bfacb9bSmrg "i8mm", false, false, 2987*0bfacb9bSmrg { 2988*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 2989*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2990*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2991*0bfacb9bSmrg } 2992*0bfacb9bSmrg }, 2993*0bfacb9bSmrg { 2994*0bfacb9bSmrg "bf16", false, false, 2995*0bfacb9bSmrg { 2996*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16, 2997*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 2998*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 2999*0bfacb9bSmrg } 3000*0bfacb9bSmrg }, 3001*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 3002*0bfacb9bSmrg }; 3003*0bfacb9bSmrg 3004*0bfacb9bSmrg static const struct cpu_arch_extension arch_opttab_armv8_6_a[] = { 3005*0bfacb9bSmrg { 3006*0bfacb9bSmrg "simd", false, false, 3007*0bfacb9bSmrg { 3008*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 3009*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 3010*0bfacb9bSmrg isa_bit_fp_dbl, isa_nobit 3011*0bfacb9bSmrg } 3012*0bfacb9bSmrg }, 3013*0bfacb9bSmrg { 3014*0bfacb9bSmrg "fp16", false, false, 3015*0bfacb9bSmrg { 3016*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml, 3017*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 3018*0bfacb9bSmrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 3019*0bfacb9bSmrg } 3020*0bfacb9bSmrg }, 3021*0bfacb9bSmrg { 3022*0bfacb9bSmrg "crypto", false, false, 3023*0bfacb9bSmrg { 3024*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod, 3025*0bfacb9bSmrg isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, 3026*0bfacb9bSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3027*0bfacb9bSmrg } 3028*0bfacb9bSmrg }, 3029*0bfacb9bSmrg { 3030*0bfacb9bSmrg "nocrypto", true, false, 3031*0bfacb9bSmrg { 3032*0bfacb9bSmrg isa_bit_crypto, isa_nobit 3033*0bfacb9bSmrg } 3034*0bfacb9bSmrg }, 3035*0bfacb9bSmrg { 3036*0bfacb9bSmrg "nofp", true, false, 3037*0bfacb9bSmrg { 3038*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 3039*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3040*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3041*0bfacb9bSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3042*0bfacb9bSmrg } 3043*0bfacb9bSmrg }, 3044*0bfacb9bSmrg { 3045*0bfacb9bSmrg "i8mm", false, false, 3046*0bfacb9bSmrg { 3047*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 3048*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 3049*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 3050*0bfacb9bSmrg } 3051*0bfacb9bSmrg }, 3052*0bfacb9bSmrg { 3053*0bfacb9bSmrg "bf16", false, false, 3054*0bfacb9bSmrg { 3055*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16, 3056*0bfacb9bSmrg isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, 3057*0bfacb9bSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 3058*0bfacb9bSmrg } 3059*0bfacb9bSmrg }, 30608dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 30618dd4bdcdSmrg }; 30628dd4bdcdSmrg 30638dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = { 30648dd4bdcdSmrg { 30658dd4bdcdSmrg "dsp", false, false, 30668dd4bdcdSmrg { 30678dd4bdcdSmrg isa_bit_armv7em, isa_nobit 30688dd4bdcdSmrg } 30698dd4bdcdSmrg }, 30708dd4bdcdSmrg { 30718dd4bdcdSmrg "fp", false, false, 30728dd4bdcdSmrg { 30738dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 30748dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 30758dd4bdcdSmrg } 30768dd4bdcdSmrg }, 30778dd4bdcdSmrg { 30788dd4bdcdSmrg "fp.dp", false, false, 30798dd4bdcdSmrg { 30808dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 30818dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 30828dd4bdcdSmrg } 30838dd4bdcdSmrg }, 30848dd4bdcdSmrg { 30858dd4bdcdSmrg "nofp", true, false, 30868dd4bdcdSmrg { 3087*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 3088*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 30898dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 30908dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 30918dd4bdcdSmrg } 30928dd4bdcdSmrg }, 30938dd4bdcdSmrg { 30948dd4bdcdSmrg "nodsp", true, false, 30958dd4bdcdSmrg { 30968dd4bdcdSmrg isa_bit_armv7em, isa_nobit 30978dd4bdcdSmrg } 30988dd4bdcdSmrg }, 3099*0bfacb9bSmrg { 3100*0bfacb9bSmrg "cdecp0", false, false, 3101*0bfacb9bSmrg { 3102*0bfacb9bSmrg isa_bit_cdecp0, isa_nobit 3103*0bfacb9bSmrg } 3104*0bfacb9bSmrg }, 3105*0bfacb9bSmrg { 3106*0bfacb9bSmrg "cdecp1", false, false, 3107*0bfacb9bSmrg { 3108*0bfacb9bSmrg isa_bit_cdecp1, isa_nobit 3109*0bfacb9bSmrg } 3110*0bfacb9bSmrg }, 3111*0bfacb9bSmrg { 3112*0bfacb9bSmrg "cdecp2", false, false, 3113*0bfacb9bSmrg { 3114*0bfacb9bSmrg isa_bit_cdecp2, isa_nobit 3115*0bfacb9bSmrg } 3116*0bfacb9bSmrg }, 3117*0bfacb9bSmrg { 3118*0bfacb9bSmrg "cdecp3", false, false, 3119*0bfacb9bSmrg { 3120*0bfacb9bSmrg isa_bit_cdecp3, isa_nobit 3121*0bfacb9bSmrg } 3122*0bfacb9bSmrg }, 3123*0bfacb9bSmrg { 3124*0bfacb9bSmrg "cdecp4", false, false, 3125*0bfacb9bSmrg { 3126*0bfacb9bSmrg isa_bit_cdecp4, isa_nobit 3127*0bfacb9bSmrg } 3128*0bfacb9bSmrg }, 3129*0bfacb9bSmrg { 3130*0bfacb9bSmrg "cdecp5", false, false, 3131*0bfacb9bSmrg { 3132*0bfacb9bSmrg isa_bit_cdecp5, isa_nobit 3133*0bfacb9bSmrg } 3134*0bfacb9bSmrg }, 3135*0bfacb9bSmrg { 3136*0bfacb9bSmrg "cdecp6", false, false, 3137*0bfacb9bSmrg { 3138*0bfacb9bSmrg isa_bit_cdecp6, isa_nobit 3139*0bfacb9bSmrg } 3140*0bfacb9bSmrg }, 3141*0bfacb9bSmrg { 3142*0bfacb9bSmrg "cdecp7", false, false, 3143*0bfacb9bSmrg { 3144*0bfacb9bSmrg isa_bit_cdecp7, isa_nobit 3145*0bfacb9bSmrg } 3146*0bfacb9bSmrg }, 31478dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 31488dd4bdcdSmrg }; 31498dd4bdcdSmrg 31508dd4bdcdSmrg static const struct cpu_arch_extension arch_opttab_armv8_r[] = { 31518dd4bdcdSmrg { 31528dd4bdcdSmrg "crc", false, false, 31538dd4bdcdSmrg { 31548dd4bdcdSmrg isa_bit_crc32, isa_nobit 31558dd4bdcdSmrg } 31568dd4bdcdSmrg }, 31578dd4bdcdSmrg { 31588dd4bdcdSmrg "fp.sp", false, false, 31598dd4bdcdSmrg { 31608dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 31618dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 31628dd4bdcdSmrg } 31638dd4bdcdSmrg }, 31648dd4bdcdSmrg { 31658dd4bdcdSmrg "simd", false, false, 31668dd4bdcdSmrg { 31678dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 31688dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 31698dd4bdcdSmrg isa_nobit 31708dd4bdcdSmrg } 31718dd4bdcdSmrg }, 31728dd4bdcdSmrg { 31738dd4bdcdSmrg "crypto", false, false, 31748dd4bdcdSmrg { 31758dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 31768dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 31778dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 31788dd4bdcdSmrg } 31798dd4bdcdSmrg }, 31808dd4bdcdSmrg { 31818dd4bdcdSmrg "nocrypto", true, false, 31828dd4bdcdSmrg { 31838dd4bdcdSmrg isa_bit_crypto, isa_nobit 31848dd4bdcdSmrg } 31858dd4bdcdSmrg }, 31868dd4bdcdSmrg { 31878dd4bdcdSmrg "nofp", true, false, 31888dd4bdcdSmrg { 3189*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 3190*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 31918dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 31928dd4bdcdSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 31938dd4bdcdSmrg } 31948dd4bdcdSmrg }, 31958dd4bdcdSmrg { NULL, false, false, {isa_nobit}} 31968dd4bdcdSmrg }; 31978dd4bdcdSmrg 3198*0bfacb9bSmrg static const struct cpu_arch_extension arch_opttab_armv8_1_m_main[] = { 3199*0bfacb9bSmrg { 3200*0bfacb9bSmrg "dsp", false, false, 3201*0bfacb9bSmrg { 3202*0bfacb9bSmrg isa_bit_armv7em, isa_nobit 3203*0bfacb9bSmrg } 3204*0bfacb9bSmrg }, 3205*0bfacb9bSmrg { 3206*0bfacb9bSmrg "fp", false, false, 3207*0bfacb9bSmrg { 3208*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 3209*0bfacb9bSmrg isa_bit_fp16, isa_bit_fp16conv, isa_nobit 3210*0bfacb9bSmrg } 3211*0bfacb9bSmrg }, 3212*0bfacb9bSmrg { 3213*0bfacb9bSmrg "fp.dp", false, false, 3214*0bfacb9bSmrg { 3215*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 3216*0bfacb9bSmrg isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 3217*0bfacb9bSmrg } 3218*0bfacb9bSmrg }, 3219*0bfacb9bSmrg { 3220*0bfacb9bSmrg "nofp", true, false, 3221*0bfacb9bSmrg { 3222*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm, 3223*0bfacb9bSmrg isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon, 3224*0bfacb9bSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv, 3225*0bfacb9bSmrg isa_bit_crypto, isa_bit_fp_dbl, isa_nobit 3226*0bfacb9bSmrg } 3227*0bfacb9bSmrg }, 3228*0bfacb9bSmrg { 3229*0bfacb9bSmrg "mve", false, false, 3230*0bfacb9bSmrg { 3231*0bfacb9bSmrg isa_bit_mve, isa_bit_armv7em, isa_nobit 3232*0bfacb9bSmrg } 3233*0bfacb9bSmrg }, 3234*0bfacb9bSmrg { 3235*0bfacb9bSmrg "mve.fp", false, false, 3236*0bfacb9bSmrg { 3237*0bfacb9bSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve, 3238*0bfacb9bSmrg isa_bit_armv7em, isa_bit_fpv5, isa_bit_fp16, isa_bit_fp16conv, 3239*0bfacb9bSmrg isa_bit_mve_float, isa_nobit 3240*0bfacb9bSmrg } 3241*0bfacb9bSmrg }, 3242*0bfacb9bSmrg { 3243*0bfacb9bSmrg "cdecp0", false, false, 3244*0bfacb9bSmrg { 3245*0bfacb9bSmrg isa_bit_cdecp0, isa_nobit 3246*0bfacb9bSmrg } 3247*0bfacb9bSmrg }, 3248*0bfacb9bSmrg { 3249*0bfacb9bSmrg "cdecp1", false, false, 3250*0bfacb9bSmrg { 3251*0bfacb9bSmrg isa_bit_cdecp1, isa_nobit 3252*0bfacb9bSmrg } 3253*0bfacb9bSmrg }, 3254*0bfacb9bSmrg { 3255*0bfacb9bSmrg "cdecp2", false, false, 3256*0bfacb9bSmrg { 3257*0bfacb9bSmrg isa_bit_cdecp2, isa_nobit 3258*0bfacb9bSmrg } 3259*0bfacb9bSmrg }, 3260*0bfacb9bSmrg { 3261*0bfacb9bSmrg "cdecp3", false, false, 3262*0bfacb9bSmrg { 3263*0bfacb9bSmrg isa_bit_cdecp3, isa_nobit 3264*0bfacb9bSmrg } 3265*0bfacb9bSmrg }, 3266*0bfacb9bSmrg { 3267*0bfacb9bSmrg "cdecp4", false, false, 3268*0bfacb9bSmrg { 3269*0bfacb9bSmrg isa_bit_cdecp4, isa_nobit 3270*0bfacb9bSmrg } 3271*0bfacb9bSmrg }, 3272*0bfacb9bSmrg { 3273*0bfacb9bSmrg "cdecp5", false, false, 3274*0bfacb9bSmrg { 3275*0bfacb9bSmrg isa_bit_cdecp5, isa_nobit 3276*0bfacb9bSmrg } 3277*0bfacb9bSmrg }, 3278*0bfacb9bSmrg { 3279*0bfacb9bSmrg "cdecp6", false, false, 3280*0bfacb9bSmrg { 3281*0bfacb9bSmrg isa_bit_cdecp6, isa_nobit 3282*0bfacb9bSmrg } 3283*0bfacb9bSmrg }, 3284*0bfacb9bSmrg { 3285*0bfacb9bSmrg "cdecp7", false, false, 3286*0bfacb9bSmrg { 3287*0bfacb9bSmrg isa_bit_cdecp7, isa_nobit 3288*0bfacb9bSmrg } 3289*0bfacb9bSmrg }, 3290*0bfacb9bSmrg { NULL, false, false, {isa_nobit}} 3291*0bfacb9bSmrg }; 3292*0bfacb9bSmrg 32938dd4bdcdSmrg const arch_option all_architectures[] = 32948dd4bdcdSmrg { 32958dd4bdcdSmrg { 32968dd4bdcdSmrg "armv4", 32978dd4bdcdSmrg NULL, 32988dd4bdcdSmrg { 3299760c2415Smrg isa_bit_armv4, isa_bit_notm, isa_nobit 33008dd4bdcdSmrg }, 33018dd4bdcdSmrg "4", BASE_ARCH_4, 33028dd4bdcdSmrg 0, 33038dd4bdcdSmrg TARGET_CPU_arm7tdmi, 33048dd4bdcdSmrg }, 33058dd4bdcdSmrg { 33068dd4bdcdSmrg "armv4t", 33078dd4bdcdSmrg NULL, 33088dd4bdcdSmrg { 3309760c2415Smrg isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit 33108dd4bdcdSmrg }, 33118dd4bdcdSmrg "4T", BASE_ARCH_4T, 33128dd4bdcdSmrg 0, 33138dd4bdcdSmrg TARGET_CPU_arm7tdmi, 33148dd4bdcdSmrg }, 33158dd4bdcdSmrg { 33168dd4bdcdSmrg "armv5t", 33178dd4bdcdSmrg NULL, 33188dd4bdcdSmrg { 3319760c2415Smrg isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, 3320760c2415Smrg isa_nobit 33218dd4bdcdSmrg }, 33228dd4bdcdSmrg "5T", BASE_ARCH_5T, 33238dd4bdcdSmrg 0, 33248dd4bdcdSmrg TARGET_CPU_arm10tdmi, 33258dd4bdcdSmrg }, 33268dd4bdcdSmrg { 33278dd4bdcdSmrg "armv5te", 33288dd4bdcdSmrg arch_opttab_armv5te, 33298dd4bdcdSmrg { 3330760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 3331760c2415Smrg isa_bit_notm, isa_nobit 33328dd4bdcdSmrg }, 33338dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 33348dd4bdcdSmrg 0, 33358dd4bdcdSmrg TARGET_CPU_arm1026ejs, 33368dd4bdcdSmrg }, 33378dd4bdcdSmrg { 33388dd4bdcdSmrg "armv5tej", 33398dd4bdcdSmrg arch_opttab_armv5tej, 33408dd4bdcdSmrg { 3341760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, 3342760c2415Smrg isa_bit_notm, isa_nobit 33438dd4bdcdSmrg }, 33448dd4bdcdSmrg "5TEJ", BASE_ARCH_5TEJ, 33458dd4bdcdSmrg 0, 33468dd4bdcdSmrg TARGET_CPU_arm1026ejs, 33478dd4bdcdSmrg }, 33488dd4bdcdSmrg { 33498dd4bdcdSmrg "armv6", 33508dd4bdcdSmrg arch_opttab_armv6, 33518dd4bdcdSmrg { 3352760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3353760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 33548dd4bdcdSmrg }, 33558dd4bdcdSmrg "6", BASE_ARCH_6, 33568dd4bdcdSmrg 0, 33578dd4bdcdSmrg TARGET_CPU_arm1136js, 33588dd4bdcdSmrg }, 33598dd4bdcdSmrg { 33608dd4bdcdSmrg "armv6j", 33618dd4bdcdSmrg arch_opttab_armv6j, 33628dd4bdcdSmrg { 3363760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3364760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 33658dd4bdcdSmrg }, 33668dd4bdcdSmrg "6J", BASE_ARCH_6J, 33678dd4bdcdSmrg 0, 33688dd4bdcdSmrg TARGET_CPU_arm1136js, 33698dd4bdcdSmrg }, 33708dd4bdcdSmrg { 33718dd4bdcdSmrg "armv6k", 33728dd4bdcdSmrg arch_opttab_armv6k, 33738dd4bdcdSmrg { 3374760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3375760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k, 3376760c2415Smrg isa_nobit 33778dd4bdcdSmrg }, 33788dd4bdcdSmrg "6K", BASE_ARCH_6K, 33798dd4bdcdSmrg 0, 33808dd4bdcdSmrg TARGET_CPU_mpcore, 33818dd4bdcdSmrg }, 33828dd4bdcdSmrg { 33838dd4bdcdSmrg "armv6z", 33848dd4bdcdSmrg arch_opttab_armv6z, 33858dd4bdcdSmrg { 3386760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3387760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit 33888dd4bdcdSmrg }, 33898dd4bdcdSmrg "6Z", BASE_ARCH_6Z, 33908dd4bdcdSmrg 0, 33918dd4bdcdSmrg TARGET_CPU_arm1176jzs, 33928dd4bdcdSmrg }, 33938dd4bdcdSmrg { 33948dd4bdcdSmrg "armv6kz", 33958dd4bdcdSmrg arch_opttab_armv6kz, 33968dd4bdcdSmrg { 3397760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3398*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm, 3399760c2415Smrg isa_bit_armv6k, isa_nobit 34008dd4bdcdSmrg }, 34018dd4bdcdSmrg "6KZ", BASE_ARCH_6KZ, 34028dd4bdcdSmrg 0, 34038dd4bdcdSmrg TARGET_CPU_arm1176jzs, 34048dd4bdcdSmrg }, 34058dd4bdcdSmrg { 34068dd4bdcdSmrg "armv6zk", 34078dd4bdcdSmrg arch_opttab_armv6zk, 34088dd4bdcdSmrg { 3409760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3410*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm, 3411760c2415Smrg isa_bit_armv6k, isa_nobit 34128dd4bdcdSmrg }, 34138dd4bdcdSmrg "6KZ", BASE_ARCH_6KZ, 34148dd4bdcdSmrg 0, 34158dd4bdcdSmrg TARGET_CPU_arm1176jzs, 34168dd4bdcdSmrg }, 34178dd4bdcdSmrg { 34188dd4bdcdSmrg "armv6t2", 34198dd4bdcdSmrg arch_opttab_armv6t2, 34208dd4bdcdSmrg { 3421760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3422760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm, 3423760c2415Smrg isa_nobit 34248dd4bdcdSmrg }, 34258dd4bdcdSmrg "6T2", BASE_ARCH_6T2, 34268dd4bdcdSmrg 0, 34278dd4bdcdSmrg TARGET_CPU_arm1156t2s, 34288dd4bdcdSmrg }, 34298dd4bdcdSmrg { 34308dd4bdcdSmrg "armv6-m", 34318dd4bdcdSmrg NULL, 34328dd4bdcdSmrg { 3433760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3434760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 34358dd4bdcdSmrg }, 34368dd4bdcdSmrg "6M", BASE_ARCH_6M, 34378dd4bdcdSmrg 'M', 34388dd4bdcdSmrg TARGET_CPU_cortexm1, 34398dd4bdcdSmrg }, 34408dd4bdcdSmrg { 34418dd4bdcdSmrg "armv6s-m", 34428dd4bdcdSmrg NULL, 34438dd4bdcdSmrg { 3444760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3445760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_nobit 34468dd4bdcdSmrg }, 34478dd4bdcdSmrg "6M", BASE_ARCH_6M, 34488dd4bdcdSmrg 'M', 34498dd4bdcdSmrg TARGET_CPU_cortexm1, 34508dd4bdcdSmrg }, 34518dd4bdcdSmrg { 34528dd4bdcdSmrg "armv7", 34538dd4bdcdSmrg arch_opttab_armv7, 34548dd4bdcdSmrg { 3455760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3456760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, 3457760c2415Smrg isa_nobit 34588dd4bdcdSmrg }, 34598dd4bdcdSmrg "7", BASE_ARCH_7, 34608dd4bdcdSmrg 0, 3461*0bfacb9bSmrg TARGET_CPU_cortexa53, 34628dd4bdcdSmrg }, 34638dd4bdcdSmrg { 34648dd4bdcdSmrg "armv7-a", 34658dd4bdcdSmrg arch_opttab_armv7_a, 34668dd4bdcdSmrg { 3467760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3468760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, 3469760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_nobit 34708dd4bdcdSmrg }, 34718dd4bdcdSmrg "7A", BASE_ARCH_7A, 34728dd4bdcdSmrg 'A', 3473*0bfacb9bSmrg TARGET_CPU_cortexa53, 34748dd4bdcdSmrg }, 34758dd4bdcdSmrg { 34768dd4bdcdSmrg "armv7ve", 34778dd4bdcdSmrg arch_opttab_armv7ve, 34788dd4bdcdSmrg { 3479760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3480760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3481760c2415Smrg isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, 3482760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit 34838dd4bdcdSmrg }, 34848dd4bdcdSmrg "7A", BASE_ARCH_7A, 34858dd4bdcdSmrg 'A', 3486*0bfacb9bSmrg TARGET_CPU_cortexa53, 34878dd4bdcdSmrg }, 34888dd4bdcdSmrg { 34898dd4bdcdSmrg "armv7-r", 34908dd4bdcdSmrg arch_opttab_armv7_r, 34918dd4bdcdSmrg { 3492760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3493760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 3494760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit 34958dd4bdcdSmrg }, 34968dd4bdcdSmrg "7R", BASE_ARCH_7R, 34978dd4bdcdSmrg 'R', 34988dd4bdcdSmrg TARGET_CPU_cortexr4, 34998dd4bdcdSmrg }, 35008dd4bdcdSmrg { 35018dd4bdcdSmrg "armv7-m", 35028dd4bdcdSmrg NULL, 35038dd4bdcdSmrg { 3504760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3505760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, 3506760c2415Smrg isa_bit_thumb2, isa_nobit 35078dd4bdcdSmrg }, 35088dd4bdcdSmrg "7M", BASE_ARCH_7M, 35098dd4bdcdSmrg 'M', 35108dd4bdcdSmrg TARGET_CPU_cortexm3, 35118dd4bdcdSmrg }, 35128dd4bdcdSmrg { 35138dd4bdcdSmrg "armv7e-m", 35148dd4bdcdSmrg arch_opttab_armv7e_m, 35158dd4bdcdSmrg { 3516760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3517760c2415Smrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, 3518760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_nobit 35198dd4bdcdSmrg }, 35208dd4bdcdSmrg "7EM", BASE_ARCH_7EM, 35218dd4bdcdSmrg 'M', 35228dd4bdcdSmrg TARGET_CPU_cortexm4, 35238dd4bdcdSmrg }, 35248dd4bdcdSmrg { 35258dd4bdcdSmrg "armv8-a", 35268dd4bdcdSmrg arch_opttab_armv8_a, 35278dd4bdcdSmrg { 3528760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3529760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3530760c2415Smrg isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2, 3531760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec, 3532760c2415Smrg isa_nobit 35338dd4bdcdSmrg }, 35348dd4bdcdSmrg "8A", BASE_ARCH_8A, 35358dd4bdcdSmrg 'A', 35368dd4bdcdSmrg TARGET_CPU_cortexa53, 35378dd4bdcdSmrg }, 35388dd4bdcdSmrg { 35398dd4bdcdSmrg "armv8.1-a", 35408dd4bdcdSmrg arch_opttab_armv8_1_a, 35418dd4bdcdSmrg { 3542760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3543760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 35448dd4bdcdSmrg isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv, 3545760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv6k, 3546760c2415Smrg isa_bit_mp, isa_bit_sec, isa_nobit 35478dd4bdcdSmrg }, 35488dd4bdcdSmrg "8A", BASE_ARCH_8A, 35498dd4bdcdSmrg 'A', 35508dd4bdcdSmrg TARGET_CPU_cortexa53, 35518dd4bdcdSmrg }, 35528dd4bdcdSmrg { 35538dd4bdcdSmrg "armv8.2-a", 35548dd4bdcdSmrg arch_opttab_armv8_2_a, 35558dd4bdcdSmrg { 3556760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3557760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3558*0bfacb9bSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, 3559760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2, 3560760c2415Smrg isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit 35618dd4bdcdSmrg }, 35628dd4bdcdSmrg "8A", BASE_ARCH_8A, 35638dd4bdcdSmrg 'A', 35648dd4bdcdSmrg TARGET_CPU_cortexa53, 35658dd4bdcdSmrg }, 35668dd4bdcdSmrg { 35678dd4bdcdSmrg "armv8.3-a", 35688dd4bdcdSmrg arch_opttab_armv8_3_a, 35698dd4bdcdSmrg { 3570760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3571760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 35728dd4bdcdSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, 3573*0bfacb9bSmrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2, 3574*0bfacb9bSmrg isa_bit_armv6k, isa_bit_armv8_3, isa_bit_mp, isa_bit_sec, 3575760c2415Smrg isa_nobit 35768dd4bdcdSmrg }, 35778dd4bdcdSmrg "8A", BASE_ARCH_8A, 35788dd4bdcdSmrg 'A', 35798dd4bdcdSmrg TARGET_CPU_cortexa53, 35808dd4bdcdSmrg }, 35818dd4bdcdSmrg { 35828dd4bdcdSmrg "armv8.4-a", 35838dd4bdcdSmrg arch_opttab_armv8_4_a, 35848dd4bdcdSmrg { 3585760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3586760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3587*0bfacb9bSmrg isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, 3588760c2415Smrg isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2, 3589760c2415Smrg isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp, 3590760c2415Smrg isa_bit_sec, isa_nobit 3591760c2415Smrg }, 3592760c2415Smrg "8A", BASE_ARCH_8A, 3593760c2415Smrg 'A', 3594760c2415Smrg TARGET_CPU_cortexa53, 3595760c2415Smrg }, 3596760c2415Smrg { 3597760c2415Smrg "armv8.5-a", 3598760c2415Smrg arch_opttab_armv8_5_a, 3599760c2415Smrg { 3600760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb, 3601760c2415Smrg isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, 3602*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 3603760c2415Smrg isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, 36048dd4bdcdSmrg isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, 3605760c2415Smrg isa_bit_mp, isa_bit_armv8_5, isa_bit_sec, isa_bit_predres, 3606760c2415Smrg isa_nobit 36078dd4bdcdSmrg }, 36088dd4bdcdSmrg "8A", BASE_ARCH_8A, 36098dd4bdcdSmrg 'A', 36108dd4bdcdSmrg TARGET_CPU_cortexa53, 36118dd4bdcdSmrg }, 36128dd4bdcdSmrg { 3613*0bfacb9bSmrg "armv8.6-a", 3614*0bfacb9bSmrg arch_opttab_armv8_6_a, 3615*0bfacb9bSmrg { 3616*0bfacb9bSmrg isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb, 3617*0bfacb9bSmrg isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, 3618*0bfacb9bSmrg isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, 3619*0bfacb9bSmrg isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, 3620*0bfacb9bSmrg isa_bit_armv6k, isa_bit_armv8_2, isa_bit_armv8_3, isa_bit_mp, 3621*0bfacb9bSmrg isa_bit_armv8_4, isa_bit_armv8_5, isa_bit_armv8_6, isa_bit_sec, 3622*0bfacb9bSmrg isa_bit_predres, isa_nobit 3623*0bfacb9bSmrg }, 3624*0bfacb9bSmrg "8A", BASE_ARCH_8A, 3625*0bfacb9bSmrg 'A', 3626*0bfacb9bSmrg TARGET_CPU_cortexa53, 3627*0bfacb9bSmrg }, 3628*0bfacb9bSmrg { 36298dd4bdcdSmrg "armv8-m.base", 36308dd4bdcdSmrg NULL, 36318dd4bdcdSmrg { 3632760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3633*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse, 3634760c2415Smrg isa_bit_tdiv, isa_nobit 36358dd4bdcdSmrg }, 36368dd4bdcdSmrg "8M_BASE", BASE_ARCH_8M_BASE, 36378dd4bdcdSmrg 'M', 36388dd4bdcdSmrg TARGET_CPU_cortexm23, 36398dd4bdcdSmrg }, 36408dd4bdcdSmrg { 36418dd4bdcdSmrg "armv8-m.main", 36428dd4bdcdSmrg arch_opttab_armv8_m_main, 36438dd4bdcdSmrg { 3644760c2415Smrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3645*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_armv8, 3646*0bfacb9bSmrg isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2, isa_nobit 36478dd4bdcdSmrg }, 36488dd4bdcdSmrg "8M_MAIN", BASE_ARCH_8M_MAIN, 36498dd4bdcdSmrg 'M', 36508dd4bdcdSmrg TARGET_CPU_cortexm7, 36518dd4bdcdSmrg }, 36528dd4bdcdSmrg { 36538dd4bdcdSmrg "armv8-r", 36548dd4bdcdSmrg arch_opttab_armv8_r, 36558dd4bdcdSmrg { 3656760c2415Smrg isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, 3657760c2415Smrg isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6, 3658760c2415Smrg isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2, 3659760c2415Smrg isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec, 3660760c2415Smrg isa_nobit 36618dd4bdcdSmrg }, 36628dd4bdcdSmrg "8R", BASE_ARCH_8R, 36638dd4bdcdSmrg 'R', 36648dd4bdcdSmrg TARGET_CPU_cortexr52, 36658dd4bdcdSmrg }, 36668dd4bdcdSmrg { 3667*0bfacb9bSmrg "armv8.1-m.main", 3668*0bfacb9bSmrg arch_opttab_armv8_1_m_main, 3669*0bfacb9bSmrg { 3670*0bfacb9bSmrg isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, 3671*0bfacb9bSmrg isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6, isa_bit_armv7, 3672*0bfacb9bSmrg isa_bit_armv8, isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2, 3673*0bfacb9bSmrg isa_nobit 3674*0bfacb9bSmrg }, 3675*0bfacb9bSmrg "8M_MAIN", BASE_ARCH_8M_MAIN, 3676*0bfacb9bSmrg 'M', 3677*0bfacb9bSmrg TARGET_CPU_cortexm7, 3678*0bfacb9bSmrg }, 3679*0bfacb9bSmrg { 36808dd4bdcdSmrg "iwmmxt", 36818dd4bdcdSmrg NULL, 36828dd4bdcdSmrg { 3683760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 3684760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit 36858dd4bdcdSmrg }, 36868dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 36878dd4bdcdSmrg 0, 36888dd4bdcdSmrg TARGET_CPU_iwmmxt, 36898dd4bdcdSmrg }, 36908dd4bdcdSmrg { 36918dd4bdcdSmrg "iwmmxt2", 36928dd4bdcdSmrg NULL, 36938dd4bdcdSmrg { 3694760c2415Smrg isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, 3695760c2415Smrg isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm, 3696760c2415Smrg isa_nobit 36978dd4bdcdSmrg }, 36988dd4bdcdSmrg "5TE", BASE_ARCH_5TE, 36998dd4bdcdSmrg 0, 37008dd4bdcdSmrg TARGET_CPU_iwmmxt2, 37018dd4bdcdSmrg }, 37028dd4bdcdSmrg {{NULL, NULL, {isa_nobit}}, 37038dd4bdcdSmrg NULL, BASE_ARCH_0, 0, TARGET_CPU_arm_none} 37048dd4bdcdSmrg }; 37058dd4bdcdSmrg 37068dd4bdcdSmrg const arm_fpu_desc all_fpus[] = 37078dd4bdcdSmrg { 37088dd4bdcdSmrg { 37098dd4bdcdSmrg "vfp", 37108dd4bdcdSmrg { 37118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 37128dd4bdcdSmrg } 37138dd4bdcdSmrg }, 37148dd4bdcdSmrg { 37158dd4bdcdSmrg "vfpv2", 37168dd4bdcdSmrg { 37178dd4bdcdSmrg isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit 37188dd4bdcdSmrg } 37198dd4bdcdSmrg }, 37208dd4bdcdSmrg { 37218dd4bdcdSmrg "vfpv3", 37228dd4bdcdSmrg { 37238dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 37248dd4bdcdSmrg isa_nobit 37258dd4bdcdSmrg } 37268dd4bdcdSmrg }, 37278dd4bdcdSmrg { 37288dd4bdcdSmrg "vfpv3-fp16", 37298dd4bdcdSmrg { 37308dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv, 37318dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 37328dd4bdcdSmrg } 37338dd4bdcdSmrg }, 37348dd4bdcdSmrg { 37358dd4bdcdSmrg "vfpv3-d16", 37368dd4bdcdSmrg { 37378dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit 37388dd4bdcdSmrg } 37398dd4bdcdSmrg }, 37408dd4bdcdSmrg { 37418dd4bdcdSmrg "vfpv3-d16-fp16", 37428dd4bdcdSmrg { 37438dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl, 37448dd4bdcdSmrg isa_nobit 37458dd4bdcdSmrg } 37468dd4bdcdSmrg }, 37478dd4bdcdSmrg { 37488dd4bdcdSmrg "vfpv3xd", 37498dd4bdcdSmrg { 37508dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit 37518dd4bdcdSmrg } 37528dd4bdcdSmrg }, 37538dd4bdcdSmrg { 37548dd4bdcdSmrg "vfpv3xd-fp16", 37558dd4bdcdSmrg { 37568dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit 37578dd4bdcdSmrg } 37588dd4bdcdSmrg }, 37598dd4bdcdSmrg { 37608dd4bdcdSmrg "neon", 37618dd4bdcdSmrg { 37628dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 37638dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 37648dd4bdcdSmrg } 37658dd4bdcdSmrg }, 37668dd4bdcdSmrg { 37678dd4bdcdSmrg "neon-vfpv3", 37688dd4bdcdSmrg { 37698dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 37708dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 37718dd4bdcdSmrg } 37728dd4bdcdSmrg }, 37738dd4bdcdSmrg { 37748dd4bdcdSmrg "neon-fp16", 37758dd4bdcdSmrg { 37768dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32, 37778dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 37788dd4bdcdSmrg } 37798dd4bdcdSmrg }, 37808dd4bdcdSmrg { 37818dd4bdcdSmrg "vfpv4", 37828dd4bdcdSmrg { 37838dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32, 37848dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 37858dd4bdcdSmrg } 37868dd4bdcdSmrg }, 37878dd4bdcdSmrg { 37888dd4bdcdSmrg "neon-vfpv4", 37898dd4bdcdSmrg { 37908dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 37918dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 37928dd4bdcdSmrg } 37938dd4bdcdSmrg }, 37948dd4bdcdSmrg { 37958dd4bdcdSmrg "vfpv4-d16", 37968dd4bdcdSmrg { 37978dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 37988dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 37998dd4bdcdSmrg } 38008dd4bdcdSmrg }, 38018dd4bdcdSmrg { 38028dd4bdcdSmrg "fpv4-sp-d16", 38038dd4bdcdSmrg { 38048dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv, 38058dd4bdcdSmrg isa_nobit 38068dd4bdcdSmrg } 38078dd4bdcdSmrg }, 38088dd4bdcdSmrg { 38098dd4bdcdSmrg "fpv5-sp-d16", 38108dd4bdcdSmrg { 38118dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 38128dd4bdcdSmrg isa_bit_fp16conv, isa_nobit 38138dd4bdcdSmrg } 38148dd4bdcdSmrg }, 38158dd4bdcdSmrg { 38168dd4bdcdSmrg "fpv5-d16", 38178dd4bdcdSmrg { 38188dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 38198dd4bdcdSmrg isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 38208dd4bdcdSmrg } 38218dd4bdcdSmrg }, 38228dd4bdcdSmrg { 38238dd4bdcdSmrg "fp-armv8", 38248dd4bdcdSmrg { 38258dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5, 38268dd4bdcdSmrg isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit 38278dd4bdcdSmrg } 38288dd4bdcdSmrg }, 38298dd4bdcdSmrg { 38308dd4bdcdSmrg "neon-fp-armv8", 38318dd4bdcdSmrg { 38328dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 38338dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, 38348dd4bdcdSmrg isa_nobit 38358dd4bdcdSmrg } 38368dd4bdcdSmrg }, 38378dd4bdcdSmrg { 38388dd4bdcdSmrg "crypto-neon-fp-armv8", 38398dd4bdcdSmrg { 38408dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, 38418dd4bdcdSmrg isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto, 38428dd4bdcdSmrg isa_bit_fp_dbl, isa_nobit 38438dd4bdcdSmrg } 38448dd4bdcdSmrg }, 38458dd4bdcdSmrg { 38468dd4bdcdSmrg "vfp3", 38478dd4bdcdSmrg { 38488dd4bdcdSmrg isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl, 38498dd4bdcdSmrg isa_nobit 38508dd4bdcdSmrg } 38518dd4bdcdSmrg }, 38528dd4bdcdSmrg }; 3853