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Makefile.in | H A D | 08-May-2022 | 3.7 KiB | 148 | 99 | |
README | H A D | 08-May-2022 | 3.5 KiB | 108 | 80 | |
aclocal.m4 | H A D | 08-May-2022 | 4.4 KiB | 120 | 104 | |
arch.c | H A D | 08-May-2022 | 1 KiB | 39 | 12 | |
arch.h | H A D | 08-May-2022 | 1.3 KiB | 51 | 16 | |
config.in | H A D | 08-May-2022 | 6.3 KiB | 249 | 175 | |
configure | H A D | 08-May-2022 | 455.4 KiB | 16,056 | 11,978 | |
configure.ac | H A D | 08-May-2022 | 400 | 17 | 13 | |
cpu.c | H A D | 08-May-2022 | 165.4 KiB | 10,230 | 6,379 | |
cpu.h | H A D | 08-May-2022 | 217.3 KiB | 5,215 | 5,098 | |
cpuall.h | H A D | 08-May-2022 | 1.7 KiB | 67 | 25 | |
decode.c | H A D | 08-May-2022 | 115.7 KiB | 3,161 | 2,812 | |
decode.h | H A D | 08-May-2022 | 6.7 KiB | 106 | 69 | |
mloop.in | H A D | 08-May-2022 | 5.7 KiB | 242 | 194 | |
model.c | H A D | 08-May-2022 | 149.6 KiB | 4,966 | 4,626 | |
or1k-sim.h | H A D | 08-May-2022 | 3.4 KiB | 94 | 59 | |
or1k.c | H A D | 08-May-2022 | 8.7 KiB | 357 | 263 | |
sem-switch.c | H A D | 08-May-2022 | 96 KiB | 3,500 | 2,996 | |
sem.c | H A D | 08-May-2022 | 100.6 KiB | 3,773 | 2,990 | |
sim-if.c | H A D | 08-May-2022 | 7.1 KiB | 280 | 200 | |
sim-main.h | H A D | 08-May-2022 | 2.1 KiB | 82 | 34 | |
traps.c | H A D | 08-May-2022 | 7.6 KiB | 300 | 193 |
README
1SIM port for the OpenRISC architecture 2 3Authors: Stafford Horne <shorne@gmail.com> 4 Peter Gavin 5 6# Guide to Code # 7 8We have tried to comment on the functions in the simulator implementation as 9best as we can. Here we provide some general architecture comments for 10reference. Please let me know if there is a better place for these kind of 11docs. 12 13The or1k sim uses the CGEN system to generate most of the simulator code. There 14is some documentation for CGEN on sourceware.org here: 15 16 https://sourceware.org/cgen/docs/cgen.html 17 18In the binutils-gdb project there are several files which get combined to make 19up the CGEN simulator. The process for how those are built can be seen in 20`or1k/Makefile.in`. But the main files are: 21 22MAIN 23 sim/common/nrun.c - the main() calls sim_open(), sim_resume() and others 24 sim/or1k/sim-if.c - implements sim_open() and others used by nrun 25 when envoking sim in gdb, gdb uses sim_open() directly 26 27CGEN input and generated files 28 cpu/or1k*.cpu - these define the hardware, model and semantics 29 sim/or1k/arch.c - generated defines sim_machs array 30 sim/or1k/cpu.c - *generated defines register setters and getters 31 sim/or1k/decode.c - generated defines instruction decoder 32 sim/or1k/model.c - generated defines instruction cycles 33 sim/or1k/sem.c - *generated defines instruction operation semantics 34 sim/or1k/sem-switch.c - *generated ditto but as a switch 35 36ENGINE runs decode execute loop 37 sim/common/cgen-* - cgen implementation helpers 38 sim/common/cgen-run.c - implements sim_resume() which runs the engine 39 sim/common/genmloop.sh - helper script to generate mloop.c engine the 40 decode, execute loop 41 sim/or1k/mloop.in - openRISC implementation of mloop parts 42 43EXTRAS callbacks from sem* to c code 44 sim/or1k/or1k.c - implements some instructions in c (not cgen schema) 45 sim/or1k/traps.c - exception handler 46 47For each sim architecture we have choices for how the mloop is implemented. The 48OpenRISC engine uses scache pbb (pseudo-basic-block) instruction extraction with 49both fast (sem-switch.c based) and full (sem.c based) implementations. The fast 50and full modes are switch via the command line options to the `run` command, 51i.e. --trace-insn will run in full mode. 52 53 # Building # 54 55Below are some details on how we build and test the openrisc sim. 56 57 ## TOOLCHAIN ## 58 59This may not be needed as binutils contains most/all of the utilities required. 60But if needed, get this toolchain (this is the newlib binary, others also 61available) 62 63 https://github.com/openrisc/or1k-gcc/releases/download/or1k-5.4.0-20170218/or1k-elf-5.4.0-20170218.tar.xz 64 65If you want to build that from scratch look to: 66 67 https://github.com/openrisc/newlib/blob/scripts/build.sh 68 69 ## GDB ## 70 71In a directory along side binutils-gdb source 72 73 mkdir build-or1k-elf-gdb 74 cd build-or1k-elf-gdb 75 76 ../binutils-gdb/configure --target=or1k-elf \ 77 --prefix=/opt/shorne/software/or1k \ 78 --disable-itcl \ 79 --disable-tk \ 80 --disable-tcl \ 81 --disable-winsup \ 82 --disable-gdbtk \ 83 --disable-libgui \ 84 --disable-rda \ 85 --disable-sid \ 86 --with-sysroot \ 87 --disable-newlib \ 88 --disable-libgloss \ 89 --disable-gas \ 90 --disable-ld \ 91 --disable-binutils \ 92 --disable-gprof \ 93 --with-system-zlib 94 95 # make gdb, sim 96 make 97 98 # test sim 99 cd sim 100 make check 101 102The sim creates a binary simulator too, you can run binaries such as hello 103world with: 104 105 or1k-elf-gcc hello.c 106 ./or1k/run --trace-insn ./a.out 107 108