xref: /netbsd/lib/libc/arch/mips/gen/_setjmp.S (revision c4a72b64)
1/*	$NetBSD: _setjmp.S,v 1.16 2002/11/10 18:10:25 thorpej Exp $	*/
2
3/*-
4 * Copyright (c) 1991, 1993
5 *	The Regents of the University of California.  All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by the University of
21 *	California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 *    may be used to endorse or promote products derived from this software
24 *    without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 */
38
39#include <machine/cdefs.h>
40#include <mips/regnum.h>
41#include <mips/asm.h>
42#include <machine/setjmp.h>
43#include <machine/signal.h>		/* XXX */
44
45#if defined(LIBC_SCCS) && !defined(lint)
46	ASMSTR("from: @(#)_setjmp.s	8.1 (Berkeley) 6/4/93")
47	ASMSTR("$NetBSD: _setjmp.S,v 1.16 2002/11/10 18:10:25 thorpej Exp $")
48#endif /* LIBC_SCCS and not lint */
49
50#ifdef __ABICALLS__
51	.abicalls
52#endif
53
54/*
55 * C library -- _setjmp, _longjmp
56 *
57 *	_longjmp(a,v)
58 * will generate a "return(v)" from
59 * the last call to
60 *	_setjmp(a)
61 * by restoring registers from the stack,
62 * The previous signal state is NOT restored.
63 */
64
65	.set	noreorder
66
67LEAF(_setjmp)
68#ifdef __ABICALLS__
69	#.set noreorder
70	.cpload t9
71	#.set reorder
72#endif
73
74	REG_PROLOGUE
75	REG_LI	v0, 0xACEDBADE			# sigcontext magic number
76	REG_S	ra, (2 * 4)(a0)			# sc_pc = return address
77	REG_S	v0, (_OFFSETOF_SC_REGS)(a0)	#   saved in sc_regs[0]
78	REG_S	s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0)
79	REG_S	s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0)
80	REG_S	s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0)
81	REG_S	s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0)
82	REG_S	s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0)
83	REG_S	s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0)
84	REG_S	s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0)
85	REG_S	s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0)
86	REG_S	sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0)
87	REG_S	s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0)
88	cfc1	v0, $31				# too bad cant check if FP used
89	swc1	$f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0)
90	swc1	$f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0)
91	swc1	$f22, (22 * 4 + _OFFSETOF_SC_FPREGS)(a0)
92	swc1	$f23, (23 * 4 + _OFFSETOF_SC_FPREGS)(a0)
93	swc1	$f24, (24 * 4 + _OFFSETOF_SC_FPREGS)(a0)
94	swc1	$f25, (25 * 4 + _OFFSETOF_SC_FPREGS)(a0)
95	swc1	$f26, (26 * 4 + _OFFSETOF_SC_FPREGS)(a0)
96	swc1	$f27, (27 * 4 + _OFFSETOF_SC_FPREGS)(a0)
97	swc1	$f28, (28 * 4 + _OFFSETOF_SC_FPREGS)(a0)
98	swc1	$f29, (29 * 4 + _OFFSETOF_SC_FPREGS)(a0)
99	swc1	$f30, (30 * 4 + _OFFSETOF_SC_FPREGS)(a0)
100	swc1	$f31, (31 * 4 + _OFFSETOF_SC_FPREGS)(a0)
101	sw	v0, (32 * 4 + _OFFSETOF_SC_FPREGS)(a0)
102	REG_EPILOGUE
103	j	ra
104	move	v0, zero
105END(_setjmp)
106
107LEAF(_longjmp)
108#ifdef __ABICALLS__
109	.set    noreorder
110	.cpload t9
111	.set    reorder
112	subu	sp, sp, 32
113	.cprestore 16
114	.set    noreorder
115#endif
116	REG_PROLOGUE
117	REG_L	v0, (_OFFSETOF_SC_REGS)(a0)	# get magic number
118	REG_L	ra, (2 * 4)(a0)
119	REG_LI	t0, 0xACEDBADE
120	bne	v0, t0, botch		# jump if error
121	addu	sp, sp, 32			# does not matter, sanity
122	REG_L	s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0)
123	REG_L	s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0)
124	REG_L	s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0)
125	REG_L	s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0)
126	REG_L	s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0)
127	REG_L	s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0)
128	REG_L	s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0)
129	REG_L	s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0)
130	lw	v0, (32 * 4 + _OFFSETOF_SC_FPREGS)(a0)	# get fpu status
131	REG_L	sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0)
132	REG_L	s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0)
133	ctc1	v0, $31
134	lwc1	$f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0)
135	lwc1	$f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0)
136	lwc1	$f22, (22 * 4 + _OFFSETOF_SC_FPREGS)(a0)
137	lwc1	$f23, (23 * 4 + _OFFSETOF_SC_FPREGS)(a0)
138	lwc1	$f24, (24 * 4 + _OFFSETOF_SC_FPREGS)(a0)
139	lwc1	$f25, (25 * 4 + _OFFSETOF_SC_FPREGS)(a0)
140	lwc1	$f26, (26 * 4 + _OFFSETOF_SC_FPREGS)(a0)
141	lwc1	$f27, (27 * 4 + _OFFSETOF_SC_FPREGS)(a0)
142	lwc1	$f28, (28 * 4 + _OFFSETOF_SC_FPREGS)(a0)
143	lwc1	$f29, (29 * 4 + _OFFSETOF_SC_FPREGS)(a0)
144	lwc1	$f30, (30 * 4 + _OFFSETOF_SC_FPREGS)(a0)
145	lwc1	$f31, (31 * 4 + _OFFSETOF_SC_FPREGS)(a0)
146
147	j	ra
148	move	v0, a1
149	REG_EPILOGUE
150botch:
151	jal	_C_LABEL(longjmperror)
152	nop
153	jal	_C_LABEL(abort)
154	nop
155END(_longjmp)
156