xref: /netbsd/lib/libc/arch/powerpc/gen/syncicache.c (revision c4a72b64)
1 /*	$NetBSD: syncicache.c,v 1.11 2002/11/26 21:14:04 thorpej Exp $	*/
2 
3 /*
4  * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
5  * Copyright (C) 1995-1997, 1999 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 #include <sys/param.h>
34 #if	defined(_KERNEL) || defined(_STANDALONE)
35 #include <sys/time.h>
36 #include <sys/proc.h>
37 #include <uvm/uvm_extern.h>
38 #endif
39 #include <sys/sysctl.h>
40 
41 #include <machine/cpu.h>
42 
43 
44 #if defined(_STANDALONE)
45 #ifndef	CACHELINESIZE
46 #error "Must know the size of a cache line"
47 #endif
48 static struct cache_info _cache_info = {
49 	CACHELINESIZE,
50 	CACHELINESIZE,
51 	CACHELINESIZE,
52 	CACHELINESIZE
53 };
54 #define CACHEINFO	_cache_info
55 #elif defined(_KERNEL)
56 #define	CACHEINFO	(curcpu()->ci_ci)
57 #else
58 #include <stdlib.h>
59 
60 static void getcachelinesize (void);
61 
62 static int _cachelinesize = 0;
63 
64 static struct cache_info _cache_info;
65 #define CACHEINFO	_cache_info
66 
67 static void
68 getcachelinesize(void)
69 {
70 	static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
71 	static int cacheinfomib[] = { CTL_MACHDEP, CPU_CACHEINFO };
72 	size_t clen = sizeof(_cache_info);
73 
74 	if (sysctl(cacheinfomib, sizeof(cacheinfomib) / sizeof(cacheinfomib[0]),
75 		&_cache_info, &clen, NULL, 0) == 0) {
76 		_cachelinesize = _cache_info.dcache_line_size;
77 		return;
78 	}
79 
80 	/* Try older deprecated sysctl */
81 	clen = sizeof(_cachelinesize);
82 	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
83 		   &_cachelinesize, &clen, NULL, 0) < 0
84 	    || !_cachelinesize)
85 		abort();
86 
87 	_cache_info.dcache_size = _cachelinesize;
88 	_cache_info.dcache_line_size = _cachelinesize;
89 	_cache_info.icache_size = _cachelinesize;
90 	_cache_info.icache_line_size = _cachelinesize;
91 	/* If there is no cache, indicate we have issued the sysctl. */
92 	if (!_cachelinesize) _cachelinesize = 1;
93 }
94 #endif
95 
96 void
97 __syncicache(void *from, size_t len)
98 {
99 	size_t l, off;
100 	size_t linesz;
101 	char *p;
102 
103 #if	!defined(_KERNEL) && !defined(_STANDALONE)
104 	if (!_cachelinesize)
105 		getcachelinesize();
106 #endif
107 
108 	if (CACHEINFO.dcache_size > 0) {
109 		linesz = CACHEINFO.dcache_line_size;
110 		off = (uintptr_t)from & (linesz - 1);
111 		l = (len + off + linesz - 1) & ~(linesz - 1);
112 		p = (char *)from - off;
113 		do {
114 			__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
115 			p += linesz;
116 		} while ((l -= linesz) != 0);
117 	}
118 	__asm__ __volatile ("sync");
119 
120 	if (CACHEINFO.icache_size > 0 ) {
121 		linesz = CACHEINFO.icache_line_size;
122 		off = (uintptr_t)from & (linesz - 1);
123 		l = (len + off + linesz - 1) & ~(linesz - 1);
124 		p = (char *)from - off;
125 		do {
126 			__asm__ __volatile ("icbi 0,%0" :: "r"(p));
127 			p += linesz;
128 		} while ((l -= linesz) != 0);
129 	}
130 	__asm__ __volatile ("sync; isync");
131 }
132