1*ea87d22aSmatt /* $NetBSD: softfloat.h,v 1.7 2011/07/07 07:14:57 matt Exp $ */ 2010758bfSbjh21 3010758bfSbjh21 /* This is a derivative work. */ 43f04a273Ssimonb 53f04a273Ssimonb /* 63f04a273Ssimonb =============================================================================== 73f04a273Ssimonb 83f04a273Ssimonb This C header file is part of the SoftFloat IEC/IEEE Floating-point 93f04a273Ssimonb Arithmetic Package, Release 2a. 103f04a273Ssimonb 113f04a273Ssimonb Written by John R. Hauser. This work was made possible in part by the 123f04a273Ssimonb International Computer Science Institute, located at Suite 600, 1947 Center 133f04a273Ssimonb Street, Berkeley, California 94704. Funding was partially provided by the 143f04a273Ssimonb National Science Foundation under grant MIP-9311980. The original version 153f04a273Ssimonb of this code was written as part of a project to build a fixed-point vector 163f04a273Ssimonb processor in collaboration with the University of California at Berkeley, 173f04a273Ssimonb overseen by Profs. Nelson Morgan and John Wawrzynek. More information 183f04a273Ssimonb is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ 193f04a273Ssimonb arithmetic/SoftFloat.html'. 203f04a273Ssimonb 213f04a273Ssimonb THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort 223f04a273Ssimonb has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT 233f04a273Ssimonb TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO 243f04a273Ssimonb PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY 253f04a273Ssimonb AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. 263f04a273Ssimonb 273f04a273Ssimonb Derivative works are acceptable, even for commercial purposes, so long as 283f04a273Ssimonb (1) they include prominent notice that the work is derivative, and (2) they 293f04a273Ssimonb include prominent notice akin to these four paragraphs for those parts of 303f04a273Ssimonb this code that are retained. 313f04a273Ssimonb 323f04a273Ssimonb =============================================================================== 333f04a273Ssimonb */ 343f04a273Ssimonb 353f04a273Ssimonb /* 363f04a273Ssimonb ------------------------------------------------------------------------------- 373f04a273Ssimonb The macro `FLOATX80' must be defined to enable the extended double-precision 383f04a273Ssimonb floating-point format `floatx80'. If this macro is not defined, the 393f04a273Ssimonb `floatx80' type will not be defined, and none of the functions that either 403f04a273Ssimonb input or output the `floatx80' type will be defined. The same applies to 413f04a273Ssimonb the `FLOAT128' macro and the quadruple-precision format `float128'. 423f04a273Ssimonb ------------------------------------------------------------------------------- 433f04a273Ssimonb */ 443f04a273Ssimonb /* #define FLOATX80 */ 453f04a273Ssimonb /* #define FLOAT128 */ 463f04a273Ssimonb 473f04a273Ssimonb #include <machine/ieeefp.h> 483f04a273Ssimonb 493f04a273Ssimonb /* 503f04a273Ssimonb ------------------------------------------------------------------------------- 513f04a273Ssimonb Software IEC/IEEE floating-point types. 523f04a273Ssimonb ------------------------------------------------------------------------------- 533f04a273Ssimonb */ 543f04a273Ssimonb typedef unsigned int float32; 553f04a273Ssimonb typedef unsigned long long float64; 563f04a273Ssimonb #ifdef FLOATX80 573f04a273Ssimonb typedef struct { 583f04a273Ssimonb unsigned short high; 593f04a273Ssimonb unsigned long long low; 603f04a273Ssimonb } floatx80; 613f04a273Ssimonb #endif 623f04a273Ssimonb #ifdef FLOAT128 633f04a273Ssimonb typedef struct { 643f04a273Ssimonb unsigned long long high, low; 653f04a273Ssimonb } float128; 663f04a273Ssimonb #endif 673f04a273Ssimonb 683f04a273Ssimonb /* 693f04a273Ssimonb ------------------------------------------------------------------------------- 703f04a273Ssimonb Software IEC/IEEE floating-point underflow tininess-detection mode. 713f04a273Ssimonb ------------------------------------------------------------------------------- 723f04a273Ssimonb */ 738726b401Smrg #ifndef SOFTFLOAT_FOR_GCC 743f04a273Ssimonb extern int8 float_detect_tininess; 758726b401Smrg #endif 763f04a273Ssimonb enum { 773f04a273Ssimonb float_tininess_after_rounding = 0, 783f04a273Ssimonb float_tininess_before_rounding = 1 793f04a273Ssimonb }; 803f04a273Ssimonb 813f04a273Ssimonb /* 823f04a273Ssimonb ------------------------------------------------------------------------------- 833f04a273Ssimonb Software IEC/IEEE floating-point rounding mode. 843f04a273Ssimonb ------------------------------------------------------------------------------- 853f04a273Ssimonb */ 86251de84cSbjh21 extern fp_rnd float_rounding_mode; 87*ea87d22aSmatt #define float_round_nearest_even FP_RN 88*ea87d22aSmatt #define float_round_to_zero FP_RZ 89*ea87d22aSmatt #define float_round_down FP_RM 90*ea87d22aSmatt #define float_round_up FP_RP 913f04a273Ssimonb 923f04a273Ssimonb /* 933f04a273Ssimonb ------------------------------------------------------------------------------- 943f04a273Ssimonb Software IEC/IEEE floating-point exception flags. 953f04a273Ssimonb ------------------------------------------------------------------------------- 963f04a273Ssimonb */ 97251de84cSbjh21 extern fp_except float_exception_flags; 98010758bfSbjh21 extern fp_except float_exception_mask; 993f04a273Ssimonb enum { 1003f04a273Ssimonb float_flag_inexact = FP_X_IMP, 1013f04a273Ssimonb float_flag_underflow = FP_X_UFL, 1023f04a273Ssimonb float_flag_overflow = FP_X_OFL, 1033f04a273Ssimonb float_flag_divbyzero = FP_X_DZ, 1043f04a273Ssimonb float_flag_invalid = FP_X_INV 1053f04a273Ssimonb }; 1063f04a273Ssimonb 1073f04a273Ssimonb /* 1083f04a273Ssimonb ------------------------------------------------------------------------------- 1093f04a273Ssimonb Routine to raise any or all of the software IEC/IEEE floating-point 1103f04a273Ssimonb exception flags. 1113f04a273Ssimonb ------------------------------------------------------------------------------- 1123f04a273Ssimonb */ 113010758bfSbjh21 void float_raise( fp_except ); 1143f04a273Ssimonb 1153f04a273Ssimonb /* 1163f04a273Ssimonb ------------------------------------------------------------------------------- 1173f04a273Ssimonb Software IEC/IEEE integer-to-floating-point conversion routines. 1183f04a273Ssimonb ------------------------------------------------------------------------------- 1193f04a273Ssimonb */ 12065f52d9eSmatt float32 int32_to_float32( int32 ); 12165f52d9eSmatt float32 uint32_to_float32( uint32 ); 12265f52d9eSmatt float64 int32_to_float64( int32 ); 12365f52d9eSmatt float64 uint32_to_float64( uint32 ); 1243f04a273Ssimonb #ifdef FLOATX80 12565f52d9eSmatt floatx80 int32_to_floatx80( int32 ); 12665f52d9eSmatt floatx80 uint32_to_floatx80( uint32 ); 1273f04a273Ssimonb #endif 1283f04a273Ssimonb #ifdef FLOAT128 12965f52d9eSmatt float128 int32_to_float128( int32 ); 13065f52d9eSmatt float128 uint32_to_float128( uint32 ); 1313f04a273Ssimonb #endif 1323f04a273Ssimonb float32 int64_to_float32( long long ); 1333f04a273Ssimonb float64 int64_to_float64( long long ); 1343f04a273Ssimonb #ifdef FLOATX80 1353f04a273Ssimonb floatx80 int64_to_floatx80( long long ); 1363f04a273Ssimonb #endif 1373f04a273Ssimonb #ifdef FLOAT128 1383f04a273Ssimonb float128 int64_to_float128( long long ); 1393f04a273Ssimonb #endif 1403f04a273Ssimonb 1413f04a273Ssimonb /* 1423f04a273Ssimonb ------------------------------------------------------------------------------- 1433f04a273Ssimonb Software IEC/IEEE single-precision conversion routines. 1443f04a273Ssimonb ------------------------------------------------------------------------------- 1453f04a273Ssimonb */ 1463f04a273Ssimonb int float32_to_int32( float32 ); 1473f04a273Ssimonb int float32_to_int32_round_to_zero( float32 ); 1483f04a273Ssimonb unsigned int float32_to_uint32_round_to_zero( float32 ); 1493f04a273Ssimonb long long float32_to_int64( float32 ); 1503f04a273Ssimonb long long float32_to_int64_round_to_zero( float32 ); 1513f04a273Ssimonb float64 float32_to_float64( float32 ); 1523f04a273Ssimonb #ifdef FLOATX80 1533f04a273Ssimonb floatx80 float32_to_floatx80( float32 ); 1543f04a273Ssimonb #endif 1553f04a273Ssimonb #ifdef FLOAT128 1563f04a273Ssimonb float128 float32_to_float128( float32 ); 1573f04a273Ssimonb #endif 1583f04a273Ssimonb 1593f04a273Ssimonb /* 1603f04a273Ssimonb ------------------------------------------------------------------------------- 1613f04a273Ssimonb Software IEC/IEEE single-precision operations. 1623f04a273Ssimonb ------------------------------------------------------------------------------- 1633f04a273Ssimonb */ 1643f04a273Ssimonb float32 float32_round_to_int( float32 ); 1653f04a273Ssimonb float32 float32_add( float32, float32 ); 1663f04a273Ssimonb float32 float32_sub( float32, float32 ); 1673f04a273Ssimonb float32 float32_mul( float32, float32 ); 1683f04a273Ssimonb float32 float32_div( float32, float32 ); 1693f04a273Ssimonb float32 float32_rem( float32, float32 ); 1703f04a273Ssimonb float32 float32_sqrt( float32 ); 1713f04a273Ssimonb flag float32_eq( float32, float32 ); 1723f04a273Ssimonb flag float32_le( float32, float32 ); 1733f04a273Ssimonb flag float32_lt( float32, float32 ); 1743f04a273Ssimonb flag float32_eq_signaling( float32, float32 ); 1753f04a273Ssimonb flag float32_le_quiet( float32, float32 ); 1763f04a273Ssimonb flag float32_lt_quiet( float32, float32 ); 17799694831Seeh #ifndef SOFTFLOAT_FOR_GCC 1783f04a273Ssimonb flag float32_is_signaling_nan( float32 ); 17999694831Seeh #endif 1803f04a273Ssimonb 1813f04a273Ssimonb /* 1823f04a273Ssimonb ------------------------------------------------------------------------------- 1833f04a273Ssimonb Software IEC/IEEE double-precision conversion routines. 1843f04a273Ssimonb ------------------------------------------------------------------------------- 1853f04a273Ssimonb */ 1863f04a273Ssimonb int float64_to_int32( float64 ); 1873f04a273Ssimonb int float64_to_int32_round_to_zero( float64 ); 1883f04a273Ssimonb unsigned int float64_to_uint32_round_to_zero( float64 ); 1893f04a273Ssimonb long long float64_to_int64( float64 ); 1903f04a273Ssimonb long long float64_to_int64_round_to_zero( float64 ); 1913f04a273Ssimonb float32 float64_to_float32( float64 ); 1923f04a273Ssimonb #ifdef FLOATX80 1933f04a273Ssimonb floatx80 float64_to_floatx80( float64 ); 1943f04a273Ssimonb #endif 1953f04a273Ssimonb #ifdef FLOAT128 1963f04a273Ssimonb float128 float64_to_float128( float64 ); 1973f04a273Ssimonb #endif 1983f04a273Ssimonb 1993f04a273Ssimonb /* 2003f04a273Ssimonb ------------------------------------------------------------------------------- 2013f04a273Ssimonb Software IEC/IEEE double-precision operations. 2023f04a273Ssimonb ------------------------------------------------------------------------------- 2033f04a273Ssimonb */ 2043f04a273Ssimonb float64 float64_round_to_int( float64 ); 2053f04a273Ssimonb float64 float64_add( float64, float64 ); 2063f04a273Ssimonb float64 float64_sub( float64, float64 ); 2073f04a273Ssimonb float64 float64_mul( float64, float64 ); 2083f04a273Ssimonb float64 float64_div( float64, float64 ); 2093f04a273Ssimonb float64 float64_rem( float64, float64 ); 2103f04a273Ssimonb float64 float64_sqrt( float64 ); 2113f04a273Ssimonb flag float64_eq( float64, float64 ); 2123f04a273Ssimonb flag float64_le( float64, float64 ); 2133f04a273Ssimonb flag float64_lt( float64, float64 ); 2143f04a273Ssimonb flag float64_eq_signaling( float64, float64 ); 2153f04a273Ssimonb flag float64_le_quiet( float64, float64 ); 2163f04a273Ssimonb flag float64_lt_quiet( float64, float64 ); 21799694831Seeh #ifndef SOFTFLOAT_FOR_GCC 2183f04a273Ssimonb flag float64_is_signaling_nan( float64 ); 21999694831Seeh #endif 2203f04a273Ssimonb 2213f04a273Ssimonb #ifdef FLOATX80 2223f04a273Ssimonb 2233f04a273Ssimonb /* 2243f04a273Ssimonb ------------------------------------------------------------------------------- 2253f04a273Ssimonb Software IEC/IEEE extended double-precision conversion routines. 2263f04a273Ssimonb ------------------------------------------------------------------------------- 2273f04a273Ssimonb */ 2283f04a273Ssimonb int floatx80_to_int32( floatx80 ); 2293f04a273Ssimonb int floatx80_to_int32_round_to_zero( floatx80 ); 2303f04a273Ssimonb long long floatx80_to_int64( floatx80 ); 2313f04a273Ssimonb long long floatx80_to_int64_round_to_zero( floatx80 ); 2323f04a273Ssimonb float32 floatx80_to_float32( floatx80 ); 2333f04a273Ssimonb float64 floatx80_to_float64( floatx80 ); 2343f04a273Ssimonb #ifdef FLOAT128 2353f04a273Ssimonb float128 floatx80_to_float128( floatx80 ); 2363f04a273Ssimonb #endif 2373f04a273Ssimonb 2383f04a273Ssimonb /* 2393f04a273Ssimonb ------------------------------------------------------------------------------- 2403f04a273Ssimonb Software IEC/IEEE extended double-precision rounding precision. Valid 2413f04a273Ssimonb values are 32, 64, and 80. 2423f04a273Ssimonb ------------------------------------------------------------------------------- 2433f04a273Ssimonb */ 2443f04a273Ssimonb extern int floatx80_rounding_precision; 2453f04a273Ssimonb 2463f04a273Ssimonb /* 2473f04a273Ssimonb ------------------------------------------------------------------------------- 2483f04a273Ssimonb Software IEC/IEEE extended double-precision operations. 2493f04a273Ssimonb ------------------------------------------------------------------------------- 2503f04a273Ssimonb */ 2513f04a273Ssimonb floatx80 floatx80_round_to_int( floatx80 ); 2523f04a273Ssimonb floatx80 floatx80_add( floatx80, floatx80 ); 2533f04a273Ssimonb floatx80 floatx80_sub( floatx80, floatx80 ); 2543f04a273Ssimonb floatx80 floatx80_mul( floatx80, floatx80 ); 2553f04a273Ssimonb floatx80 floatx80_div( floatx80, floatx80 ); 2563f04a273Ssimonb floatx80 floatx80_rem( floatx80, floatx80 ); 2573f04a273Ssimonb floatx80 floatx80_sqrt( floatx80 ); 2583f04a273Ssimonb flag floatx80_eq( floatx80, floatx80 ); 2593f04a273Ssimonb flag floatx80_le( floatx80, floatx80 ); 2603f04a273Ssimonb flag floatx80_lt( floatx80, floatx80 ); 2613f04a273Ssimonb flag floatx80_eq_signaling( floatx80, floatx80 ); 2623f04a273Ssimonb flag floatx80_le_quiet( floatx80, floatx80 ); 2633f04a273Ssimonb flag floatx80_lt_quiet( floatx80, floatx80 ); 2643f04a273Ssimonb flag floatx80_is_signaling_nan( floatx80 ); 2653f04a273Ssimonb 2663f04a273Ssimonb #endif 2673f04a273Ssimonb 2683f04a273Ssimonb #ifdef FLOAT128 2693f04a273Ssimonb 2703f04a273Ssimonb /* 2713f04a273Ssimonb ------------------------------------------------------------------------------- 2723f04a273Ssimonb Software IEC/IEEE quadruple-precision conversion routines. 2733f04a273Ssimonb ------------------------------------------------------------------------------- 2743f04a273Ssimonb */ 2753f04a273Ssimonb int float128_to_int32( float128 ); 2763f04a273Ssimonb int float128_to_int32_round_to_zero( float128 ); 2773f04a273Ssimonb long long float128_to_int64( float128 ); 2783f04a273Ssimonb long long float128_to_int64_round_to_zero( float128 ); 2793f04a273Ssimonb float32 float128_to_float32( float128 ); 2803f04a273Ssimonb float64 float128_to_float64( float128 ); 2813f04a273Ssimonb #ifdef FLOATX80 2823f04a273Ssimonb floatx80 float128_to_floatx80( float128 ); 2833f04a273Ssimonb #endif 2843f04a273Ssimonb 2853f04a273Ssimonb /* 2863f04a273Ssimonb ------------------------------------------------------------------------------- 2873f04a273Ssimonb Software IEC/IEEE quadruple-precision operations. 2883f04a273Ssimonb ------------------------------------------------------------------------------- 2893f04a273Ssimonb */ 2903f04a273Ssimonb float128 float128_round_to_int( float128 ); 2913f04a273Ssimonb float128 float128_add( float128, float128 ); 2923f04a273Ssimonb float128 float128_sub( float128, float128 ); 2933f04a273Ssimonb float128 float128_mul( float128, float128 ); 2943f04a273Ssimonb float128 float128_div( float128, float128 ); 2953f04a273Ssimonb float128 float128_rem( float128, float128 ); 2963f04a273Ssimonb float128 float128_sqrt( float128 ); 2973f04a273Ssimonb flag float128_eq( float128, float128 ); 2983f04a273Ssimonb flag float128_le( float128, float128 ); 2993f04a273Ssimonb flag float128_lt( float128, float128 ); 3003f04a273Ssimonb flag float128_eq_signaling( float128, float128 ); 3013f04a273Ssimonb flag float128_le_quiet( float128, float128 ); 3023f04a273Ssimonb flag float128_lt_quiet( float128, float128 ); 3033f04a273Ssimonb flag float128_is_signaling_nan( float128 ); 3043f04a273Ssimonb 3053f04a273Ssimonb #endif 306