1.\" $NetBSD: ahc.4,v 1.21 2002/08/30 21:54:12 abs Exp $ 2.\" 3.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 4.\" Justin T. Gibbs. All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. The name of the author may not be used to endorse or promote products 15.\" derived from this software without specific prior written permission. 16.\" 17.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27.\" 28.\" $FreeBSD: src/share/man/man4/ahc.4,v 1.22 2000/02/14 16:40:58 gibbs Exp $ 29.\" 30.Dd February 13, 2000 31.Dt AHC 4 32.Os 33.\".Os FreeBSD 34.Sh NAME 35.Nm ahc 36.Nd Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver 37.Sh SYNOPSIS 38.ie 0 \{ 39For one or more VL/EISA cards: 40.Cd device eisa 41.Cd device ahc 42\} 43\{For VL cards: 44.Cd ahc0 at isa? port ? irq ? 45.Pp 46For EISA cards: 47.Cd ahc* at eisa? slot ?\} 48.Pp 49.ie 0 \{ 50For one or more PCI cards: 51.Cd device pci 52.Cd device ahc 53\} 54\{For PCI cards: 55.Cd ahc* at pci? dev ? function ? 56.Pp 57For CardBus cards: 58.Cd ahc* at cardbus? dev ? function ?\} 59.Pp 60To allow PCI adapters to use memory mapped I/O if enabled: 61.Cd options AHC_ALLOW_MEMIO 62.Pp 63Disable tagged queuing (avoids hangs on some hardware under load) 64.Cd options AHC_NO_TAGS 65.Pp 66.if 0 \{ 67To configure one or more controllers to assume the target role: 68.Cd options AHC_TMODE_ENABLE \*[Lt]bitmask of units\*[Gt] 69.Pp 70\} 71.ie 0 \{ 72For one or more SCSI busses: 73.Cd device scbus0 at ahc0 74\} 75\{For 76.Tn SCSI 77busses: 78.Cd scsibus* at ahc?\} 79.Sh DESCRIPTION 80.ie 0 \{ 81This driver provides access to the 82.Tn SCSI 83bus(es) connected to Adaptec 84.Tn AIC7770 , 85.Tn AIC7850 , 86.Tn AIC7860 , 87.Tn AIC7870 , 88.Tn AIC7880 , 89.Tn AIC7890 , 90.Tn AIC7891 , 91.Tn AIC7892 , 92.Tn AIC7895 , 93.Tn AIC7896 , 94.Tn AIC7897 95and 96.Tn AIC7899 97host adapter chips. 98These chips are found on many motherboards as well as the following 99Adaptec SCSI controller cards: 100.Tn 274X(W) , 101.Tn 274X(T) , 102.Tn 284X , 103.Tn 2910 , 104.Tn 2915 , 105.Tn 2920C , 106.Tn 2930C , 107.Tn 2930U2 , 108.Tn 2940 , 109.Tn 2940U , 110.Tn 2940AU , 111.Tn 2940UW , 112.Tn 2940UW Dual , 113.Tn 2940UW Pro , 114.Tn 2940U2W , 115.Tn 2940U2B , 116.Tn 2950U2W , 117.Tn 2950U2B , 118.Tn 19160B , 119.Tn 29160B , 120.Tn 29160N , 121.Tn 3940 , 122.Tn 3940U , 123.Tn 3940AU , 124.Tn 3940UW , 125.Tn 3940AUW , 126.Tn 3940U2W , 127.Tn 3950U2 , 128.Tn 3960 , 129.Tn 39160 , 130.Tn 3985 , 131and 132.Tn 4944UW . 133\} 134\{The 135.Nm 136device driver supports 137.Tn SCSI 138controllers based on 139.Tn Adaptec 140.Tn AIC77xx 141and 142.Tn AIC78xx 143.Tn SCSI 144host adapter chips found on many motherboards as well as 145.Tn Adaptec 146.Tn SCSI 147controller cards.\} 148.Pp 149Driver features include support for twin and wide busses, 150fast, ultra or ultra2 synchronous transfers depending on controller type, 151.ie 0 \{ 152tagged queuing, SCB paging, and target mode. 153\} 154\{ 155tagged queuing and SCB paging.\} 156.Pp 157Memory mapped I/O can be enabled for PCI devices with the 158.Dq Dv AHC_ALLOW_MEMIO 159configuration option. 160Memory mapped I/O is more efficient than the alternative, programmed I/O. 161Most PCI BIOSes will map devices so that either technique for communicating 162with the card is available. 163In some cases, 164usually when the PCI device is sitting behind a PCI-\*[Gt]PCI bridge, 165the BIOS may fail to properly initialize the chip for memory mapped I/O. 166The typical symptom of this problem is a system hang if memory mapped I/O 167is attempted. 168Most modern motherboards perform the initialization correctly and work fine 169with this option enabled. 170.Pp 171.if 0 \{ 172Individual controllers may be configured to operate in the target role 173through the 174.Dq Dv AHC_TMODE_ENABLE 175configuration option. The value assigned to this option should be a bitmap 176of all units where target mode is desired. 177For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 178.Pp 179\} 180Per target configuration performed in the 181.Tn SCSI-Select 182menu, accessible at boot 183in 184.No non- Ns Tn EISA 185models, 186or through an 187.Tn EISA 188configuration utility for 189.Tn EISA 190models, 191is honored by this driver. 192This includes synchronous/asynchronous transfers, 193maximum synchronous negotiation rate, 194wide transfers, 195disconnection, 196the host adapter's SCSI ID, 197and, 198in the case of 199.Tn EISA 200Twin Channel controllers, 201the primary channel selection. 202For systems that store non-volatile settings in a system specific manner 203rather than a serial eeprom directly connected to the aic7xxx controller, 204the 205.Tn BIOS 206must be enabled for the driver to access this information. 207This restriction applies to all 208.Tn EISA 209and many motherboard configurations. 210.Pp 211Note that I/O addresses are determined automatically by the probe routines, 212but care should be taken when using a 284x 213.Pq Tn VESA No local bus controller 214in an 215.Tn EISA 216system. The jumpers setting the I/O area for the 284x should match the 217.Tn EISA 218slot into which the card is inserted to prevent conflicts with other 219.Tn EISA 220cards. 221.Pp 222Performance and feature sets vary throughout the aic7xxx product line. 223The following table provides a comparison of the different chips supported 224by the 225.Nm 226driver. Note that wide and twin channel features, although always supported 227by a particular chip, may be disabled in a particular motherboard or card 228design. 229.Pp 230.Bd -filled -offset indent 231.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 232.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 233aic7770 10 EISA/VL 10MHz 16Bit 4 1 234aic7850 10 PCI/32 10MHz 8Bit 3 235aic7860 10 PCI/32 20MHz 8Bit 3 236aic7870 10 PCI/32 10MHz 16Bit 16 237aic7880 10 PCI/32 20MHz 16Bit 16 238aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 239aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 240aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8 241aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 242aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 243aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 244aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 245aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8 246.El 247.Bl -enum -compact 248.It 249Multiplexed Twin Channel Device - One controller servicing two busses. 250.It 251Multi-function Twin Channel Device - Two controllers on one chip. 252.It 253Command Channel Secondary DMA Engine - Allows scatter gather list and 254SCB prefetch. 255.It 25664 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 257.It 258Block Move Instruction Support - Doubles the speed of certain sequencer 259operations. 260.It 261.Sq Bayonet 262style Scatter Gather Engine - Improves S/G prefetch performance. 263.It 264Queuing Registers - Allows queuing of new transactions without pausing the 265sequencer. 266.It 267Multiple Target IDs - Allows the controller to respond to selection as a 268target on multiple SCSI IDs. 269.El 270.Ed 271.Sh HARDWARE 272Supported 273.Tn SCSI 274controllers include: 275.Pp 276.Bl -item -offset indent 277.It 278.Tn Adaptec AHA-2742W 279EISA Fast Wide SCSI adapter 280.It 281.Tn Adaptec AHA-274xAT 282EISA dual channel Fast SCSI adapter 283.It 284.Tn Adaptec AHA-284x 285VL Fast SCSI adapter 286.It 287.Tn Adaptec AHA-2910 288PCI Fast SCSI adapter (no SCSI BIOS) 289.It 290.Tn Adaptec AHA-2915 291PCI Fast SCSI adapter (no SCSI BIOS) 292.It 293.Tn Adaptec AHA-2920C 294PCI Fast SCSI adapter 295.Bl -item -offset indent 296.It 297Note: 298Adaptec AHA-2920/A which use the Future Domain's chips are not supported 299by this driver. 300.El 301.It 302.Tn Adaptec AHA-2930C 303PCI Ultra SCSI adapter 304.It 305.Tn Adaptec AHA-2930U2 306PCI Ultra2 Wide LVD SCSI adapter 307.It 308.Tn Adaptec AHA-2940 309PCI Fast SCSI adapter 310.It 311.Tn Adaptec AHA-2940U 312PCI Ultra SCSI adapter 313.It 314.Tn Adaptec AHA-2940AU 315PCI Ultra SCSI adapter 316.It 317.Tn Adaptec AHA-2940UW 318PCI Ultra Wide SCSI adapter 319.It 320.Tn Adaptec AHA-2940UW Dual 321PCI dual channel Ultra Wide SCSI adapter 322.It 323.Tn Adaptec AHA-2940UW Pro 324PCI Ultra Wide SCSI adapter 325.It 326.Tn Adaptec AHA-2940U2W 327PCI Ultra2 Wide LVD SCSI adapter 328.It 329.Tn Adaptec AHA-2940U2B 330PCI Ultra2 Wide LVD SCSI adapter 331.It 332.Tn Adaptec AHA-2944W 333PCI Fast Wide Differential SCSI adapter 334.It 335.Tn Adaptec AHA-2944UW 336PCI Ultra Wide Differential SCSI adapter 337.It 338.Tn Adaptec AHA-2950U2W 339.It 340.Tn Adaptec AHA-2950U2B 34164bit PCI Ultra2 Wide LVD SCSI adapter 342.It 343.Tn Adaptec AHA-19160B 344PCI Ultra160 Wide LVD SCSI adapter 345.It 346.Tn Adaptec AHA-29160N 347PCI Ultra160 Wide LVD SCSI adapter 348.It 349.Tn Adaptec AHA-29160B 35064bit PCI Ultra160 Wide LVD SCSI adapter 351.It 352.Tn Adaptec AHA-3940 353PCI dual channel Fast SCSI adapter 354.It 355.Tn Adaptec AHA-3940U 356PCI dual channel Ultra SCSI adapter 357.It 358.Tn Adaptec AHA-3940AU 359PCI dual channel Ultra SCSI adapter 360.It 361.Tn Adaptec AHA-3940UW 362PCI dual channel Ultra Wide SCSI adapter 363.It 364.Tn Adaptec AHA-3940AUW 365PCI dual channel Ultra Wide SCSI adapter 366.It 367.Tn Adaptec AHA-3940U2W 368PCI dual channel Ultra2 Wide LVD SCSI adapter 369.It 370.Tn Adaptec AHA-3950U2 37164bit PCI dual channel Ultra2 Wide LVD SCSI adapter 372.It 373.Tn Adaptec AHA-3960 37464bit PCI dual channel Ultra160 Wide LVD SCSI adapter 375.It 376.Tn Adaptec AHA-3985 377PCI dual channel Fast SCSI RAID adapter 378.It 379.Tn Adaptec AHA-39160 38064bit PCI dual channel Ultra160 Wide LVD SCSI adapter 381.It 382.Tn Adaptec AHA-4944UW 383PCI quad channel PCI Ultra Wide Differential SCSI adapter 384.It 385Other SCSI controllers based on the 386.Tn Adaptec 387.Tn AIC7770 , 388.Tn AIC7850 , 389.Tn AIC7860 , 390.Tn AIC7870 , 391.Tn AIC7880 , 392.Tn AIC7890 , 393.Tn AIC7891 , 394.Tn AIC7892 , 395.Tn AIC7895 , 396.Tn AIC7896 , 397.Tn AIC7897 398and 399.Tn AIC7899 400.Tn SCSI 401host adapter chips. 402.El 403.Sh SCSI CONTROL BLOCKS (SCBs) 404Every transaction sent to a device on the SCSI bus is assigned a 405.Sq SCSI Control Block 406(SCB). The SCB contains all of the information required by the 407controller to process a transaction. The chip feature table lists 408the number of SCBs that can be stored in on-chip memory. All chips 409with model numbers greater than or equal to 7870 allow for the on chip 410SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 411Very few Adaptec controller configurations have external SRAM. 412.Pp 413If external SRAM is not available, SCBs are a limited resource. 414Using the SCBs in a straight forward manner would only allow the driver to 415handle as many concurrent transactions as there are physical SCBs. 416To fully utilize the SCSI bus and the devices on it, 417requires much more concurrency. 418The solution to this problem is 419.Em SCB Paging , 420a concept similar to memory paging. SCB paging takes advantage of 421the fact that devices usually disconnect from the SCSI bus for long 422periods of time without talking to the controller. The SCBs 423for disconnected transactions are only of use to the controller 424when the transfer is resumed. When the host queues another transaction 425for the controller to execute, the controller firmware will use a 426free SCB if one is available. Otherwise, the state of the most recently 427disconnected (and therefor most likely to stay disconnected) SCB is 428saved, via dma, to host memory, and the local SCB reused to start 429the new transaction. This allows the controller to queue up to 430255 transactions regardless of the amount of SCB space. Since the 431local SCB space serves as a cache for disconnected transactions, the 432more SCB space available, the less host bus traffic consumed saving 433and restoring SCB data. 434.Sh SEE ALSO 435.Xr aha 4 , 436.Xr ahb 4 , 437.Xr cd 4 , 438.Xr ch 4 , 439.Xr intro 4 , 440.Xr scsi 4 , 441.Xr sd 4 , 442.Xr st 4 443.Sh HISTORY 444The 445.Nm 446driver appeared in 447.Fx 2.0 448and 449.Nx 1.1 . 450.Sh AUTHORS 451The 452.Nm 453driver, the 454.Tn AIC7xxx 455sequencer-code assembler, 456and the firmware running on the aic7xxx chips was written by 457.An Justin T. Gibbs . 458.Nx 459porting is done by Stefan Grefen, Charles M. Hannum, 460Michael Graff, Jason R. Thorpe, Pete Bentley, 461Frank van der Linden and Noriyuki Soda. 462.Sh BUGS 463Some 464.Tn Quantum 465drives (at least the Empire 2100 and 1080s) will not run on an 466.Tn AIC7870 467Rev B in synchronous mode at 10MHz. Controllers with this problem have a 46842 MHz clock crystal on them and run slightly above 10MHz. This confuses 469the drive and hangs the bus. Setting a maximum synchronous negotiation rate 470of 8MHz in the 471.Tn SCSI-Select 472utility will allow normal operation. 473.Pp 474Double Transition clocking is not yet supported for Ultra160 controllers. 475This limits these controllers to 40MHz or 80MB/s. 476.Pp 477.ie 0 \{ 478Although the Ultra2 and Ultra160 products have sufficient instruction 479ram space to support both the initiator and target roles concurrently, 480this configuration is disabled in favor of allowing the target role 481to respond on multiple target ids. A method for configuring dual 482role mode should be provided. 483.Pp 484Tagged Queuing is not supported in target mode. 485.Pp 486Reselection in target mode fails to function correctly on all high 487voltage differential boards as shipped by Adaptec. Information on 488how to modify HVD board to work correctly in target mode is available 489from Adaptec. 490\} 491\{Target mode is not supported on 492.Nx 493version of this driver.\} 494