1.\" $NetBSD: pcibios.4,v 1.17 2009/11/02 00:50:29 joerg Exp $ 2.\" 3.\" Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Lennart Augustsson. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd October 9, 2005 31.Dt PCIBIOS 4 i386 32.Os 33.Sh NAME 34.Nm pcibios 35.Nd introduction to PCI BIOS support 36.Sh SYNOPSIS 37.Cd "options PCIBIOS" 38.Cd "options PCIBIOSVERBOSE" 39.Cd "#options PCIBIOS_IRQS_HINT=0x0a00 #IRQ 9,11" 40.Cd "#options PCIBIOS_INTR_FIXUP_FORCE" 41.Cd "options PCIBIOS_INTR_GUESS" 42.Cd "#options PCIINTR_DEBUG" 43.Sh INTRODUCTION 44.Nm 45provides support for setting up PCI controllers, bridges, and devices 46using information extracted from the BIOS. 47.Pp 48Ideally, the boot firmware of a machine (a.k.a. BIOS) should set 49up all PCI devices; assigning them I/O and memory addresses and 50interrupts. Alas, this does not always happen, so there is some 51PC specific code that can do the initialization when 52.Nx 53boots. 54.Pp 55Options: 56.Bl -tag -width PCIBIOS_IRQS_HINT -offset 3n 57.It Nm PCIBIOS 58turn on the PCI BIOS support. 59.It Nm PCIBIOSVERBOSE 60make the setup procedure verbose. 61.It Nm PCIBIOS_IRQS_HINT 62hint for IRQ use. 63When 64.Em PCI_INTR_FIXUP 65cannot guess an adequate IRQ for a device, the hint is used. 66.Pp 67The value is a logical or of power-of-2s of allowable interrupts: 68.Bl -column "XX-0xffff" "XX-0xffff" "XX-0xffff" "XX-0xffff" -compact -offset 2n 69.It Em "IRQ Value" Ta Em "IRQ Value" Ta Em "IRQ Value" Ta Em "IRQ Value" 70.It "\& 0 0x0001" Ta " 4 0x0010" Ta " 8 0x0100" Ta "12 0x1000" 71.It "\& 1 0x0002" Ta " 5 0x0020" Ta " 9 0x0200" Ta "13 0x2000" 72.It "\& 2 0x0004" Ta " 6 0x0040" Ta "10 0x0400" Ta "14 0x4000" 73.It "\& 3 0x0008" Ta " 7 0x0080" Ta "11 0x0800" Ta "15 0x8000" 74.El 75For example, 76.Qq Sy options PCIBIOS_IRQS_HINT=0x0a00 77allows IRQ 9 and IRQ 11. 78.Pp 79The kernel global variable 80.Va pcibios_irqs_hint 81holds this value, 82so a user can override this value without kernel recompilation. 83For example: 84.Bl -bullet -compact 85.It 86To specify this value on the fly, type the following command 87at the boot prompt to drop into DDB (the in-kernel debugger; 88you have to specify 89.Qq Sy options DDB 90to make kernel with DDB): 91.Dl Ic boot -d 92And type the following command on 93.Qq Sy db\*[Gt] 94prompt: 95.Dl Ic write pcibios_irqs_hint 0x0a00 96Then type the following to continue to boot: 97.Dl Ic c 98.It 99To modify kernel image without kernel recompilation, 100run the following command on shell: 101.Dl Ic gdb --write /netbsd 102And type the following commands at the 103.Qq Sy (gdb) 104prompt: 105.Dl Ic set pcibios_irqs_hint=0xa00 106.Dl Ic quit 107.El 108.It Nm PCIBIOS_INTR_FIXUP_FORCE 109Some buggy BIOS implementations provide inconsistent 110information between the PCI Interrupt Configuration Register 111and the PCI Interrupt Routing table. In such case, 112the PCI Interrupt Configuration Register takes precedence 113by default. If this happens, a kernel with 114.Em PCIBIOSVERBOSE 115shows 116.Qq Sy WARNING: preserving irq XX 117in the PCI routing table. 118.Pp 119If 120.Em PCIBIOS_INTR_FIXUP_FORCE 121is specified in addition to the 122.Em PCI_INTR_FIXUP , 123the PCI Interrupt Routing table takes precedence. 124In this case, a kernel with 125.Em PCIBIOSVERBOSE 126shows 127.Qq Sy WARNING: overriding irq XX 128in the PCI routing table. 129.It Nm PCIBIOS_INTR_GUESS 130make 131.Em PCI_INTR_FIXUP 132work with unknown interrupt router. 133.Pp 134If a PCI interrupt router is not known, normally interrupt 135configuration will not be touched. 136.Pp 137But if 138.Em PCIBIOS_INTR_GUESS 139is specified in addition to the 140.Em PCI_INTR_FIXUP , 141and if a PCI interrupt routing table entry indicates that only 142one IRQ is available for the entry, the IRQ is assumed to be already 143connected to the device, and corresponding PCI Interrupt 144Configuration Register will be configured accordingly. 145.It Nm PCIINTR_DEBUG 146make the 147.Em PCI_INTR_FIXUP 148procedure verbose. 149.El 150.Sh SEE ALSO 151.Xr cardbus 4 , 152.Xr pci 4 153.Sh HISTORY 154The 155.Nm 156code appeared in 157.Nx 1.5 . 158.Sh BUGS 159The 160.Em PCIBIOS_ADDR_FIXUP 161option may conflict with the PCI CardBus driver's own 162address fixup. 163