1.\" $NetBSD: pcibios.4,v 1.13 2002/02/13 08:18:00 ross Exp $ 2.\" 3.\" Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Lennart Augustsson. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 3. All advertising materials mentioning features or use of this software 18.\" must display the following acknowledgement: 19.\" This product includes software developed by the NetBSD 20.\" Foundation, Inc. and its contributors. 21.\" 4. Neither the name of The NetBSD Foundation nor the names of its 22.\" contributors may be used to endorse or promote products derived 23.\" from this software without specific prior written permission. 24.\" 25.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35.\" POSSIBILITY OF SUCH DAMAGE. 36.\" 37.Dd July 22, 2000 38.Dt PCIBIOS 4 i386 39.Os 40.Sh NAME 41.Nm pcibios 42.Nd introduction to PCI BIOS support 43.Sh SYNOPSIS 44.Cd "options PCIBIOS" 45.Cd "options PCIBIOSVERBOSE" 46.Cd "options PCIBIOS_ADDR_FIXUP" 47.Cd "options PCIBIOS_BUS_FIXUP" 48.Cd "options PCIBIOS_INTR_FIXUP" 49.Cd "#options PCIBIOS_IRQS_HINT=0x0a00 #IRQ 9,11" 50.Cd "#options PCIBIOS_INTR_FIXUP_FORCE" 51.Cd "options PCIBIOS_INTR_GUESS" 52.Cd "#options PCIINTR_DEBUG" 53.Sh INTRODUCTION 54.Nm 55provides support for setting up PCI controllers, bridges, and devices 56using information extracted from the BIOS. 57.Pp 58Ideally, the boot firmware of a machine (a.k.a. BIOS) should set 59up all PCI devices; assigning them I/O and memory addresses and 60interrupts. Alas, this does not always happen, so there is some 61PC specific code that can do the initialization when 62.Nx 63boots. 64.Pp 65Options: 66.Bl -tag -width PCIBIOS_INTR_FIXUP -offset 3n 67.It Nm PCIBIOS 68turn on the PCI BIOS support. 69.It Nm PCIBIOSVERBOSE 70make the setup procedure verbose. 71.It Nm PCIBIOS_ADDR_FIXUP 72fixup PCI I/O and memory addresses. 73.Pp 74Some BIOS implementations don't allocate I/O space and 75memory space for some PCI devices. Especially, a BIOS 76which is 77.Qq PnP OS mode enabled 78shows this behavior. 79Since necessary space isn't allocated, those devices 80will not work without special handling. 81.Pp 82This option allocates I/O space and memory space 83instead of relying upon the BIOS to do so. 84.Pp 85If necessary space is already correctly assigned to the devices, 86this option leaves the space as is. 87.Pp 88Although many BIOS implementations leave CardBus bridges' 89space unallocated, the CardBus bridge device driver doesn't 90require this option, since the driver allocates necessary space 91by itself. 92.Pp 93.It Nm PCIBIOS_BUS_FIXUP 94fixup PCI bus numbering; needed for many 95.Xr cardbus 4 96bridges. 97.Pp 98Each PCI bus and CardBus should have a unique bus number. 99But some BIOS implementations don't assign a bus number 100for subordinate PCI buses. And many BIOS implementations 101don't assign a bus number for CardBuses. 102.Pp 103A typical symptom of this is the following boot message: 104.D1 Sy cardbus0 at cardslot0: bus 0 device 0... 105Please note that this cardbus0 has a bus number 106.Sq 0 , 107but normally the bus number 0 is used by the machine's 108primary PCI bus. Thus, this bus number for cardbus is 109incorrect 110.Pq not assigned . 111In this situation, a device located in cardbus0 doesn't 112show correct device ID, 113because its bus number 0 incorrectly refers to the primary 114PCI bus, and a device ID in the primary PCI bus is shown 115in the boot message instead of the device's ID in the cardbus0. 116.Pp 117This option assigns bus numbers for all subordinate 118PCI buses and CardBuses. 119.Pp 120Since this option renumbers all PCI buses and CardBuses, 121all bus numbers of subordinate buses become different 122when this option is enabled. 123.It Nm PCIBIOS_INTR_FIXUP 124fixup PCI interrupt routing. 125.Pp 126Some BIOS implementations don't assign an interrupt for 127some devices. 128.Pp 129This option assigns an interrupt for such devices instead 130of relying upon the BIOS to do so. 131.Pp 132If the BIOS has already assigned an interrupt to a device, this 133option leaves the interrupt as is. 134.It Nm PCIBIOS_IRQS_HINT 135hint for IRQ use. 136When the 137.Em PCIBIOS_INTR_FIXUP 138cannot guess an adequate IRQ for a device, the hint is used. 139.Pp 140The value is a logical or of power-of-2s of allowable interrupts: 141.Bl -column "XX-0xffff" "XX-0xffff" "XX-0xffff" "XX-0xffff" -compact -offset 2n 142.It Em "IRQ Value" Em "\tIRQ Value" Em "\tIRQ Value" Em "\tIRQ Value" 143.It "\& 0 0x0001" "\t 4 0x0010" "\t 8 0x0100" "\t12 0x1000" 144.It "\& 1 0x0002" "\t 5 0x0020" "\t 9 0x0200" "\t13 0x2000" 145.It "\& 2 0x0004" "\t 6 0x0040" "\t10 0x0400" "\t14 0x4000" 146.It "\& 3 0x0008" "\t 7 0x0080" "\t11 0x0800" "\t15 0x8000" 147.El 148For example, 149.Qq Sy options PCIBIOS_IRQS_HINT=0x0a00 150allows IRQ 9 and IRQ 11. 151.Pp 152The kernel global variable 153.Va pcibios_irqs_hint 154holds this value, 155so a user can override this value without kernel recompilation. 156For example: 157.Bl -bullet -compact 158.It 159To specify this value on the fly, type the following command 160at the boot prompt to drop into DDB (the in-kernel debugger; 161you have to specify 162.Qq Sy options DDB 163to make kernel with DDB): 164.Dl Ic boot -d 165And type the following command on 166.Qq Sy db\*[Gt] 167prompt: 168.Dl Ic write pcibios_irqs_hint 0x0a00 169Then type the following to continue to boot: 170.Dl Ic c 171.It 172To modify kernel image without kernel recompilation, 173run the following command on shell: 174.Dl Ic gdb --write /netbsd 175And type the following commands at the 176.Qq Sy (gdb) 177prompt: 178.Dl Ic set pcibios_irqs_hint=0xa00 179.Dl Ic quit 180.El 181.It Nm PCIBIOS_INTR_FIXUP_FORCE 182Some buggy BIOS implementations provide inconsistent 183information between the PCI Interrupt Configuration Register 184and the PCI Interrupt Routing table. In such case, 185the PCI Interrupt Configuration Register takes precedence 186by default. If this happens, a kernel with 187.Em PCIBIOSVERBOSE 188shows 189.Qq Sy WARNING: preserving irq XX 190in the PCI routing table. 191.Pp 192If 193.Em PCIBIOS_INTR_FIXUP_FORCE 194is specified in addition to the 195.Em PCIBIOS_INTR_FIXUP , 196the PCI Interrupt Routing table takes precedence. 197In this case, a kernel with 198.Em PCIBIOSVERBOSE 199shows 200.Qq Sy WARNING: overriding irq XX 201in the PCI routing table. 202.It Nm PCIBIOS_INTR_GUESS 203make 204.Em PCIBIOS_INTR_FIXUP 205work with unknown interrupt router. 206.Pp 207If a PCI interrupt router is not known, normally interrupt 208configuration will not be touched. 209.Pp 210But if 211.Em PCIBIOS_INTR_GUESS 212is specified in addition to the 213.Em PCIBIOS_INTR_FIXUP , 214and if a PCI interrupt routing table entry indicates that only 215one IRQ is available for the entry, the IRQ is assumed to be already 216connected to the device, and corresponding PCI Interrupt 217Configuration Register will be configured accordingly. 218.It Nm PCIINTR_DEBUG 219make the 220.Em PCIBIOS_INTR_FIXUP 221procedure verbose. 222.El 223.Sh SEE ALSO 224.Xr cardbus 4 , 225.Xr pci 4 226.Sh HISTORY 227The 228.Nm 229code appeared in 230.Nx 1.5 . 231.Sh BUGS 232The 233.Em PCIBIOS_ADDR_FIXUP 234option may conflict with the PCI CardBus driver's own 235address fixup. 236