1.\" $NetBSD: clmpcc.4,v 1.6 2008/04/30 13:10:56 martin Exp $ 2.\" 3.\" Copyright (c) 1999 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Steve C. Woodford. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd November 28, 1999 31.Dt CLMPCC 4 mvme68k 32.Os 33.Sh NAME 34.Nm clmpcc 35.Nd Cirrus Logic CD2400/CD2401 serial communications controller 36.Sh SYNOPSIS 37.Cd "clmpcc0 at pcctwo? ipl 4" 38.Sh DESCRIPTION 39The 40.Nm 41driver provides support for the Cirrus Logic CD2401 Multi-protocol 42Communications Controller found on Motorola MVME167 and MVME177 43single-board computers. 44.Pp 45The chip integrates four serial channels in one package, 46with each channel being completely independent and capable of 47running in Async (with optional DMA control), Bisync, HDLC/SDLC and 48X.21 modes. Each channel has 32 bytes of FIFO, split into 16 bytes 49for the Tx side and 16 bytes for the Rx side. 50.Pp 51At the present time, the 52.Nm 53driver supports the non-DMA Async mode of operation, using the 54channel FIFOs to maximize throughput with minimal interrupt overhead. 55.Pp 56The Motorola MVME1x7 boards provide a 20MHz master clock to the device, 57which allows the Tx and Rx side to be independently set to any 58baud rate in the range 50 to 57600. 59The device should be capable of running at 60a baud rate of 115200, however it is not a rate documented in the 61device's datasheet for Async. mode so is not recommended. 62.Sh FILES 63.Bl -tag -width Pa 64.It Pa /dev/console 65.It Pa /dev/ttyC1 66.It Pa /dev/ttyC2 67.It Pa /dev/ttyC3 68.El 69.Sh DIAGNOSTICS 70.Bl -diag 71.It clmpcc%d: channel %d command timeout (idle) 72The chip failed to acknowledge a command sent to the specified 73channel. 74.It clmpcc%d: Failed to reset chip 75The 76.Nm 77driver was unable to determine if the chip completed 78its RESET processing. 79.El 80.Sh SEE ALSO 81.Xr pcctwo 4 , 82.Xr tty 4 83.Sh HISTORY 84The 85.Nm 86driver first appeared in 87.Nx 1.4 88and is 89.Ud 90.Sh BUGS 91The hardware flow control features of the chip are not yet fully 92supported. 93