1.\" $NetBSD: ntwoc.4,v 1.9 2004/05/11 22:59:56 wiz Exp $ 2.\" 3.\" Copyright (c) 2000 Christian E. Hopps 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. The name of the author may not be used to endorse or promote products 15.\" derived from this software without specific prior written permission 16.\" 17.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27.\" 28.Dd October 2, 1998 29.Dt NTWOC 4 30.Os 31.Sh NAME 32.Nm ntwoc 33.Nd Riscom/N2, N2pci, WANic 400 synchronous serial interfaces 34.Sh SYNOPSIS 35.Cd "ntwoc* at pci? dev ? function ? flags 0" 36.Cd "ntwoc0 at isa? port 0x300 irq 5 iomem 0xc8000 flags 1" 37.Sh DESCRIPTION 38The 39.Nm 40device driver supports bit-synchronous serial communication using 41Cisco HDLC framing. 42The cards are capable of being driven by 43the line clock or from an internal baud rate generator. 44The devices all use the Hitachi hd64570 serial chip. 45The hd64570 supports 2 asynchronous/byte-synchronous/bit-synchronous 46serial ports, and has a 4-channel DMA controller for loading 47the serial port FIFOs. 48.Pp 49The ISA Riscom/N2 card has a jumper block to set the IRQ and a DIP switch 50to set the port address the card will use. 51The values programmed into the card must be specified with the 52.Cm port 53and 54.Cm irq 55locators in the kernel configuration line. 56The 57.Cm iomem 58locator must be specified and must occur on a 16k boundary. 59The driver uses a 16k region of io memory. 60Bit 0 of the 61.Cm flags 62locator indicates if there is a second serial port available on the 63card. 64.Pp 65Currently 66clock source and speed information is specified with the 67.Cm flags 68locator in the kernel configuration file. 69The flags field has the following format. 70.Bd -literal 71 3 2 1 721 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 73+-------------+ +-----+ +-----+ + +---+ +-+ + +---+ +-+ + 74 tmc tdiv rdiv e1 rxs1 ts1 e0 rxs0 txs0 np(*) 75.Ed 76.Bl -tag -width "rxs0 rxs1" 77.It Va tmc 78Defines the timer constant. 79The base clock frequency is divided by 80.Va tmc 81to generate the main clock for receiving and sending. 82Further division is possible with the 83.Va tdiv 84and 85.Va rdiv 86divisor options. 87A value of 0 is treated as 256. 88.It Va tdiv 89Defines the transmit divisor as 90.Pf "2^(" Va tdiv ) . 91The internal transmit clock 92frequency is determined by dividing the base clock frequency by 93.Va tmc 94and then dividing by 95.Pf "2^(" Va tdiv ) . 96.It Va rdiv 97Defines the receive divisor as 98.Pf "2^(" Va rdiv ) . 99The internal receive clock 100frequency is determined by dividing the base clock frequency by 101.Va tmc 102and then dividing by 103.Pf "2^(" Va rdiv ) . 104.It Va e0 Va e1 105If true the internal clock source is used to drive the line clock for port 0 106or port 1 respectively. 107.It Va rxs0 Va rxs1 108Specifies which clock source to use for receiving data on port 0 and 109port 1 respectively. 110The following values are accepted: 111.Pp 112.Bl -tag -width "000" -compact 113.It 0 114Line clock. 115.It 1 116Line clock with noise suppression. 117.It 2 118Internal clock. 119.El 120.It Va txs0 Va txs1 121Specifies which clock source to use for transmitting data on port 0 122and port 1 respectively. 123The following values are accepted: 124.Pp 125.Bl -tag -width "000" -compact 126.It 0 127Line clock. 128.It 1 129Internal clock. 130.It 2 131Receive clock. 132.El 133.It Va np 134(For the ISA card only) 135A value of 1 indicates there is a second serial 136port present on the card. 137This is auto-detected on the PCI card and need not be specified. 138.El 139.Sh HARDWARE 140Cards supported by the 141.Nm 142driver include: 143.Pp 144.Bl -item -compact 145.It 146SDL Communications Riscom/N2 147.It 148SDL Communications N2pci 149.It 150SDL Communications WANic 400 (untested) 151.El 152.Sh DIAGNOSTICS 153.Bl -diag 154.It "ntwoc0: TXDMA underrun - fifo depth maxed" 155Indicates that the serial port's FIFO is being drained faster 156than DMA can fill it. 157The driver automatically increases the low-water mark at which to 158begin DMA transfers when underruns occur. 159This diagnostic is issued when the low-water mark is 160maximized (i.e., 1 less than the depth of the FIFO). 161.It "ntwoc0: RXDMA buffer overflow" 162Indicates that a frame is being received by the card, but 163there are no free receive buffers. 164.El 165.Sh SEE ALSO 166.Xr intro 4 , 167.Xr isa 4 , 168.Xr pci 4 , 169.Xr ifconfig 8 170.Sh HISTORY 171The PCI driver first appeared in 172.Nx 1.4 . 173Much of the ISA driver was adapted from the 174.Fx 175.Nm sr 176driver and first appeared in 177.Nx 1.5 . 178.Sh BUGS 179Use of the 180.Cm flags 181locator for setting the clock sources and speeds should be replaced with 182ioctl's and a control program. 183