1.\" $NetBSD: mca.9,v 1.4 2002/02/13 08:18:45 ross Exp $ 2.\" 3.\" Copyright (c) 2001 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Gregory McGarry. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 3. All advertising materials mentioning features or use of this software 18.\" must display the following acknowledgement: 19.\" This product includes software developed by the NetBSD 20.\" Foundation, Inc. and its contributors. 21.\" 4. Neither the name of The NetBSD Foundation nor the names of its 22.\" contributors may be used to endorse or promote products derived 23.\" from this software without specific prior written permission. 24.\" 25.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35.\" POSSIBILITY OF SUCH DAMAGE. 36.\" 37.Dd October 7, 2001 38.Dt MCA 9 39.Os 40.Sh NAME 41.Nm MCA , 42.Nm mca_intr_establish , 43.Nm mca_intr_disestablish , 44.Nm mca_intr_evcnt , 45.Nm mca_conf_read , 46.Nm mca_conf_write 47.Nd MicroChannel Architecture bus 48.Sh SYNOPSIS 49.Fd #include \*[Lt]machine/bus.h\*[Gt] 50.Fd #include \*[Lt]dev/mca/mcavar.h\*[Gt] 51.Fd #include \*[Lt]dev/mca/mcadevs.h\*[Gt] 52.Ft void * 53.Fn mca_intr_establish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" \ 54"int level" "int (*handler)(void *)" "void *arg" 55.Ft void 56.Fn mca_intr_disestablish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 57.Ft const struct evcnt * 58.Fn mca_intr_evcnt "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 59.Ft int 60.Fn mca_conf_read "mca_chipset_tag_t mc" "int slot" "int reg" 61.Ft void 62.Fn mca_conf_write "mca_chipset_tag_t mc" "int slot" "int reg" \ 63"int data" 64.Sh DESCRIPTION 65The 66.Nm 67device provides support for IBM's MicroChannel Architecture bus found 68on IBM PS/2 systems and selected workstations. It was designed as a 69replacement bus for the ISA bus found on IBM's older machines. 70However, the bus specifications were only available under license, so 71MCA did not achieve widespread acceptance in the industry. 72.Pp 73Being a replacement for the ISA bus, the MCA bus does share some 74similar aspects with the ISA bus. Some MCA devices can be detected 75via the usual ISA-style probing. However, most device detection is 76done through the Programmable Option Select (POS) registers. These 77registers provide a window into a device to determine device-specific 78properties and configuration. The configuration of devices and their 79POS registers is performed using IBM's system configuration software. 80.Pp 81The MCA bus uses level-triggered interrupts while the ISA bus uses 82edge-triggered interrupts. Level triggered interrupts have the 83advantage that they can be shared among multiple device. Therefore, 84most MCA-specific devices should be coded with shared interrupts in 85mind. 86.Sh DATA TYPES 87Drivers for devices attached to the MCA bus will make use of the 88following data types: 89.Bl -tag -width compact 90.It Fa mca_chipset_tag_t 91Chipset tag for the MCA bus. 92.It Fa mca_intr_handle_t 93The opaque handle describing an established interrupt handler. 94.It Fa struct mca_attach_args 95A structure use to inform the driver of MCA bus properties. 96It contains the following members: 97.Bd -literal 98 bus_space_tag_t ma_iot; /* MCA I/O space tag */ 99 bus_space_tag_t ma_memt; /* MCA mem space tag */ 100 bus_dma_tag_t ma_dmat; /* MCA DMA tag */ 101 int ma_slot; /* MCA slot number */ 102 int ma_pos[8]; /* MCA POS values */ 103 int ma_id; /* MCA device */ 104.Ed 105.El 106.Sh FUNCTIONS 107.Bl -tag -width compact 108.It Fn mca_intr_establish "mc" "hdl" "level" "handler" "arg" 109Establish a MCA interrupt handler on the MCA bus specified by 110.Fa mc 111for the interrupt described completely by 112.Fa hdl . 113The priority of the interrupt is specified by 114.Fa level . 115When the interrupt occurs the function 116.Fa handler 117is called with argument 118.Fa arg . 119.It Fn mca_intr_disestablish "mc" "hdl" 120Dis-establish the interrupt handler on the MCA bus specified by 121.Fa mc 122for the interrupt described completely 123.Fa hdl . 124.It Fn mca_intr_evcnt "mc" "hdl" 125Do interrupt event counting on the MCA bus specified by 126.Fa mc 127for the event described completely by 128.Fa hdl . 129.It Fn mca_conf_read "mc" "slot" "reg" 130Read the POS register 131.Fa reg 132for the device in slot 133.Fa slot 134on the MCA bus specified by 135.Fa mc . 136.It Fn mca_conf_write "mc" "slot" "reg" "data" 137Write data 138.Fa data 139to the POS register 140.Fa reg 141for the device in slot 142.Fa slot 143on the MCA bus specified by 144.Fa mc . 145.El 146.Sh AUTOCONFIGURATION 147The MCA bus is a direct-connection bus. During autoconfiguration, the 148parent specifies the MCA device ID for the found device in the 149.Fa ma_id 150member of the 151.Em mca_attach_args 152structure. Drivers should match on the device ID. Device 153capabilities and configuration information should be read from device 154POS registers using 155.Fn mca_conf_read . 156Some important configuration information found in the POS registers 157include the I/O base address, memory base address and interrupt 158number. The location of these configurable options with the POS 159registers are device specific. 160.Sh DMA SUPPORT 161The MCA bus supports 32-bit, bidirectional DMA transfers. Currently, 162no machine-independent support for MCA DMA is available. 163.Sh CODE REFERENCES 164This section describes places within the 165.Nx 166source tree where actual code implementing or utilising the 167machine-independent MCA subsystem can be found. All pathnames are 168relative to 169.Pa /usr/src . 170.Pp 171The MCA subsystem itself is implemented within the file 172.Pa sys/dev/mca/mca_subr.c . 173Machine-dependent portions can be found in 174.Pa sys/arch/\*[Lt]arch\*[Gt]/mca/mca_machdep.c . 175The database of known devices exists within the file 176.Fa sys/dev/mca/mcadevs_data.h 177and is generated automatically from the file 178.Pa sys/dev/mca/mcadevs . 179New vendor and product identifiers should be added to this 180file. The database can be regenerated using the Makefile 181.Pa sys/dev/mca/Makefile.mcadevs . 182.Pp 183A good source of information about MCA devices is IBM's system 184configuration disk. The disk contains .adf files which describe the 185location of device configuration options in the POS registers. 186.Sh SEE ALSO 187.Xr mca 4 , 188.Xr autoconf 9 , 189.Xr bus_dma 9 , 190.Xr bus_space 9 , 191.Xr driver 9 , 192.Xr isa 9 193.Sh BUGS 194The machine-independent 195.Nm 196driver does not currently support DMA. MCA devices which require DMA 197operation currently access the DMA capabilities directly. 198