1.\" $NetBSD: mca.9,v 1.5 2002/10/14 13:43:27 wiz Exp $ 2.\" 3.\" Copyright (c) 2001 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Gregory McGarry. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 3. All advertising materials mentioning features or use of this software 18.\" must display the following acknowledgement: 19.\" This product includes software developed by the NetBSD 20.\" Foundation, Inc. and its contributors. 21.\" 4. Neither the name of The NetBSD Foundation nor the names of its 22.\" contributors may be used to endorse or promote products derived 23.\" from this software without specific prior written permission. 24.\" 25.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35.\" POSSIBILITY OF SUCH DAMAGE. 36.\" 37.Dd October 7, 2001 38.Dt MCA 9 39.Os 40.Sh NAME 41.Nm MCA , 42.Nm mca_intr_establish , 43.Nm mca_intr_disestablish , 44.Nm mca_intr_evcnt , 45.Nm mca_conf_read , 46.Nm mca_conf_write 47.Nd MicroChannel Architecture bus 48.Sh SYNOPSIS 49.Fd #include \*[Lt]machine/bus.h\*[Gt] 50.Fd #include \*[Lt]dev/mca/mcavar.h\*[Gt] 51.Fd #include \*[Lt]dev/mca/mcadevs.h\*[Gt] 52.Ft void * 53.Fn mca_intr_establish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" \ 54"int level" "int (*handler)(void *)" "void *arg" 55.Ft void 56.Fn mca_intr_disestablish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 57.Ft const struct evcnt * 58.Fn mca_intr_evcnt "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 59.Ft int 60.Fn mca_conf_read "mca_chipset_tag_t mc" "int slot" "int reg" 61.Ft void 62.Fn mca_conf_write "mca_chipset_tag_t mc" "int slot" "int reg" \ 63"int data" 64.Sh DESCRIPTION 65The 66.Nm 67device provides support for IBM's MicroChannel Architecture bus found 68on IBM PS/2 systems and selected workstations. 69It was designed as a replacement bus for the ISA bus found on IBM's 70older machines. 71However, the bus specifications were only available under license, so 72MCA did not achieve widespread acceptance in the industry. 73.Pp 74Being a replacement for the ISA bus, the MCA bus does share some 75similar aspects with the ISA bus. 76Some MCA devices can be detected via the usual ISA-style probing. 77However, most device detection is done through the Programmable Option 78Select (POS) registers. 79These registers provide a window into a device to determine device-specific 80properties and configuration. 81The configuration of devices and their POS registers is performed using 82IBM's system configuration software. 83.Pp 84The MCA bus uses level-triggered interrupts while the ISA bus uses 85edge-triggered interrupts. 86Level triggered interrupts have the advantage that they can be shared 87among multiple device. 88Therefore, most MCA-specific devices should be coded with shared 89interrupts in mind. 90.Sh DATA TYPES 91Drivers for devices attached to the MCA bus will make use of the 92following data types: 93.Bl -tag -width compact 94.It Fa mca_chipset_tag_t 95Chipset tag for the MCA bus. 96.It Fa mca_intr_handle_t 97The opaque handle describing an established interrupt handler. 98.It Fa struct mca_attach_args 99A structure use to inform the driver of MCA bus properties. 100It contains the following members: 101.Bd -literal 102 bus_space_tag_t ma_iot; /* MCA I/O space tag */ 103 bus_space_tag_t ma_memt; /* MCA mem space tag */ 104 bus_dma_tag_t ma_dmat; /* MCA DMA tag */ 105 int ma_slot; /* MCA slot number */ 106 int ma_pos[8]; /* MCA POS values */ 107 int ma_id; /* MCA device */ 108.Ed 109.El 110.Sh FUNCTIONS 111.Bl -tag -width compact 112.It Fn mca_intr_establish "mc" "hdl" "level" "handler" "arg" 113Establish a MCA interrupt handler on the MCA bus specified by 114.Fa mc 115for the interrupt described completely by 116.Fa hdl . 117The priority of the interrupt is specified by 118.Fa level . 119When the interrupt occurs the function 120.Fa handler 121is called with argument 122.Fa arg . 123.It Fn mca_intr_disestablish "mc" "hdl" 124Dis-establish the interrupt handler on the MCA bus specified by 125.Fa mc 126for the interrupt described completely 127.Fa hdl . 128.It Fn mca_intr_evcnt "mc" "hdl" 129Do interrupt event counting on the MCA bus specified by 130.Fa mc 131for the event described completely by 132.Fa hdl . 133.It Fn mca_conf_read "mc" "slot" "reg" 134Read the POS register 135.Fa reg 136for the device in slot 137.Fa slot 138on the MCA bus specified by 139.Fa mc . 140.It Fn mca_conf_write "mc" "slot" "reg" "data" 141Write data 142.Fa data 143to the POS register 144.Fa reg 145for the device in slot 146.Fa slot 147on the MCA bus specified by 148.Fa mc . 149.El 150.Sh AUTOCONFIGURATION 151The MCA bus is a direct-connection bus. 152During autoconfiguration, the parent specifies the MCA device ID for the 153found device in the 154.Fa ma_id 155member of the 156.Em mca_attach_args 157structure. 158Drivers should match on the device ID. 159Device capabilities and configuration information should be read from 160device POS registers using 161.Fn mca_conf_read . 162Some important configuration information found in the POS registers 163include the I/O base address, memory base address and interrupt 164number. 165The location of these configurable options with the POS registers are 166device specific. 167.Sh DMA SUPPORT 168The MCA bus supports 32-bit, bidirectional DMA transfers. 169Currently, no machine-independent support for MCA DMA is available. 170.Sh CODE REFERENCES 171This section describes places within the 172.Nx 173source tree where actual code implementing or utilising the 174machine-independent MCA subsystem can be found. 175All pathnames are relative to 176.Pa /usr/src . 177.Pp 178The MCA subsystem itself is implemented within the file 179.Pa sys/dev/mca/mca_subr.c . 180Machine-dependent portions can be found in 181.Pa sys/arch/\*[Lt]arch\*[Gt]/mca/mca_machdep.c . 182The database of known devices exists within the file 183.Fa sys/dev/mca/mcadevs_data.h 184and is generated automatically from the file 185.Pa sys/dev/mca/mcadevs . 186New vendor and product identifiers should be added to this file. 187The database can be regenerated using the Makefile 188.Pa sys/dev/mca/Makefile.mcadevs . 189.Pp 190A good source of information about MCA devices is IBM's system 191configuration disk. 192The disk contains .adf files which describe the location of device 193configuration options in the POS registers. 194.Sh SEE ALSO 195.Xr mca 4 , 196.Xr autoconf 9 , 197.Xr bus_dma 9 , 198.Xr bus_space 9 , 199.Xr driver 9 , 200.Xr isa 9 201.Sh BUGS 202The machine-independent 203.Nm 204driver does not currently support DMA. 205MCA devices which require DMA operation currently access the DMA 206capabilities directly. 207