1.\" $NetBSD: tc.9,v 1.5 2002/02/13 08:18:52 ross Exp $ 2.\" 3.\" Copyright (c) 2001 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Gregory McGarry. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 3. All advertising materials mentioning features or use of this software 18.\" must display the following acknowledgement: 19.\" This product includes software developed by the NetBSD 20.\" Foundation, Inc. and its contributors. 21.\" 4. Neither the name of The NetBSD Foundation nor the names of its 22.\" contributors may be used to endorse or promote products derived 23.\" from this software without specific prior written permission. 24.\" 25.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35.\" POSSIBILITY OF SUCH DAMAGE. 36.\" 37.Dd October 7, 2001 38.Dt TC 9 39.Os 40.Sh NAME 41.Nm TC , 42.Nm tc_intr_establish , 43.Nm tc_intr_disestablish , 44.Nm tc_intr_evcnt . 45.Nm tc_mb , 46.Nm tc_wmb , 47.Nm tc_syncbus , 48.Nm tc_badaddr , 49.Nm TC_DENSE_TO_SPARSE , 50.Nm TC_PHYS_TO_UNCACHED 51.Nd TURBOchannel bus 52.Sh SYNOPSIS 53.Fd #include \*[Lt]machine/bus.h\*[Gt] 54.Fd #include \*[Lt]dev/tc/tcvar.h\*[Gt] 55.Fd #include \*[Lt]dev/tc/tcdevs.h\*[Gt] 56.Ft void 57.Fn tc_intr_establish "struct device *dev" "void *cookie" \ 58"int level" "int (*handler)(void *)" "void *arg" 59.Ft void 60.Fn tc_intr_disestablish "struct device *dev" "void *cookie" 61.Ft const struct evcnt * 62.Fn tc_intr_evcnt "struct device *dev" "void *cookie" 63.Ft void 64.Fn tc_mb "" 65.Ft void 66.Fn tc_wmb "" 67.Ft void 68.Fn tc_syncbus "" 69.Ft int 70.Fn tc_badaddr "tc_addr_t tcaddr" 71.Ft tc_addr_t 72.Fn TC_DENSE_TO_SPARSE "tc_addr_t addr" 73.Ft tc_addr_t 74.Fn TC_PHYS_TO_UNCACHED "tc_addr_t addr" 75.Sh DESCRIPTION 76The 77.Nm 78device provides support for the DEC TURBOchannel bus found on all DEC 79TURBOchannel machines with MIPS (DECstation 5000 series, excluding the 805000/200) and Alpha (3000-series) systems. TURBOchannel is a 32-bit 81wide synchronous DMA-capable bus, running at 25 MHz on higher-end 82machines and at 12.5 MHz on lower-end machines. 83.Sh DATA TYPES 84Drivers for devices attached to the TURBOchannel bus will make use of 85the following data types: 86.Bl -tag -width compact 87.It Fa struct tc_attach_args 88A structure use to inform the driver of TURBOchannel bus properties. 89It contains the following members: 90.Bd -literal 91 bus_space_tag_t ta_memt; 92 bus_dma_tag_t ta_dmat; 93 char ta_modname[TC_ROM_LLEN+1]; 94 u_int ta_slot; 95 tc_offset_t ta_offset; 96 tc_addr_t ta_addr; 97 void *ta_cookie; 98 u_int ta_busspeed; 99.Ed 100.Pp 101The 102.Em ta_busspeed 103member specifies the TURBOchannel bus speed and is useful for 104time-related functions. Values values are 105.Em TC_SPEED_12_5_MHZ 106for the 12.5 MHz bus and 107.Em TC_SPEED_25_MHZ 108for the 50 MHz bus. 109.El 110.Sh FUNCTIONS 111.Bl -tag -width compact 112.It Fn tc_intr_establish "dev" "cookie" "level" "handler" "arg" 113Establish an interrupt handler with device 114.Fa dev 115for the interrupt described completely by 116.Fa cookie , 117the value passed to the driver in the 118.Em ta_cookie 119member of the 120.Em tc_attach_args 121structure. 122The priority of the interrupt is specified by 123.Fa level . 124When the interrupt occurs the function 125.Fa handler 126is called with argument 127.Fa arg . 128.It Fn tc_intr_disestablish "dev" "cookie" 129Dis-establish the interrupt handler with device 130.Fa dev 131for the interrupt described completely 132.Fa cookie . 133.It Fn tc_intr_evcnt "dev" "cookie" 134Do interrupt event counting with device 135.Fa dev 136for the event described completely by 137.Fa cookie . 138.It Fn tc_mb "" 139A read/write memory barrier. Any CPU-to-memory reads/writes before 140the barrier must complete before any CPU-to-memory reads/writes after 141it. 142.It Fn tc_wmb "" 143A write memory barrier. Any CPU-to-memory writes before before the 144barrier must complete before any CPU-to-memory writes after it. 145.It Fn tc_syncbus "" 146Synchronise writes on the TURBOchannel bus by ensuring CPU writes are 147propagated across the TURBOchannel bus. 148.It Fn tc_badaddr "tcaddr" 149Returns non-zero if the given address 150.Fa tcaddr 151is invalid. 152.It Fn TC_DENSE_TO_SPARSE "addr" 153Convert the given physical address 154.Fa addr 155in TURBOchannel dense space to the corresponding address in 156TURBOchannel sparse space. 157.It Fn TC_PHYS_TO_UNCACHED "addr" 158Convert the given system memory physical address 159.Fa addr 160to the physical address of the corresponding region that is not 161cached. 162.El 163.Sh AUTOCONFIGURATION 164The TURBOchannel bus is a direct-connection bus. During 165autoconfiguration, the parent specifies the name of the found 166TURBOchannel module into the 167.Fa ta_modname 168member of the 169.Em tc_attach_args 170structure. Drivers should match on this name. 171.Sh DMA SUPPORT 172The TURBOchannel bus supports 32-bit, bidirectional DMA transfers. 173Support is provided by the standard 174.Xr bus_dma 9 175interface. 176.Sh CODE REFERENCES 177This section describes places within the 178.Nx 179source tree where actual code implementing or utilising the 180machine-independent TURBOchannel subsystem can be found. All pathnames are 181relative to 182.Pa /usr/src . 183.Pp 184The TURBOchannel subsystem itself is implemented within the file 185.Pa sys/dev/tc/tc_subr.c . 186Machine-dependent portions can be found in 187.Pa sys/arch/\*[Lt]arch\*[Gt]/tc/tcbus.c . 188.Sh SEE ALSO 189.Xr tc 4 , 190.Xr autoconf 9 , 191.Xr bus_dma 9 , 192.Xr bus_space 9 , 193.Xr driver 9 194