xref: /netbsd/sys/arch/acorn32/podulebus/icside.c (revision 753f02d2)
1*753f02d2Sandvar /*	$NetBSD: icside.c,v 1.35 2022/04/04 19:33:44 andvar Exp $	*/
27d4a1addSreinoud 
37d4a1addSreinoud /*
47d4a1addSreinoud  * Copyright (c) 1997-1998 Mark Brinicombe
57d4a1addSreinoud  * Copyright (c) 1997-1998 Causality Limited
67d4a1addSreinoud  *
77d4a1addSreinoud  * Redistribution and use in source and binary forms, with or without
87d4a1addSreinoud  * modification, are permitted provided that the following conditions
97d4a1addSreinoud  * are met:
107d4a1addSreinoud  * 1. Redistributions of source code must retain the above copyright
117d4a1addSreinoud  *    notice, this list of conditions and the following disclaimer.
127d4a1addSreinoud  * 2. Redistributions in binary form must reproduce the above copyright
137d4a1addSreinoud  *    notice, this list of conditions and the following disclaimer in the
147d4a1addSreinoud  *    documentation and/or other materials provided with the distribution.
157d4a1addSreinoud  * 3. All advertising materials mentioning features or use of this software
167d4a1addSreinoud  *    must display the following acknowledgement:
177d4a1addSreinoud  *	This product includes software developed by Mark Brinicombe
187d4a1addSreinoud  *	for the NetBSD Project.
197d4a1addSreinoud  * 4. The name of the author may not be used to endorse or promote products
207d4a1addSreinoud  *    derived from this software without specific prior written permission.
217d4a1addSreinoud  *
227d4a1addSreinoud  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
237d4a1addSreinoud  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
247d4a1addSreinoud  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
257d4a1addSreinoud  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
267d4a1addSreinoud  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
277d4a1addSreinoud  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
287d4a1addSreinoud  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
297d4a1addSreinoud  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
307d4a1addSreinoud  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
317d4a1addSreinoud  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
327d4a1addSreinoud  *
337d4a1addSreinoud  * Probe and attach functions to use generic IDE driver for the ICS IDE podule
347d4a1addSreinoud  */
357d4a1addSreinoud 
367d4a1addSreinoud /*
377d4a1addSreinoud  * Thanks to David Baildon for loaning an IDE card for the development
387d4a1addSreinoud  * of this driver.
397d4a1addSreinoud  * Thanks to Ian Copestake and David Baildon for providing register mapping
407d4a1addSreinoud  * information
417d4a1addSreinoud  */
427d4a1addSreinoud 
437d4a1addSreinoud #include <sys/param.h>
44325b2641Sbjh21 
45*753f02d2Sandvar __KERNEL_RCSID(0, "$NetBSD: icside.c,v 1.35 2022/04/04 19:33:44 andvar Exp $");
46325b2641Sbjh21 
477d4a1addSreinoud #include <sys/systm.h>
487d4a1addSreinoud #include <sys/conf.h>
497d4a1addSreinoud #include <sys/device.h>
507d4a1addSreinoud #include <sys/malloc.h>
519b9f7b17Sdyoung #include <sys/bus.h>
527d4a1addSreinoud 
53ce1401feSthorpej #include <machine/intr.h>
547d4a1addSreinoud #include <machine/io.h>
557d4a1addSreinoud #include <acorn32/podulebus/podulebus.h>
567d4a1addSreinoud #include <acorn32/podulebus/icsidereg.h>
577d4a1addSreinoud 
587d4a1addSreinoud #include <dev/ata/atavar.h>
59870dad0fSbjh21 #include <dev/ic/wdcreg.h>
607d4a1addSreinoud #include <dev/ic/wdcvar.h>
617d4a1addSreinoud #include <dev/podulebus/podules.h>
627d4a1addSreinoud 
637d4a1addSreinoud /*
647d4a1addSreinoud  * ICS IDE podule device.
657d4a1addSreinoud  *
667d4a1addSreinoud  * This probes and attaches the top level ICS IDE device to the podulebus.
677d4a1addSreinoud  * It then configures any children of the ICS IDE device.
687d4a1addSreinoud  * The child is expected to be a wdc device using icside attachments.
697d4a1addSreinoud  */
707d4a1addSreinoud 
717d4a1addSreinoud /*
727d4a1addSreinoud  * ICS IDE card softc structure.
737d4a1addSreinoud  *
747d4a1addSreinoud  * Contains the device node and podule information.
757d4a1addSreinoud  */
767d4a1addSreinoud 
777d4a1addSreinoud struct icside_softc {
787d4a1addSreinoud 	struct wdc_softc	sc_wdcdev;	/* common wdc definitions */
797d4a1addSreinoud 	podule_t 		*sc_podule;		/* Our podule */
807d4a1addSreinoud 	int 			sc_podule_number;	/* Our podule number */
817d4a1addSreinoud 	struct bus_space 	sc_tag;			/* custom tag */
827d4a1addSreinoud 	struct podule_attach_args *sc_pa;		/* podule info */
839da7134dSbjh21 	bus_space_tag_t		sc_latchiot;	/* EEPROM page latch etc */
849da7134dSbjh21 	bus_space_handle_t	sc_latchioh;
859da7134dSbjh21 	void			*sc_shutdownhook;
864b51cecfSthorpej 	struct ata_channel *sc_chp[ICSIDE_MAX_CHANNELS];
877d4a1addSreinoud 	struct icside_channel {
884b51cecfSthorpej 		struct ata_channel	ic_channel;	/* generic part */
897d4a1addSreinoud 		void			*ic_ih;		/* interrupt handler */
907d4a1addSreinoud 		struct evcnt		ic_intrcnt;	/* interrupt count */
917d4a1addSreinoud 		u_int			ic_irqaddr;	/* interrupt flag */
927d4a1addSreinoud 		u_int			ic_irqmask;	/*  location */
937d4a1addSreinoud 		bus_space_tag_t		ic_irqiot;	/* Bus space tag */
947d4a1addSreinoud 		bus_space_handle_t	ic_irqioh;	/* handle for IRQ */
95166f9fdfSbjh21 	} sc_chan[ICSIDE_MAX_CHANNELS];
964b51cecfSthorpej 	struct wdc_regs sc_wdc_regs[ICSIDE_MAX_CHANNELS];
977d4a1addSreinoud };
987d4a1addSreinoud 
997aa6248cScube int	icside_probe(device_t, cfdata_t, void *);
1007aa6248cScube void	icside_attach(device_t, device_t, void *);
101325b2641Sbjh21 int	icside_intr(void *);
1029da7134dSbjh21 void	icside_v6_shutdown(void *);
1037d4a1addSreinoud 
1047aa6248cScube CFATTACH_DECL_NEW(icside, sizeof(struct icside_softc),
1055a9ddc14Sthorpej     icside_probe, icside_attach, NULL, NULL);
1067d4a1addSreinoud 
1077d4a1addSreinoud /*
1087d4a1addSreinoud  * Define prototypes for custom bus space functions.
1097d4a1addSreinoud  */
1107d4a1addSreinoud 
1117d4a1addSreinoud bs_rm_2_proto(icside);
1127d4a1addSreinoud bs_wm_2_proto(icside);
1137d4a1addSreinoud 
1147d4a1addSreinoud #define MAX_CHANNELS	2
1157d4a1addSreinoud 
1167d4a1addSreinoud /*
1177d4a1addSreinoud  * Define a structure for describing the different card versions
1187d4a1addSreinoud  */
1197d4a1addSreinoud struct ide_version {
1207d4a1addSreinoud 	int		id;		/* IDE card ID */
1217d4a1addSreinoud 	int		modspace;	/* Type of podule space */
1227d4a1addSreinoud 	int		channels;	/* Number of channels */
1237d4a1addSreinoud 	const char	*name;		/* name */
1249da7134dSbjh21 	int		latchreg;	/* EEPROM latch register */
1257d4a1addSreinoud 	int		ideregs[MAX_CHANNELS];	/* IDE registers */
1267d4a1addSreinoud 	int		auxregs[MAX_CHANNELS];	/* AUXSTAT register */
1277d4a1addSreinoud 	int		irqregs[MAX_CHANNELS];	/* IRQ register */
1287d4a1addSreinoud 	int		irqstatregs[MAX_CHANNELS];
129cef90c2dSbjh21 } const ide_versions[] = {
1307d4a1addSreinoud 	/* A3IN - Unsupported */
1317d4a1addSreinoud /*	{ 0,  0, 0, NULL, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } },*/
1327d4a1addSreinoud 	/* A3USER - Unsupported */
1337d4a1addSreinoud /*	{ 1,  0, 0, NULL, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } },*/
1347d4a1addSreinoud 	/* ARCIN V6 - Supported */
1359da7134dSbjh21 	{ 3,  0, 2, "ARCIN V6", V6_ADDRLATCH,
1367d4a1addSreinoud 	  { V6_P_IDE_BASE, V6_S_IDE_BASE },
1377d4a1addSreinoud 	  { V6_P_AUX_BASE, V6_S_AUX_BASE },
1387d4a1addSreinoud 	  { V6_P_IRQ_BASE, V6_S_IRQ_BASE },
1397d4a1addSreinoud 	  { V6_P_IRQSTAT_BASE, V6_S_IRQSTAT_BASE }
1407d4a1addSreinoud 	},
1417d4a1addSreinoud 	/* ARCIN V5 - Supported (ID reg not supported so reads as 15) */
1429da7134dSbjh21 	{ 15,  1, 1, "ARCIN V5", -1,
1439da7134dSbjh21 	  { V5_IDE_BASE, -1 },
1449da7134dSbjh21 	  { V5_AUX_BASE, -1 },
1459da7134dSbjh21 	  { V5_IRQ_BASE, -1 },
1469da7134dSbjh21 	  { V5_IRQSTAT_BASE, -1 }
1477d4a1addSreinoud 	}
1487d4a1addSreinoud };
1497d4a1addSreinoud 
1507d4a1addSreinoud /*
1517d4a1addSreinoud  * Card probe function
1527d4a1addSreinoud  *
1537d4a1addSreinoud  * Just match the manufacturer and podule ID's
1547d4a1addSreinoud  */
1557d4a1addSreinoud 
1567d4a1addSreinoud int
icside_probe(device_t parent,cfdata_t cf,void * aux)1577aa6248cScube icside_probe(device_t parent, cfdata_t cf, void *aux)
1587d4a1addSreinoud {
1597d4a1addSreinoud 	struct podule_attach_args *pa = (void *)aux;
160325b2641Sbjh21 
16120518673Sbjh21 	return (pa->pa_product == PODULE_ICS_IDE);
1627d4a1addSreinoud }
1637d4a1addSreinoud 
1647d4a1addSreinoud /*
1657d4a1addSreinoud  * Card attach function
1667d4a1addSreinoud  *
1677d4a1addSreinoud  * Identify the card version and configure any children.
1687d4a1addSreinoud  */
1697d4a1addSreinoud 
1707d4a1addSreinoud void
icside_attach(device_t parent,device_t self,void * aux)1717aa6248cScube icside_attach(device_t parent, device_t self, void *aux)
1727d4a1addSreinoud {
1737aa6248cScube 	struct icside_softc *sc = device_private(self);
1747d4a1addSreinoud 	struct podule_attach_args *pa = (void *)aux;
1757d4a1addSreinoud 	bus_space_tag_t iot;
1767d4a1addSreinoud 	bus_space_handle_t ioh;
177cef90c2dSbjh21 	const struct ide_version *ide = NULL;
1787d4a1addSreinoud 	u_int iobase;
179870dad0fSbjh21 	int channel, i;
1807d4a1addSreinoud 	struct icside_channel *icp;
1814b51cecfSthorpej 	struct ata_channel *cp;
1824b51cecfSthorpej 	struct wdc_regs *wdr;
1837d4a1addSreinoud 	int loop;
1847d4a1addSreinoud 	int id;
1857d4a1addSreinoud 
1867d4a1addSreinoud 	/* Note the podule number and validate */
1877d4a1addSreinoud 
1887d4a1addSreinoud 	if (pa->pa_podule_number == -1)
1897d4a1addSreinoud 		panic("Podule has disappeared !");
1907d4a1addSreinoud 
1917aa6248cScube 	sc->sc_wdcdev.sc_atac.atac_dev = self;
1927d4a1addSreinoud 	sc->sc_podule_number = pa->pa_podule_number;
1937d4a1addSreinoud 	sc->sc_podule = pa->pa_podule;
1947d4a1addSreinoud 	podules[sc->sc_podule_number].attached = 1;
1957d4a1addSreinoud 
1964b51cecfSthorpej 	sc->sc_wdcdev.regs = sc->sc_wdc_regs;
1974b51cecfSthorpej 
1987d4a1addSreinoud 	/* The ID register if present is always in FAST podule space */
1997d4a1addSreinoud 	iot = pa->pa_iot;
2007d4a1addSreinoud 	if (bus_space_map(iot, pa->pa_podule->fast_base +
2017d4a1addSreinoud 	    ID_REGISTER_OFFSET, ID_REGISTER_SPACE, 0, &ioh)) {
2027aa6248cScube 		aprint_error_dev(self, "cannot map ID register\n");
2037d4a1addSreinoud 		return;
2047d4a1addSreinoud 	}
2057d4a1addSreinoud 
2067d4a1addSreinoud 	for (id = 0, loop = 0; loop < 4; ++loop)
2077d4a1addSreinoud 		id |= (bus_space_read_1(iot, ioh, loop) & 1) << loop;
2087d4a1addSreinoud 
2097d4a1addSreinoud 	/* Do we recognise the ID ? */
2107d4a1addSreinoud 	for (loop = 0; loop < sizeof(ide_versions) / sizeof(struct ide_version);
2117d4a1addSreinoud 	    ++loop) {
2127d4a1addSreinoud 		if (ide_versions[loop].id == id) {
2137d4a1addSreinoud 			ide = &ide_versions[loop];
2147d4a1addSreinoud 			break;
2157d4a1addSreinoud 		}
2167d4a1addSreinoud 	}
2177d4a1addSreinoud 
2187d4a1addSreinoud 	/* Report the version and name */
2197d4a1addSreinoud 	if (ide == NULL || ide->name == NULL) {
2207aa6248cScube 		aprint_error(": rev %d is unsupported\n", id);
2217d4a1addSreinoud 		return;
2227d4a1addSreinoud 	} else
2237aa6248cScube 		aprint_normal(": %s\n", ide->name);
2247d4a1addSreinoud 
2259da7134dSbjh21 	if (ide->latchreg != -1) {
2269da7134dSbjh21 		sc->sc_latchiot = pa->pa_iot;
2279da7134dSbjh21 		if (bus_space_map(iot, pa->pa_podule->fast_base +
2289da7134dSbjh21 			ide->latchreg, 1, 0, &sc->sc_latchioh)) {
2297aa6248cScube 			aprint_error_dev(self,
2307aa6248cScube 			    "cannot map latch register\n");
2319da7134dSbjh21 			return;
2329da7134dSbjh21 		}
2339da7134dSbjh21 		sc->sc_shutdownhook =
2349da7134dSbjh21 		    shutdownhook_establish(icside_v6_shutdown, sc);
2359da7134dSbjh21 	}
2369da7134dSbjh21 
2377d4a1addSreinoud 	/*
2387d4a1addSreinoud 	 * Ok we need our own bus tag as the register spacing
2397d4a1addSreinoud 	 * is not the default.
2407d4a1addSreinoud 	 *
2417d4a1addSreinoud 	 * For the podulebus the bus tag cookie is the shift
2427d4a1addSreinoud 	 * to apply to registers
2437d4a1addSreinoud 	 * So duplicate the bus space tag and change the
2447d4a1addSreinoud 	 * cookie.
2457d4a1addSreinoud 	 *
2467d4a1addSreinoud 	 * Also while we are at it replace the default
247*753f02d2Sandvar 	 * read/write multiple short functions with
2487d4a1addSreinoud 	 * optimised versions
2497d4a1addSreinoud 	 */
2507d4a1addSreinoud 
2517d4a1addSreinoud 	sc->sc_tag = *pa->pa_iot;
2527d4a1addSreinoud 	sc->sc_tag.bs_cookie = (void *) REGISTER_SPACING_SHIFT;
2537d4a1addSreinoud 	sc->sc_tag.bs_rm_2 = icside_bs_rm_2;
2547d4a1addSreinoud 	sc->sc_tag.bs_wm_2 = icside_bs_wm_2;
2557d4a1addSreinoud 
2567d4a1addSreinoud 	/* Initialize wdc struct */
2579cc521a1Sthorpej 	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chp;
2589cc521a1Sthorpej 	sc->sc_wdcdev.sc_atac.atac_nchannels = ide->channels;
2599cc521a1Sthorpej 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
2609cc521a1Sthorpej 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
261aee187e7Sbouyer 	sc->sc_wdcdev.wdc_maxdrives = 2;
2627d4a1addSreinoud 	sc->sc_pa = pa;
2637d4a1addSreinoud 
2647d4a1addSreinoud 	for (channel = 0; channel < ide->channels; ++channel) {
265166f9fdfSbjh21 		icp = &sc->sc_chan[channel];
2669cc521a1Sthorpej 		sc->sc_wdcdev.sc_atac.atac_channels[channel] = &icp->ic_channel;
2674b51cecfSthorpej 		cp = &icp->ic_channel;
2684b51cecfSthorpej 		wdr = &sc->sc_wdc_regs[channel];
2697d4a1addSreinoud 
270a963286fSthorpej 		cp->ch_channel = channel;
2719cc521a1Sthorpej 		cp->ch_atac = &sc->sc_wdcdev.sc_atac;
2724b51cecfSthorpej 		wdr->cmd_iot = &sc->sc_tag;
2734b51cecfSthorpej 		wdr->ctl_iot = &sc->sc_tag;
2747d4a1addSreinoud 		if (ide->modspace)
2757d4a1addSreinoud 			iobase = pa->pa_podule->mod_base;
2767d4a1addSreinoud 		else
2777d4a1addSreinoud 			iobase = pa->pa_podule->fast_base;
2787d4a1addSreinoud 
2797d4a1addSreinoud 		if (bus_space_map(iot, iobase + ide->ideregs[channel],
2804b51cecfSthorpej 		    IDE_REGISTER_SPACE, 0, &wdr->cmd_baseioh))
2817d4a1addSreinoud 			return;
282d6e10578Sbjh21 		for (i = 0; i < WDC_NREG; i++) {
2834b51cecfSthorpej 			if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
2844b51cecfSthorpej 				i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0)
285870dad0fSbjh21 				return;
286870dad0fSbjh21 		}
2877db1d345Sjdolecek 		wdc_init_shadow_regs(wdr);
2887d4a1addSreinoud 		if (bus_space_map(iot, iobase + ide->auxregs[channel],
2894b51cecfSthorpej 		    AUX_REGISTER_SPACE, 0, &wdr->ctl_ioh))
2907d4a1addSreinoud 			return;
2917d4a1addSreinoud 		icp->ic_irqiot = iot;
2927d4a1addSreinoud 		if (bus_space_map(iot, iobase + ide->irqregs[channel],
2937d4a1addSreinoud 		    IRQ_REGISTER_SPACE, 0, &icp->ic_irqioh))
2947d4a1addSreinoud 			return;
2957d4a1addSreinoud 		/* Disable interrupts */
2967d4a1addSreinoud 		(void)bus_space_read_1(iot, icp->ic_irqioh, 0);
2977d4a1addSreinoud 		pa->pa_podule->irq_addr = iobase + ide->irqstatregs[channel];
2987d4a1addSreinoud 		pa->pa_podule->irq_mask = IRQ_STATUS_REGISTER_MASK;
2997d4a1addSreinoud 		icp->ic_irqaddr = pa->pa_podule->irq_addr;
3007d4a1addSreinoud 		icp->ic_irqmask = pa->pa_podule->irq_mask;
3017d4a1addSreinoud 		evcnt_attach_dynamic(&icp->ic_intrcnt, EVCNT_TYPE_INTR, NULL,
3025bc6477cScegger 		    device_xname(self), "intr");
3037d4a1addSreinoud 		icp->ic_ih = podulebus_irq_establish(pa->pa_ih, IPL_BIO,
3047d4a1addSreinoud 		    icside_intr, icp, &icp->ic_intrcnt);
3057d4a1addSreinoud 		if (icp->ic_ih == NULL) {
3067aa6248cScube 			aprint_error_dev(self, "Cannot claim interrupt %d\n",
3077d4a1addSreinoud 			    pa->pa_podule->interrupt);
3087d4a1addSreinoud 			continue;
3097d4a1addSreinoud 		}
3107d4a1addSreinoud 		/* Enable interrupts */
3117d4a1addSreinoud 		bus_space_write_1(iot, icp->ic_irqioh, 0, 0);
312923e187eSbouyer 		/* Call common attach routines */
313d37f5009She 		wdcattach(cp);
314923e187eSbouyer 
3157d4a1addSreinoud 	}
3167d4a1addSreinoud }
3177d4a1addSreinoud 
3187d4a1addSreinoud /*
3199da7134dSbjh21  * Shutdown handler -- try to restore the card to a state where
3209da7134dSbjh21  * RISC OS will see it.
3219da7134dSbjh21  */
3229da7134dSbjh21 void
icside_v6_shutdown(void * arg)3239da7134dSbjh21 icside_v6_shutdown(void *arg)
3249da7134dSbjh21 {
3259da7134dSbjh21 	struct icside_softc *sc = arg;
3269da7134dSbjh21 
3279da7134dSbjh21 	bus_space_write_1(sc->sc_latchiot, sc->sc_latchioh, 0, 0);
3289da7134dSbjh21 }
3299da7134dSbjh21 
3309da7134dSbjh21 /*
3317d4a1addSreinoud  * Podule interrupt handler
3327d4a1addSreinoud  *
3337d4a1addSreinoud  * If the interrupt was from our card pass it on to the wdc interrupt handler
3347d4a1addSreinoud  */
3357d4a1addSreinoud int
icside_intr(void * arg)336325b2641Sbjh21 icside_intr(void *arg)
3377d4a1addSreinoud {
3387d4a1addSreinoud 	struct icside_channel *icp = arg;
3397d4a1addSreinoud 	volatile u_char *intraddr = (volatile u_char *)icp->ic_irqaddr;
3407d4a1addSreinoud 
3417d4a1addSreinoud 	/* XXX - not bus space yet - should really be handled by podulebus */
3427d4a1addSreinoud 	if ((*intraddr) & icp->ic_irqmask)
3434b51cecfSthorpej 		wdcintr(&icp->ic_channel);
3447d4a1addSreinoud 	return(0);
3457d4a1addSreinoud }
346