1 /* $NetBSD: dec_2100_a50.c,v 1.50 2001/06/19 13:42:11 wiz Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 /* 30 * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center 31 */ 32 33 #include "opt_kgdb.h" 34 35 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 36 37 __KERNEL_RCSID(0, "$NetBSD: dec_2100_a50.c,v 1.50 2001/06/19 13:42:11 wiz Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/termios.h> 43 #include <dev/cons.h> 44 45 #include <machine/rpb.h> 46 #include <machine/alpha.h> 47 #include <machine/autoconf.h> 48 #include <machine/conf.h> 49 #include <machine/bus.h> 50 51 #include <dev/ic/comreg.h> 52 #include <dev/ic/comvar.h> 53 54 #include <dev/isa/isareg.h> 55 #include <dev/isa/isavar.h> 56 #include <dev/ic/i8042reg.h> 57 #include <dev/ic/pckbcvar.h> 58 #include <dev/pci/pcireg.h> 59 #include <dev/pci/pcivar.h> 60 61 #include <alpha/pci/apecsreg.h> 62 #include <alpha/pci/apecsvar.h> 63 #include <machine/logout.h> 64 65 #include <dev/scsipi/scsi_all.h> 66 #include <dev/scsipi/scsipi_all.h> 67 #include <dev/scsipi/scsiconf.h> 68 69 #include "pckbd.h" 70 71 #ifndef CONSPEED 72 #define CONSPEED TTYDEF_SPEED 73 #endif 74 static int comcnrate = CONSPEED; 75 76 void dec_2100_a50_init __P((void)); 77 static void dec_2100_a50_cons_init __P((void)); 78 static void dec_2100_a50_device_register __P((struct device *, void *)); 79 80 static void dec_2100_a50_mcheck_handler 81 __P((unsigned long, struct trapframe *, unsigned long, unsigned long)); 82 83 static void dec_2100_a50_mcheck __P((unsigned long, unsigned long, 84 unsigned long, struct trapframe *)); 85 86 87 #ifdef KGDB 88 #include <machine/db_machdep.h> 89 90 static const char *kgdb_devlist[] = { 91 "com", 92 NULL, 93 }; 94 #endif /* KGDB */ 95 96 const struct alpha_variation_table dec_2100_a50_variations[] = { 97 { SV_ST_AVANTI, "AlphaStation 400 4/233 (\"Avanti\")" }, 98 { SV_ST_MUSTANG2_4_166, "AlphaStation 200 4/166 (\"Mustang II\")" }, 99 { SV_ST_MUSTANG2_4_233, "AlphaStation 200 4/233 (\"Mustang II\")" }, 100 { SV_ST_AVANTI_4_266, "AlphaStation 250 4/266" }, 101 { SV_ST_MUSTANG2_4_100, "AlphaStation 200 4/100 (\"Mustang II\")" }, 102 { SV_ST_AVANTI_4_233, "AlphaStation 255/233" }, 103 { 0, NULL }, 104 }; 105 106 void 107 dec_2100_a50_init() 108 { 109 u_int64_t variation; 110 111 platform.family = "AlphaStation 200/400 (\"Avanti\")"; 112 113 if ((platform.model = alpha_dsr_sysname()) == NULL) { 114 variation = hwrpb->rpb_variation & SV_ST_MASK; 115 if (variation == SV_ST_AVANTI_XXX) { 116 /* XXX apparently the same? */ 117 variation = SV_ST_AVANTI; 118 } 119 if ((platform.model = alpha_variation_name(variation, 120 dec_2100_a50_variations)) == NULL) 121 platform.model = alpha_unknown_sysname(); 122 } 123 124 platform.iobus = "apecs"; 125 platform.cons_init = dec_2100_a50_cons_init; 126 platform.device_register = dec_2100_a50_device_register; 127 platform.mcheck_handler = dec_2100_a50_mcheck_handler; 128 129 } 130 131 static void 132 dec_2100_a50_cons_init() 133 { 134 struct ctb *ctb; 135 struct apecs_config *acp; 136 extern struct apecs_config apecs_configuration; 137 138 acp = &apecs_configuration; 139 apecs_init(acp, 0); 140 141 ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); 142 143 switch (ctb->ctb_term_type) { 144 case CTB_PRINTERPORT: 145 /* serial console ... */ 146 /* XXX */ 147 { 148 /* 149 * Delay to allow PROM putchars to complete. 150 * FIFO depth * character time, 151 * character time = (1000000 / (defaultrate / 10)) 152 */ 153 DELAY(160000000 / comcnrate); 154 155 if(comcnattach(&acp->ac_iot, 0x3f8, comcnrate, 156 COM_FREQ, 157 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) 158 panic("can't init serial console"); 159 160 break; 161 } 162 163 case CTB_GRAPHICS: 164 #if NPCKBD > 0 165 /* display console ... */ 166 /* XXX */ 167 (void) pckbc_cnattach(&acp->ac_iot, IO_KBD, KBCMDP, 168 PCKBC_KBD_SLOT); 169 170 if (CTB_TURBOSLOT_TYPE(ctb->ctb_turboslot) == 171 CTB_TURBOSLOT_TYPE_ISA) 172 isa_display_console(&acp->ac_iot, &acp->ac_memt); 173 else 174 pci_display_console(&acp->ac_iot, &acp->ac_memt, 175 &acp->ac_pc, CTB_TURBOSLOT_BUS(ctb->ctb_turboslot), 176 CTB_TURBOSLOT_SLOT(ctb->ctb_turboslot), 0); 177 #else 178 panic("not configured to use display && keyboard console"); 179 #endif 180 break; 181 182 default: 183 printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); 184 printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); 185 186 panic("consinit: unknown console type %ld\n", 187 ctb->ctb_term_type); 188 } 189 #ifdef KGDB 190 /* Attach the KGDB device. */ 191 alpha_kgdb_init(kgdb_devlist, &acp->ac_iot); 192 #endif /* KGDB */ 193 } 194 195 static void 196 dec_2100_a50_device_register(dev, aux) 197 struct device *dev; 198 void *aux; 199 { 200 static int found, initted, scsiboot, netboot; 201 static struct device *pcidev, *scsidev; 202 struct bootdev_data *b = bootdev_data; 203 struct device *parent = dev->dv_parent; 204 struct cfdata *cf = dev->dv_cfdata; 205 struct cfdriver *cd = cf->cf_driver; 206 207 if (found) 208 return; 209 210 if (!initted) { 211 scsiboot = (strcmp(b->protocol, "SCSI") == 0); 212 netboot = (strcmp(b->protocol, "BOOTP") == 0) || 213 (strcmp(b->protocol, "MOP") == 0); 214 #if 0 215 printf("scsiboot = %d, netboot = %d\n", scsiboot, netboot); 216 #endif 217 initted =1; 218 } 219 220 if (pcidev == NULL) { 221 if (strcmp(cd->cd_name, "pci")) 222 return; 223 else { 224 struct pcibus_attach_args *pba = aux; 225 226 if ((b->slot / 1000) != pba->pba_bus) 227 return; 228 229 pcidev = dev; 230 #if 0 231 printf("\npcidev = %s\n", pcidev->dv_xname); 232 #endif 233 return; 234 } 235 } 236 237 if (scsiboot && (scsidev == NULL)) { 238 if (parent != pcidev) 239 return; 240 else { 241 struct pci_attach_args *pa = aux; 242 243 if ((b->slot % 1000) != pa->pa_device) 244 return; 245 246 /* XXX function? */ 247 248 scsidev = dev; 249 #if 0 250 printf("\nscsidev = %s\n", scsidev->dv_xname); 251 #endif 252 return; 253 } 254 } 255 256 if (scsiboot && 257 (!strcmp(cd->cd_name, "sd") || 258 !strcmp(cd->cd_name, "st") || 259 !strcmp(cd->cd_name, "cd"))) { 260 struct scsipibus_attach_args *sa = aux; 261 262 if (parent->dv_parent != scsidev) 263 return; 264 265 if (b->unit / 100 != sa->sa_periph->periph_target) 266 return; 267 268 /* XXX LUN! */ 269 270 switch (b->boot_dev_type) { 271 case 0: 272 if (strcmp(cd->cd_name, "sd") && 273 strcmp(cd->cd_name, "cd")) 274 return; 275 break; 276 case 1: 277 if (strcmp(cd->cd_name, "st")) 278 return; 279 break; 280 default: 281 return; 282 } 283 284 /* we've found it! */ 285 booted_device = dev; 286 #if 0 287 printf("\nbooted_device = %s\n", booted_device->dv_xname); 288 #endif 289 found = 1; 290 } 291 292 if (netboot) { 293 if (parent != pcidev) 294 return; 295 else { 296 struct pci_attach_args *pa = aux; 297 298 if ((b->slot % 1000) != pa->pa_device) 299 return; 300 301 /* XXX function? */ 302 303 booted_device = dev; 304 #if 0 305 printf("\nbooted_device = %s\n", booted_device->dv_xname); 306 #endif 307 found = 1; 308 return; 309 } 310 } 311 } 312 313 314 static void 315 dec_2100_a50_mcheck(mces, type, logout, framep) 316 unsigned long mces; 317 unsigned long type; 318 unsigned long logout; 319 struct trapframe *framep; 320 { 321 struct mchkinfo *mcp; 322 static const char *fmt1 = " %-25s = 0x%016lx\n"; 323 int i, sysaddr; 324 mc_hdr_avanti *hdr; 325 mc_uc_avanti *ptr; 326 327 /* 328 * If we expected a machine check, just go handle it in common code. 329 */ 330 mcp = &curcpu()->ci_mcinfo; 331 if (mcp->mc_expected) { 332 machine_check(mces, framep, type, logout); 333 return; 334 } 335 336 hdr = (mc_hdr_avanti *) logout; 337 ptr = (mc_uc_avanti *) (logout + sizeof (*hdr)); 338 339 printf(" Processor Machine Check (%lx), Code 0x%lx\n", 340 type, hdr->mcheck_code); 341 printf("CPU state:\n"); 342 /* Print PAL fields */ 343 for (i = 0; i < 32; i += 2) { 344 printf("\tPAL temp[%d-%d]\t\t= 0x%16lx 0x%16lx\n", i, i+1, 345 ptr->paltemp[i], ptr->paltemp[i+1]); 346 } 347 printf(fmt1, "Excepting Instruction Addr", ptr->exc_addr); 348 printf(fmt1, "Summary of arithmetic traps", ptr->exc_sum); 349 printf(fmt1, "Exception mask", ptr->exc_mask); 350 printf(fmt1, "ICCSR", ptr->iccsr); 351 printf(fmt1, "Base address for PALcode", ptr->pal_base); 352 printf(fmt1, "HIER", ptr->hier); 353 printf(fmt1, "HIRR", ptr->hirr); 354 printf(fmt1, "MM_CSR", ptr->mm_csr); 355 printf(fmt1, "DC_STAT", ptr->dc_stat); 356 printf(fmt1, "DC_ADDR", ptr->dc_addr); 357 printf(fmt1, "ABOX_CTL", ptr->abox_ctl); 358 printf(fmt1, "Bus Interface Unit status", ptr->biu_stat); 359 printf(fmt1, "Bus Interface Unit addr", ptr->biu_addr); 360 printf(fmt1, "Bus Interface Unit control", ptr->biu_ctl); 361 printf(fmt1, "Fill Syndrome", ptr->fill_syndrome); 362 printf(fmt1, "Fill Address", ptr->fill_addr); 363 printf(fmt1, "Effective VA", ptr->va); 364 printf(fmt1, "BC_TAG", ptr->bc_tag); 365 366 printf("\nCache and Memory Controller (21071-CA) state:\n"); 367 printf(fmt1, "COMA_GCR", ptr->coma_gcr); 368 printf(fmt1, "COMA_EDSR", ptr->coma_edsr); 369 printf(fmt1, "COMA_TER", ptr->coma_ter); 370 printf(fmt1, "COMA_ELAR", ptr->coma_elar); 371 printf(fmt1, "COMA_EHAR", ptr->coma_ehar); 372 printf(fmt1, "COMA_LDLR", ptr->coma_ldlr); 373 printf(fmt1, "COMA_LDHR", ptr->coma_ldhr); 374 printf(fmt1, "COMA_BASE0", ptr->coma_base0); 375 printf(fmt1, "COMA_BASE1", ptr->coma_base1); 376 printf(fmt1, "COMA_BASE2", ptr->coma_base2); 377 printf(fmt1, "COMA_CNFG0", ptr->coma_cnfg0); 378 printf(fmt1, "COMA_CNFG1", ptr->coma_cnfg1); 379 printf(fmt1, "COMA_CNFG2", ptr->coma_cnfg2); 380 381 printf("\nPCI bridge (21071-DA) state:\n"); 382 383 printf(fmt1, "EPIC Diag. control/status", ptr->epic_dcsr); 384 printf(fmt1, "EPIC_PEAR", ptr->epic_pear); 385 printf(fmt1, "EPIC_SEAR", ptr->epic_sear); 386 printf(fmt1, "EPIC_TBR1", ptr->epic_tbr1); 387 printf(fmt1, "EPIC_TBR2", ptr->epic_tbr2); 388 printf(fmt1, "EPIC_PBR1", ptr->epic_pbr1); 389 printf(fmt1, "EPIC_PBR2", ptr->epic_pbr2); 390 printf(fmt1, "EPIC_PMR1", ptr->epic_pmr1); 391 printf(fmt1, "EPIC_PMR2", ptr->epic_pmr2); 392 printf(fmt1, "EPIC_HARX1", ptr->epic_harx1); 393 printf(fmt1, "EPIC_HARX2", ptr->epic_harx2); 394 printf(fmt1, "EPIC_PMLT", ptr->epic_pmlt); 395 printf(fmt1, "EPIC_TAG0", ptr->epic_tag0); 396 printf(fmt1, "EPIC_TAG1", ptr->epic_tag1); 397 printf(fmt1, "EPIC_TAG2", ptr->epic_tag2); 398 printf(fmt1, "EPIC_TAG3", ptr->epic_tag3); 399 printf(fmt1, "EPIC_TAG4", ptr->epic_tag4); 400 printf(fmt1, "EPIC_TAG5", ptr->epic_tag5); 401 printf(fmt1, "EPIC_TAG6", ptr->epic_tag6); 402 printf(fmt1, "EPIC_TAG7", ptr->epic_tag7); 403 printf(fmt1, "EPIC_DATA0", ptr->epic_data0); 404 printf(fmt1, "EPIC_DATA1", ptr->epic_data1); 405 printf(fmt1, "EPIC_DATA2", ptr->epic_data2); 406 printf(fmt1, "EPIC_DATA3", ptr->epic_data3); 407 printf(fmt1, "EPIC_DATA4", ptr->epic_data4); 408 printf(fmt1, "EPIC_DATA5", ptr->epic_data5); 409 printf(fmt1, "EPIC_DATA6", ptr->epic_data6); 410 printf(fmt1, "EPIC_DATA7", ptr->epic_data7); 411 412 printf("\n"); 413 414 if (type == ALPHA_SYS_MCHECK) { 415 printf("\nPCI bridge fault\n"); 416 switch(hdr->mcheck_code) { 417 case AVANTI_RETRY_TIMEOUT: 418 printf("\tRetry timeout error accessing 0x%08lx.\n", 419 ptr->epic_pear & 0xffffffff); 420 break; 421 422 case AVANTI_DMA_DATA_PARITY: 423 printf("\tDMA data parity error accessing 0x%08lx.\n", 424 ptr->epic_pear & 0xffffffff); 425 break; 426 427 case AVANTI_IO_PARITY: 428 printf("\tI/O parity error at 0x%08lx during PCI cycle 0x%0lx.\n", 429 ptr->epic_pear & 0xffffffff, 430 (ptr->epic_dcsr >> 18) & 0xf); 431 break; 432 433 case AVANTI_TARGET_ABORT: 434 printf("\tPCI target abort at 0x%08lx during PCI cycle 0x%0lx.\n", 435 ptr->epic_pear & 0xffffffff, 436 (ptr->epic_dcsr >> 18) & 0xf); 437 break; 438 439 case AVANTI_NO_DEVICE: 440 printf("\tNo device responded at 0x%08lx during PCI cycle 0x%0lx\n.", 441 ptr->epic_pear & 0xffffffff, 442 (ptr->epic_dcsr >> 18) & 0xf); 443 break; 444 445 case AVANTI_CORRRECTABLE_MEMORY: 446 printf("\tCorrectable memory error reported.\n" 447 "\tWARNING ECC not implemented on this system!\n" 448 "\tError is incorrect.\n"); 449 break; 450 451 case AVANTI_UNCORRECTABLE_PCI_MEMORY: 452 printf("\tUncorrectable memory error at %016lx reported " 453 "during DMA read.\n", 454 (ptr->epic_sear & 0xfffffff0) << 2); 455 break; 456 457 case AVANTI_INVALID_PT_LOOKUP: 458 printf("\tInvalid page table lookup during scatter/gather.\n" ); 459 if (ptr->epic_dcsr & 0xf20) 460 printf("\tAddress lost.\n"); 461 else 462 printf("\tBus address to 0x%08lx, PCI cycle 0x%0lx\n", 463 ptr->epic_pear & 0xffffffff, 464 (ptr->epic_dcsr >> 18) & 0xf); 465 break; 466 467 case AVANTI_MEMORY: 468 printf("\tMemory error at %016lx, ", 469 (ptr->epic_sear & 0xfffffff0) << 2); 470 sysaddr = (ptr->epic_sear & 0xffffffff) >> 21; 471 if (sysaddr >= ((ptr->coma_base0 >> 5) & 0x7ff) && 472 sysaddr < (((ptr->coma_base0 >> 5) & 0x7ff) + 473 (1 << (7 - (ptr->coma_cnfg0 >> 1))))) 474 printf("SIMM bank 0\n"); 475 else if (sysaddr >= ((ptr->coma_base1 >> 5) & 0x7ff) && 476 sysaddr < (((ptr->coma_base1 >> 5) & 0x7ff) + 477 (1 << (7 - (ptr->coma_cnfg1 >> 1))))) 478 printf("SIMM bank 1\n"); 479 else if (sysaddr >= ((ptr->coma_base2 >> 5) & 0x7ff) && 480 sysaddr < (((ptr->coma_base2 >> 5) & 0x7ff) + 481 (1 << (7 - (ptr->coma_cnfg2 >> 1))))) 482 printf("SIMM bank 2\n"); 483 else 484 printf("invalid memory bank?\n"); 485 break; 486 487 case AVANTI_BCACHE_TAG_ADDR_PARITY: 488 printf("\tBcache tag address parity error, caused by "); 489 if (ptr->coma_edsr & 0x20) 490 printf("victim write\n"); 491 else if (ptr->coma_edsr & 0x10) 492 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 493 else 494 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 495 break; 496 497 case AVANTI_BCACHE_TAG_CTRL_PARITY: 498 printf("\tBcache tag control parity error, caused by "); 499 if (ptr->coma_edsr & 0x20) 500 printf("victim write\n"); 501 else if (ptr->coma_edsr & 0x10) 502 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 503 else 504 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 505 break; 506 507 case AVANTI_NONEXISTENT_MEMORY: 508 printf("\tNonexistent memory error, caused by "); 509 if (ptr->coma_edsr & 0x20) 510 printf("victim write\n"); 511 else if (ptr->coma_edsr & 0x10) 512 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 513 else 514 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 515 break; 516 517 case AVANTI_IO_BUS: 518 printf("\tI/O bus error at %08lx during PCI cycle %0lx\n", 519 ptr->epic_pear & 0xffffffff, (ptr->epic_dcsr >> 18) & 0xf); 520 break; 521 522 case AVANTI_BCACHE_TAG_PARITY: 523 printf("\tBcache tag address parity error.\n" 524 "\tcReg_h cycle %0lx, address<7:0> 0x%02lx\n", 525 (ptr->biu_stat >> 4) & 7, 526 ptr->biu_addr & 0xff); 527 break; 528 529 case AVANTI_BCACHE_TAG_CTRL_PARITY2: 530 printf("\tBcache tag control parity error.\n" 531 "\tcReg_h cycle %0lx, address<7:0> 0x%02lx\n", 532 (ptr->biu_stat >> 4) & 7, 533 ptr->biu_addr & 0xff); 534 break; 535 536 } 537 } else { /* ALPHA_PROC_MCHECK */ 538 printf("\nProcessor fault\n"); 539 switch(hdr->mcheck_code) { 540 case AVANTI_HARD_ERROR: 541 printf("\tHard error cycle.\n"); 542 break; 543 544 case AVANTI_CORRECTABLE_ECC: 545 printf("\tCorrectable ECC error.\n" 546 "\tWARNING ECC not implemented on this system!\n" 547 "\tError is incorrect.\n"); 548 break; 549 550 case AVANTI_NONCORRECTABLE_ECC: 551 printf("\tNoncorrectable ECC error.\n" 552 "\tWARNING ECC not implemented on this system!\n" 553 "\tError is incorrect.\n"); 554 break; 555 556 case AVANTI_UNKNOWN_ERROR: 557 printf("\tUnknown error.\n"); 558 break; 559 560 case AVANTI_SOFT_ERROR: 561 printf("\tSoft error cycle.\n"); 562 break; 563 564 case AVANTI_BUGCHECK: 565 printf("\tBugcheck.\n"); 566 break; 567 568 case AVANTI_OS_BUGCHECK: 569 printf("\tOS Bugcheck.\n"); 570 break; 571 572 case AVANTI_DCACHE_FILL_PARITY: 573 printf("\tPrimary Dcache data fill parity error.\n" 574 "\tDcache Quadword %lx, address %08lx\n", 575 (ptr->biu_stat >> 12) & 0x3, 576 (ptr->fill_addr >> 8) & 0x7f); 577 break; 578 579 case AVANTI_ICACHE_FILL_PARITY: 580 printf("\tPrimary Icache data fill parity error.\n" 581 "\tDcache Quadword %lx, address %08lx\n", 582 (ptr->biu_stat >> 12) & 0x3, 583 (ptr->fill_addr >> 8) & 0x7f); 584 break; 585 } 586 } 587 588 /* 589 * Now that we've printed all sorts of useful information 590 * and have decided that we really can't do any more to 591 * respond to the error, go on to the common code for 592 * final disposition. Usually this means that we die. 593 */ 594 /* 595 * XXX: HANDLE PCI ERRORS HERE? 596 */ 597 machine_check(mces, framep, type, logout); 598 } 599 600 static void 601 dec_2100_a50_mcheck_handler(mces, framep, vector, param) 602 unsigned long mces; 603 struct trapframe *framep; 604 unsigned long vector; 605 unsigned long param; 606 { 607 switch (vector) { 608 case ALPHA_SYS_MCHECK: 609 case ALPHA_PROC_MCHECK: 610 dec_2100_a50_mcheck(mces, vector, param, framep); 611 break; 612 default: 613 printf("2100_A50_MCHECK: unknown check vector 0x%lx\n", vector); 614 machine_check(mces, framep, vector, param); 615 break; 616 } 617 } 618