1 /* $NetBSD: dec_2100_a50.c,v 1.54 2002/09/27 15:35:34 provos Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 /* 30 * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center 31 */ 32 33 #include "opt_kgdb.h" 34 35 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 36 37 __KERNEL_RCSID(0, "$NetBSD: dec_2100_a50.c,v 1.54 2002/09/27 15:35:34 provos Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/termios.h> 43 #include <sys/conf.h> 44 #include <dev/cons.h> 45 46 #include <machine/rpb.h> 47 #include <machine/alpha.h> 48 #include <machine/autoconf.h> 49 #include <machine/cpuconf.h> 50 #include <machine/bus.h> 51 52 #include <dev/ic/comreg.h> 53 #include <dev/ic/comvar.h> 54 55 #include <dev/isa/isareg.h> 56 #include <dev/isa/isavar.h> 57 #include <dev/ic/i8042reg.h> 58 #include <dev/ic/pckbcvar.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcivar.h> 61 62 #include <alpha/pci/apecsreg.h> 63 #include <alpha/pci/apecsvar.h> 64 #include <machine/logout.h> 65 66 #include <dev/scsipi/scsi_all.h> 67 #include <dev/scsipi/scsipi_all.h> 68 #include <dev/scsipi/scsiconf.h> 69 70 #include "pckbd.h" 71 72 #ifndef CONSPEED 73 #define CONSPEED TTYDEF_SPEED 74 #endif 75 static int comcnrate = CONSPEED; 76 77 void dec_2100_a50_init __P((void)); 78 static void dec_2100_a50_cons_init __P((void)); 79 static void dec_2100_a50_device_register __P((struct device *, void *)); 80 81 static void dec_2100_a50_mcheck_handler 82 __P((unsigned long, struct trapframe *, unsigned long, unsigned long)); 83 84 static void dec_2100_a50_mcheck __P((unsigned long, unsigned long, 85 unsigned long, struct trapframe *)); 86 87 88 #ifdef KGDB 89 #include <machine/db_machdep.h> 90 91 static const char *kgdb_devlist[] = { 92 "com", 93 NULL, 94 }; 95 #endif /* KGDB */ 96 97 const struct alpha_variation_table dec_2100_a50_variations[] = { 98 { SV_ST_AVANTI, "AlphaStation 400 4/233 (\"Avanti\")" }, 99 { SV_ST_MUSTANG2_4_166, "AlphaStation 200 4/166 (\"Mustang II\")" }, 100 { SV_ST_MUSTANG2_4_233, "AlphaStation 200 4/233 (\"Mustang II\")" }, 101 { SV_ST_AVANTI_4_266, "AlphaStation 250 4/266" }, 102 { SV_ST_MUSTANG2_4_100, "AlphaStation 200 4/100 (\"Mustang II\")" }, 103 { SV_ST_AVANTI_4_233, "AlphaStation 255/233" }, 104 { 0, NULL }, 105 }; 106 107 void 108 dec_2100_a50_init() 109 { 110 u_int64_t variation; 111 112 platform.family = "AlphaStation 200/400 (\"Avanti\")"; 113 114 if ((platform.model = alpha_dsr_sysname()) == NULL) { 115 variation = hwrpb->rpb_variation & SV_ST_MASK; 116 if (variation == SV_ST_AVANTI_XXX) { 117 /* XXX apparently the same? */ 118 variation = SV_ST_AVANTI; 119 } 120 if ((platform.model = alpha_variation_name(variation, 121 dec_2100_a50_variations)) == NULL) 122 platform.model = alpha_unknown_sysname(); 123 } 124 125 platform.iobus = "apecs"; 126 platform.cons_init = dec_2100_a50_cons_init; 127 platform.device_register = dec_2100_a50_device_register; 128 platform.mcheck_handler = dec_2100_a50_mcheck_handler; 129 130 } 131 132 static void 133 dec_2100_a50_cons_init() 134 { 135 struct ctb *ctb; 136 struct apecs_config *acp; 137 extern struct apecs_config apecs_configuration; 138 139 acp = &apecs_configuration; 140 apecs_init(acp, 0); 141 142 ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); 143 144 switch (ctb->ctb_term_type) { 145 case CTB_PRINTERPORT: 146 /* serial console ... */ 147 /* XXX */ 148 { 149 /* 150 * Delay to allow PROM putchars to complete. 151 * FIFO depth * character time, 152 * character time = (1000000 / (defaultrate / 10)) 153 */ 154 DELAY(160000000 / comcnrate); 155 156 if(comcnattach(&acp->ac_iot, 0x3f8, comcnrate, 157 COM_FREQ, 158 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) 159 panic("can't init serial console"); 160 161 break; 162 } 163 164 case CTB_GRAPHICS: 165 #if NPCKBD > 0 166 /* display console ... */ 167 /* XXX */ 168 (void) pckbc_cnattach(&acp->ac_iot, IO_KBD, KBCMDP, 169 PCKBC_KBD_SLOT); 170 171 if (CTB_TURBOSLOT_TYPE(ctb->ctb_turboslot) == 172 CTB_TURBOSLOT_TYPE_ISA) 173 isa_display_console(&acp->ac_iot, &acp->ac_memt); 174 else 175 pci_display_console(&acp->ac_iot, &acp->ac_memt, 176 &acp->ac_pc, CTB_TURBOSLOT_BUS(ctb->ctb_turboslot), 177 CTB_TURBOSLOT_SLOT(ctb->ctb_turboslot), 0); 178 #else 179 panic("not configured to use display && keyboard console"); 180 #endif 181 break; 182 183 default: 184 printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); 185 printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); 186 187 panic("consinit: unknown console type %ld", 188 ctb->ctb_term_type); 189 } 190 #ifdef KGDB 191 /* Attach the KGDB device. */ 192 alpha_kgdb_init(kgdb_devlist, &acp->ac_iot); 193 #endif /* KGDB */ 194 } 195 196 static void 197 dec_2100_a50_device_register(dev, aux) 198 struct device *dev; 199 void *aux; 200 { 201 static int found, initted, scsiboot, netboot; 202 static struct device *pcidev, *scsidev; 203 struct bootdev_data *b = bootdev_data; 204 struct device *parent = dev->dv_parent; 205 struct cfdata *cf = dev->dv_cfdata; 206 const char *name = cf->cf_name; 207 208 if (found) 209 return; 210 211 if (!initted) { 212 scsiboot = (strcmp(b->protocol, "SCSI") == 0); 213 netboot = (strcmp(b->protocol, "BOOTP") == 0) || 214 (strcmp(b->protocol, "MOP") == 0); 215 #if 0 216 printf("scsiboot = %d, netboot = %d\n", scsiboot, netboot); 217 #endif 218 initted =1; 219 } 220 221 if (pcidev == NULL) { 222 if (strcmp(name, "pci")) 223 return; 224 else { 225 struct pcibus_attach_args *pba = aux; 226 227 if ((b->slot / 1000) != pba->pba_bus) 228 return; 229 230 pcidev = dev; 231 #if 0 232 printf("\npcidev = %s\n", pcidev->dv_xname); 233 #endif 234 return; 235 } 236 } 237 238 if (scsiboot && (scsidev == NULL)) { 239 if (parent != pcidev) 240 return; 241 else { 242 struct pci_attach_args *pa = aux; 243 244 if ((b->slot % 1000) != pa->pa_device) 245 return; 246 247 /* XXX function? */ 248 249 scsidev = dev; 250 #if 0 251 printf("\nscsidev = %s\n", scsidev->dv_xname); 252 #endif 253 return; 254 } 255 } 256 257 if (scsiboot && 258 (!strcmp(name, "sd") || 259 !strcmp(name, "st") || 260 !strcmp(name, "cd"))) { 261 struct scsipibus_attach_args *sa = aux; 262 263 if (parent->dv_parent != scsidev) 264 return; 265 266 if (b->unit / 100 != sa->sa_periph->periph_target) 267 return; 268 269 /* XXX LUN! */ 270 271 switch (b->boot_dev_type) { 272 case 0: 273 if (strcmp(name, "sd") && 274 strcmp(name, "cd")) 275 return; 276 break; 277 case 1: 278 if (strcmp(name, "st")) 279 return; 280 break; 281 default: 282 return; 283 } 284 285 /* we've found it! */ 286 booted_device = dev; 287 #if 0 288 printf("\nbooted_device = %s\n", booted_device->dv_xname); 289 #endif 290 found = 1; 291 } 292 293 if (netboot) { 294 if (parent != pcidev) 295 return; 296 else { 297 struct pci_attach_args *pa = aux; 298 299 if ((b->slot % 1000) != pa->pa_device) 300 return; 301 302 /* XXX function? */ 303 304 booted_device = dev; 305 #if 0 306 printf("\nbooted_device = %s\n", booted_device->dv_xname); 307 #endif 308 found = 1; 309 return; 310 } 311 } 312 } 313 314 315 static void 316 dec_2100_a50_mcheck(mces, type, logout, framep) 317 unsigned long mces; 318 unsigned long type; 319 unsigned long logout; 320 struct trapframe *framep; 321 { 322 struct mchkinfo *mcp; 323 static const char *fmt1 = " %-25s = 0x%016lx\n"; 324 int i, sysaddr; 325 mc_hdr_avanti *hdr; 326 mc_uc_avanti *ptr; 327 328 /* 329 * If we expected a machine check, just go handle it in common code. 330 */ 331 mcp = &curcpu()->ci_mcinfo; 332 if (mcp->mc_expected) { 333 machine_check(mces, framep, type, logout); 334 return; 335 } 336 337 hdr = (mc_hdr_avanti *) logout; 338 ptr = (mc_uc_avanti *) (logout + sizeof (*hdr)); 339 340 printf(" Processor Machine Check (%lx), Code 0x%lx\n", 341 type, hdr->mcheck_code); 342 printf("CPU state:\n"); 343 /* Print PAL fields */ 344 for (i = 0; i < 32; i += 2) { 345 printf("\tPAL temp[%d-%d]\t\t= 0x%16lx 0x%16lx\n", i, i+1, 346 ptr->paltemp[i], ptr->paltemp[i+1]); 347 } 348 printf(fmt1, "Excepting Instruction Addr", ptr->exc_addr); 349 printf(fmt1, "Summary of arithmetic traps", ptr->exc_sum); 350 printf(fmt1, "Exception mask", ptr->exc_mask); 351 printf(fmt1, "ICCSR", ptr->iccsr); 352 printf(fmt1, "Base address for PALcode", ptr->pal_base); 353 printf(fmt1, "HIER", ptr->hier); 354 printf(fmt1, "HIRR", ptr->hirr); 355 printf(fmt1, "MM_CSR", ptr->mm_csr); 356 printf(fmt1, "DC_STAT", ptr->dc_stat); 357 printf(fmt1, "DC_ADDR", ptr->dc_addr); 358 printf(fmt1, "ABOX_CTL", ptr->abox_ctl); 359 printf(fmt1, "Bus Interface Unit status", ptr->biu_stat); 360 printf(fmt1, "Bus Interface Unit addr", ptr->biu_addr); 361 printf(fmt1, "Bus Interface Unit control", ptr->biu_ctl); 362 printf(fmt1, "Fill Syndrome", ptr->fill_syndrome); 363 printf(fmt1, "Fill Address", ptr->fill_addr); 364 printf(fmt1, "Effective VA", ptr->va); 365 printf(fmt1, "BC_TAG", ptr->bc_tag); 366 367 printf("\nCache and Memory Controller (21071-CA) state:\n"); 368 printf(fmt1, "COMA_GCR", ptr->coma_gcr); 369 printf(fmt1, "COMA_EDSR", ptr->coma_edsr); 370 printf(fmt1, "COMA_TER", ptr->coma_ter); 371 printf(fmt1, "COMA_ELAR", ptr->coma_elar); 372 printf(fmt1, "COMA_EHAR", ptr->coma_ehar); 373 printf(fmt1, "COMA_LDLR", ptr->coma_ldlr); 374 printf(fmt1, "COMA_LDHR", ptr->coma_ldhr); 375 printf(fmt1, "COMA_BASE0", ptr->coma_base0); 376 printf(fmt1, "COMA_BASE1", ptr->coma_base1); 377 printf(fmt1, "COMA_BASE2", ptr->coma_base2); 378 printf(fmt1, "COMA_CNFG0", ptr->coma_cnfg0); 379 printf(fmt1, "COMA_CNFG1", ptr->coma_cnfg1); 380 printf(fmt1, "COMA_CNFG2", ptr->coma_cnfg2); 381 382 printf("\nPCI bridge (21071-DA) state:\n"); 383 384 printf(fmt1, "EPIC Diag. control/status", ptr->epic_dcsr); 385 printf(fmt1, "EPIC_PEAR", ptr->epic_pear); 386 printf(fmt1, "EPIC_SEAR", ptr->epic_sear); 387 printf(fmt1, "EPIC_TBR1", ptr->epic_tbr1); 388 printf(fmt1, "EPIC_TBR2", ptr->epic_tbr2); 389 printf(fmt1, "EPIC_PBR1", ptr->epic_pbr1); 390 printf(fmt1, "EPIC_PBR2", ptr->epic_pbr2); 391 printf(fmt1, "EPIC_PMR1", ptr->epic_pmr1); 392 printf(fmt1, "EPIC_PMR2", ptr->epic_pmr2); 393 printf(fmt1, "EPIC_HARX1", ptr->epic_harx1); 394 printf(fmt1, "EPIC_HARX2", ptr->epic_harx2); 395 printf(fmt1, "EPIC_PMLT", ptr->epic_pmlt); 396 printf(fmt1, "EPIC_TAG0", ptr->epic_tag0); 397 printf(fmt1, "EPIC_TAG1", ptr->epic_tag1); 398 printf(fmt1, "EPIC_TAG2", ptr->epic_tag2); 399 printf(fmt1, "EPIC_TAG3", ptr->epic_tag3); 400 printf(fmt1, "EPIC_TAG4", ptr->epic_tag4); 401 printf(fmt1, "EPIC_TAG5", ptr->epic_tag5); 402 printf(fmt1, "EPIC_TAG6", ptr->epic_tag6); 403 printf(fmt1, "EPIC_TAG7", ptr->epic_tag7); 404 printf(fmt1, "EPIC_DATA0", ptr->epic_data0); 405 printf(fmt1, "EPIC_DATA1", ptr->epic_data1); 406 printf(fmt1, "EPIC_DATA2", ptr->epic_data2); 407 printf(fmt1, "EPIC_DATA3", ptr->epic_data3); 408 printf(fmt1, "EPIC_DATA4", ptr->epic_data4); 409 printf(fmt1, "EPIC_DATA5", ptr->epic_data5); 410 printf(fmt1, "EPIC_DATA6", ptr->epic_data6); 411 printf(fmt1, "EPIC_DATA7", ptr->epic_data7); 412 413 printf("\n"); 414 415 if (type == ALPHA_SYS_MCHECK) { 416 printf("\nPCI bridge fault\n"); 417 switch(hdr->mcheck_code) { 418 case AVANTI_RETRY_TIMEOUT: 419 printf("\tRetry timeout error accessing 0x%08lx.\n", 420 ptr->epic_pear & 0xffffffff); 421 break; 422 423 case AVANTI_DMA_DATA_PARITY: 424 printf("\tDMA data parity error accessing 0x%08lx.\n", 425 ptr->epic_pear & 0xffffffff); 426 break; 427 428 case AVANTI_IO_PARITY: 429 printf("\tI/O parity error at 0x%08lx during PCI cycle 0x%0lx.\n", 430 ptr->epic_pear & 0xffffffff, 431 (ptr->epic_dcsr >> 18) & 0xf); 432 break; 433 434 case AVANTI_TARGET_ABORT: 435 printf("\tPCI target abort at 0x%08lx during PCI cycle 0x%0lx.\n", 436 ptr->epic_pear & 0xffffffff, 437 (ptr->epic_dcsr >> 18) & 0xf); 438 break; 439 440 case AVANTI_NO_DEVICE: 441 printf("\tNo device responded at 0x%08lx during PCI cycle 0x%0lx\n.", 442 ptr->epic_pear & 0xffffffff, 443 (ptr->epic_dcsr >> 18) & 0xf); 444 break; 445 446 case AVANTI_CORRRECTABLE_MEMORY: 447 printf("\tCorrectable memory error reported.\n" 448 "\tWARNING ECC not implemented on this system!\n" 449 "\tError is incorrect.\n"); 450 break; 451 452 case AVANTI_UNCORRECTABLE_PCI_MEMORY: 453 printf("\tUncorrectable memory error at %016lx reported " 454 "during DMA read.\n", 455 (ptr->epic_sear & 0xfffffff0) << 2); 456 break; 457 458 case AVANTI_INVALID_PT_LOOKUP: 459 printf("\tInvalid page table lookup during scatter/gather.\n" ); 460 if (ptr->epic_dcsr & 0xf20) 461 printf("\tAddress lost.\n"); 462 else 463 printf("\tBus address to 0x%08lx, PCI cycle 0x%0lx\n", 464 ptr->epic_pear & 0xffffffff, 465 (ptr->epic_dcsr >> 18) & 0xf); 466 break; 467 468 case AVANTI_MEMORY: 469 printf("\tMemory error at %016lx, ", 470 (ptr->epic_sear & 0xfffffff0) << 2); 471 sysaddr = (ptr->epic_sear & 0xffffffff) >> 21; 472 if (sysaddr >= ((ptr->coma_base0 >> 5) & 0x7ff) && 473 sysaddr < (((ptr->coma_base0 >> 5) & 0x7ff) + 474 (1 << (7 - (ptr->coma_cnfg0 >> 1))))) 475 printf("SIMM bank 0\n"); 476 else if (sysaddr >= ((ptr->coma_base1 >> 5) & 0x7ff) && 477 sysaddr < (((ptr->coma_base1 >> 5) & 0x7ff) + 478 (1 << (7 - (ptr->coma_cnfg1 >> 1))))) 479 printf("SIMM bank 1\n"); 480 else if (sysaddr >= ((ptr->coma_base2 >> 5) & 0x7ff) && 481 sysaddr < (((ptr->coma_base2 >> 5) & 0x7ff) + 482 (1 << (7 - (ptr->coma_cnfg2 >> 1))))) 483 printf("SIMM bank 2\n"); 484 else 485 printf("invalid memory bank?\n"); 486 break; 487 488 case AVANTI_BCACHE_TAG_ADDR_PARITY: 489 printf("\tBcache tag address parity error, caused by "); 490 if (ptr->coma_edsr & 0x20) 491 printf("victim write\n"); 492 else if (ptr->coma_edsr & 0x10) 493 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 494 else 495 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 496 break; 497 498 case AVANTI_BCACHE_TAG_CTRL_PARITY: 499 printf("\tBcache tag control parity error, caused by "); 500 if (ptr->coma_edsr & 0x20) 501 printf("victim write\n"); 502 else if (ptr->coma_edsr & 0x10) 503 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 504 else 505 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 506 break; 507 508 case AVANTI_NONEXISTENT_MEMORY: 509 printf("\tNonexistent memory error, caused by "); 510 if (ptr->coma_edsr & 0x20) 511 printf("victim write\n"); 512 else if (ptr->coma_edsr & 0x10) 513 printf("DMA. ioCmd<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 514 else 515 printf("CPU. cpuCReq<2:0> = %0lx\n", (ptr->coma_edsr >> 6) & 7); 516 break; 517 518 case AVANTI_IO_BUS: 519 printf("\tI/O bus error at %08lx during PCI cycle %0lx\n", 520 ptr->epic_pear & 0xffffffff, (ptr->epic_dcsr >> 18) & 0xf); 521 break; 522 523 case AVANTI_BCACHE_TAG_PARITY: 524 printf("\tBcache tag address parity error.\n" 525 "\tcReg_h cycle %0lx, address<7:0> 0x%02lx\n", 526 (ptr->biu_stat >> 4) & 7, 527 ptr->biu_addr & 0xff); 528 break; 529 530 case AVANTI_BCACHE_TAG_CTRL_PARITY2: 531 printf("\tBcache tag control parity error.\n" 532 "\tcReg_h cycle %0lx, address<7:0> 0x%02lx\n", 533 (ptr->biu_stat >> 4) & 7, 534 ptr->biu_addr & 0xff); 535 break; 536 537 } 538 } else { /* ALPHA_PROC_MCHECK */ 539 printf("\nProcessor fault\n"); 540 switch(hdr->mcheck_code) { 541 case AVANTI_HARD_ERROR: 542 printf("\tHard error cycle.\n"); 543 break; 544 545 case AVANTI_CORRECTABLE_ECC: 546 printf("\tCorrectable ECC error.\n" 547 "\tWARNING ECC not implemented on this system!\n" 548 "\tError is incorrect.\n"); 549 break; 550 551 case AVANTI_NONCORRECTABLE_ECC: 552 printf("\tNoncorrectable ECC error.\n" 553 "\tWARNING ECC not implemented on this system!\n" 554 "\tError is incorrect.\n"); 555 break; 556 557 case AVANTI_UNKNOWN_ERROR: 558 printf("\tUnknown error.\n"); 559 break; 560 561 case AVANTI_SOFT_ERROR: 562 printf("\tSoft error cycle.\n"); 563 break; 564 565 case AVANTI_BUGCHECK: 566 printf("\tBugcheck.\n"); 567 break; 568 569 case AVANTI_OS_BUGCHECK: 570 printf("\tOS Bugcheck.\n"); 571 break; 572 573 case AVANTI_DCACHE_FILL_PARITY: 574 printf("\tPrimary Dcache data fill parity error.\n" 575 "\tDcache Quadword %lx, address %08lx\n", 576 (ptr->biu_stat >> 12) & 0x3, 577 (ptr->fill_addr >> 8) & 0x7f); 578 break; 579 580 case AVANTI_ICACHE_FILL_PARITY: 581 printf("\tPrimary Icache data fill parity error.\n" 582 "\tDcache Quadword %lx, address %08lx\n", 583 (ptr->biu_stat >> 12) & 0x3, 584 (ptr->fill_addr >> 8) & 0x7f); 585 break; 586 } 587 } 588 589 /* 590 * Now that we've printed all sorts of useful information 591 * and have decided that we really can't do any more to 592 * respond to the error, go on to the common code for 593 * final disposition. Usually this means that we die. 594 */ 595 /* 596 * XXX: HANDLE PCI ERRORS HERE? 597 */ 598 machine_check(mces, framep, type, logout); 599 } 600 601 static void 602 dec_2100_a50_mcheck_handler(mces, framep, vector, param) 603 unsigned long mces; 604 struct trapframe *framep; 605 unsigned long vector; 606 unsigned long param; 607 { 608 switch (vector) { 609 case ALPHA_SYS_MCHECK: 610 case ALPHA_PROC_MCHECK: 611 dec_2100_a50_mcheck(mces, vector, param, framep); 612 break; 613 default: 614 printf("2100_A50_MCHECK: unknown check vector 0x%lx\n", vector); 615 machine_check(mces, framep, vector, param); 616 break; 617 } 618 } 619