xref: /netbsd/sys/arch/alpha/include/cfbreg.h (revision bf9ec67e)
1 /* $NetBSD: cfbreg.h,v 1.2 1997/04/06 08:47:20 cgd Exp $ */
2 
3 /*
4  * Copyright (c) 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 /*
31  * Color Frame Buffer definitions, from:
32  * ``PMAG-BA TURBOchannel Color Frame Buffer Functional Specification
33  * (Revision 1.2)'', availalable via anonymous FTP from gatekeeper.dec.com.
34  *
35  * All definitions are in "dense" TurboChannel space.
36  */
37 
38 /*
39  * Size of the CFB address space.
40  */
41 #define	CFB_SIZE		0x400000
42 
43 /*
44  * Offsets into slot space of each functional unit.
45  */
46 #define	CFB_FB_OFFSET		0x000000	/* Frame buffer */
47 #define	CFB_FB_SIZE		0x100000
48 #define	CFB_RAMDAC_OFFSET	0x200000	/* Bt495 RAMDAC Registers */
49 #define	CFB_RAMDAC_SIZE		0x100000
50 #define	CFB_IREQCTRL_OFFSET	0x300000	/* IReq Control region */
51 #define	CFB_IREQCTRL_SIZE	0x080000
52 
53 /*
54  * Bt459 RAMDAC registers (offsets from CFB_RAMDAC_OFFSET)
55  */
56 #define	CFB_RAMDAC_ADDRLOW	0x0000	/* Address register low byte */
57 #define	CFB_RAMDAC_ADDRHIGH	0x0004	/* Address register high byte */
58 #define	CFB_RAMDAC_REGDATA	0x0008	/* Register addressed by addr reg */
59 #define	CFB_RAMDAC_CMAPDATA	0x000c	/* Colormap loc addressed by addr reg */
60