1 /* $NetBSD: lock.h,v 1.16 2001/12/17 23:34:57 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Machine-dependent spin lock operations. 42 */ 43 44 #ifndef _ALPHA_LOCK_H_ 45 #define _ALPHA_LOCK_H_ 46 47 typedef __volatile int __cpu_simple_lock_t; 48 49 #define __SIMPLELOCK_LOCKED 1 50 #define __SIMPLELOCK_UNLOCKED 0 51 52 static __inline void 53 __cpu_simple_lock_init(__cpu_simple_lock_t *alp) 54 { 55 56 __asm __volatile( 57 "# BEGIN __cpu_simple_lock_init\n" 58 " stl $31, %0 \n" 59 " mb \n" 60 " # END __cpu_simple_lock_init" 61 : "=m" (*alp)); 62 } 63 64 static __inline void 65 __cpu_simple_lock(__cpu_simple_lock_t *alp) 66 { 67 unsigned long t0; 68 69 /* 70 * Note, if we detect that the lock is held when 71 * we do the initial load-locked, we spin using 72 * a non-locked load to save the coherency logic 73 * some work. 74 */ 75 76 __asm __volatile( 77 "# BEGIN __cpu_simple_lock\n" 78 "1: ldl_l %0, %3 \n" 79 " bne %0, 2f \n" 80 " bis $31, %2, %0 \n" 81 " stl_c %0, %1 \n" 82 " beq %0, 3f \n" 83 " mb \n" 84 " br 4f \n" 85 "2: ldl %0, %3 \n" 86 " beq %0, 1b \n" 87 " br 2b \n" 88 "3: br 1b \n" 89 "4: \n" 90 " # END __cpu_simple_lock\n" 91 : "=&r" (t0), "=m" (*alp) 92 : "i" (__SIMPLELOCK_LOCKED), "m" (*alp) 93 : "memory"); 94 } 95 96 static __inline int 97 __cpu_simple_lock_try(__cpu_simple_lock_t *alp) 98 { 99 unsigned long t0, v0; 100 101 __asm __volatile( 102 "# BEGIN __cpu_simple_lock_try\n" 103 "1: ldl_l %0, %4 \n" 104 " bne %0, 2f \n" 105 " bis $31, %3, %0 \n" 106 " stl_c %0, %2 \n" 107 " beq %0, 3f \n" 108 " mb \n" 109 " bis $31, 1, %1 \n" 110 " br 4f \n" 111 "2: bis $31, $31, %1 \n" 112 " br 4f \n" 113 "3: br 1b \n" 114 "4: \n" 115 " # END __cpu_simple_lock_try" 116 : "=&r" (t0), "=r" (v0), "=m" (*alp) 117 : "i" (__SIMPLELOCK_LOCKED), "m" (*alp) 118 : "memory"); 119 120 return (v0 != 0); 121 } 122 123 static __inline void 124 __cpu_simple_unlock(__cpu_simple_lock_t *alp) 125 { 126 127 __asm __volatile( 128 "# BEGIN __cpu_simple_unlock\n" 129 " mb \n" 130 " stl $31, %0 \n" 131 " # END __cpu_simple_unlock" 132 : "=m" (*alp)); 133 } 134 135 #if defined(MULTIPROCESSOR) 136 /* 137 * On the Alpha, interprocessor interrupts come in at device priority 138 * level. This can cause some problems while waiting for r/w spinlocks 139 * from a high'ish priority level: IPIs that come in will not be processed. 140 * This can lead to deadlock. 141 * 142 * This hook allows IPIs to be processed while a spinlock's interlock 143 * is released. 144 */ 145 #define SPINLOCK_SPIN_HOOK \ 146 do { \ 147 struct cpu_info *__ci = curcpu(); \ 148 int __s; \ 149 \ 150 if (__ci->ci_ipis != 0) { \ 151 /* printf("CPU %lu has IPIs pending\n", \ 152 __ci->ci_cpuid); */ \ 153 __s = splipi(); \ 154 alpha_ipi_process(__ci, NULL); \ 155 splx(__s); \ 156 } \ 157 } while (0) 158 #endif /* MULTIPROCESSOR */ 159 160 #endif /* _ALPHA_LOCK_H_ */ 161