xref: /netbsd/sys/arch/alpha/include/logout.h (revision 6550d01e)
1 /* $NetBSD: logout.h,v 1.7 2010/10/07 19:55:02 hans Exp $ */
2 
3 /*
4  * Copyright (c) 1998 by Matthew Jacob
5  * NASA AMES Research Center.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice immediately at the beginning of the file, without modification,
13  *    this list of conditions, and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 
33 /*
34  * Various Alpha OSF/1 PAL Logout error definitions.
35  */
36 
37 /*
38  * Information gathered from: DEC documentation
39  */
40 
41 /*
42  * Avanti (AlphaStation 200 and 400) Specific PALcode Exception Logout
43  * Area Definitions
44  */
45 
46 /*
47  * Avanti Specific common logout frame header.
48  * *Almost* identical to the generic logout header listed in alpha_cpu.h.
49  */
50 
51 typedef struct {
52 	unsigned int	la_frame_size;		/* frame size */
53 	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
54 	unsigned int	la_cpu_offset;		/* offset to CPU area */
55 	unsigned int	la_system_offset;	/* offset to system area */
56 	unsigned long	mcheck_code;		/* machine check code */
57 } mc_hdr_avanti;
58 
59 /* Machine Check Codes */
60 
61 /* SCB 660 Fatal Machine Checks */
62 #define AVANTI_RETRY_TIMEOUT		0x201L
63 #define	AVANTI_DMA_DATA_PARITY		0x202L
64 #define AVANTI_IO_PARITY		0x203L
65 #define AVANTI_TARGET_ABORT		0x204L
66 #define AVANTI_NO_DEVICE		0x205L
67 #define AVANTI_CORRRECTABLE_MEMORY	0x206L	/* Should never occur */
68 #define AVANTI_UNCORRECTABLE_PCI_MEMORY	0x207L
69 #define AVANTI_INVALID_PT_LOOKUP	0x208L
70 #define AVANTI_MEMORY			0x209L
71 #define AVANTI_BCACHE_TAG_ADDR_PARITY	0x20AL
72 #define AVANTI_BCACHE_TAG_CTRL_PARITY	0x20BL
73 #define AVANTI_NONEXISTENT_MEMORY	0x20CL
74 #define AVANTI_IO_BUS			0x20DL
75 #define AVANTI_BCACHE_TAG_PARITY	 0x80L
76 #define AVANTI_BCACHE_TAG_CTRL_PARITY2   0x82L
77 
78 /* SCB 670 Processor Fatal Machine Checks */
79 #define AVANTI_HARD_ERROR		 0x84L
80 #define AVANTI_CORRECTABLE_ECC		 0x86L
81 #define AVANTI_NONCORRECTABLE_ECC	 0x88L
82 #define AVANTI_UNKNOWN_ERROR		 0x8AL
83 #define AVANTI_SOFT_ERROR		 0x8CL
84 #define AVANTI_BUGCHECK		 	 0x8EL
85 #define AVANTI_OS_BUGCHECK		 0x90L
86 #define AVANTI_DCACHE_FILL_PARITY 	 0x92L
87 #define AVANTI_ICACHE_FILL_PARITY	 0x94L
88 
89 typedef struct {
90 	/* Registers from the CPU */
91 	u_int64_t	paltemp[32];	/* PAL TEMP REGS.		*/
92 	u_int64_t	exc_addr;	/* Address of excepting ins.	*/
93 	u_int64_t	exc_sum;	/* Summary of arithmetic traps.	*/
94 	u_int64_t	exc_mask;	/* Exception mask.		*/
95 	u_int64_t	iccsr;
96 	u_int64_t	pal_base;	/* Base address for PALcode.	*/
97 	u_int64_t	hier;
98 	u_int64_t	hirr;
99 	u_int64_t	mm_csr;
100 	u_int64_t	dc_stat;
101 	u_int64_t	dc_addr;
102 	u_int64_t	abox_ctl;
103 	u_int64_t	biu_stat;	/* Bus Interface Unit Status.	*/
104 	u_int64_t	biu_addr;
105 	u_int64_t	biu_ctl;
106 	u_int64_t	fill_syndrome;
107 	u_int64_t	fill_addr;
108 	u_int64_t	va;
109 	u_int64_t	bc_tag;
110 
111 	/* Registers from the cache and memory controller (21071-CA) */
112 	u_int64_t	coma_gcr;	/* Error and Diag. Status.	*/
113 	u_int64_t	coma_edsr;
114 	u_int64_t	coma_ter;
115 	u_int64_t	coma_elar;
116 	u_int64_t	coma_ehar;
117 	u_int64_t	coma_ldlr;
118 	u_int64_t	coma_ldhr;
119 	u_int64_t	coma_base0;
120 	u_int64_t	coma_base1;
121 	u_int64_t	coma_base2;
122 	u_int64_t	coma_cnfg0;
123 	u_int64_t	coma_cnfg1;
124 	u_int64_t	coma_cnfg2;
125 
126 	/* Registers from the PCI bridge (21071-DA) */
127 	u_int64_t	epic_dcsr;	 /* Diag. Control and Status.	*/
128 	u_int64_t	epic_pear;
129 	u_int64_t	epic_sear;
130 	u_int64_t	epic_tbr1;
131 	u_int64_t	epic_tbr2;
132 	u_int64_t	epic_pbr1;
133 	u_int64_t	epic_pbr2;
134 	u_int64_t	epic_pmr1;
135 	u_int64_t	epic_pmr2;
136 	u_int64_t	epic_harx1;
137 	u_int64_t	epic_harx2;
138 	u_int64_t	epic_pmlt;
139 	u_int64_t	epic_tag0;
140 	u_int64_t	epic_tag1;
141 	u_int64_t	epic_tag2;
142 	u_int64_t	epic_tag3;
143 	u_int64_t	epic_tag4;
144 	u_int64_t	epic_tag5;
145 	u_int64_t	epic_tag6;
146 	u_int64_t	epic_tag7;
147 	u_int64_t	epic_data0;
148 	u_int64_t	epic_data1;
149 	u_int64_t	epic_data2;
150 	u_int64_t	epic_data3;
151 	u_int64_t	epic_data4;
152 	u_int64_t	epic_data5;
153 	u_int64_t	epic_data6;
154 	u_int64_t	epic_data7;
155 } mc_uc_avanti;
156 
157 /*
158  * Information gathered from: OSF/1 header files.
159  */
160 
161 
162 /*
163  * EV5 Specific OSF/1 Pal Code Exception Logout Area Definitions
164  * (inspired from OSF/1 Header files).
165  */
166 
167 /*
168  * EV5 Specific common logout frame header.
169  * *Almost* identical to the generic logout header listed in alpha_cpu.h.
170  */
171 
172 typedef struct {
173 	unsigned int	la_frame_size;		/* frame size */
174 	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
175 	unsigned int	la_cpu_offset;		/* offset to CPU area */
176 	unsigned int	la_system_offset;	/* offset to system area */
177 	unsigned long	mcheck_code;		/* machine check code */
178 } mc_hdr_ev5;
179 
180 /* Machine Check Codes */
181 #define	EV5_CORRECTED		0x86L
182 #define	SYSTEM_CORRECTED	0x201L
183 
184 /*
185  * EV5 Specific Machine Check logout frame for uncorrectable errors.
186  * This is used to log uncorrectable errors such as double bit ECC errors.
187  *
188  * This typically resides in the CPU offset area of the logout frame.
189  */
190 
191 typedef struct {
192 	u_int64_t	shadow[8];	/* Shadow reg. 8-14, 25		*/
193 	u_int64_t	paltemp[24];	/* PAL TEMP REGS.		*/
194 	u_int64_t	exc_addr;	/* Address of excepting ins.	*/
195 	u_int64_t	exc_sum;	/* Summary of arithmetic traps.	*/
196 	u_int64_t	exc_mask;	/* Exception mask.		*/
197 	u_int64_t	pal_base;	/* Base address for PALcode.	*/
198 	u_int64_t	isr;		/* Interrupt Status Reg.	*/
199 	u_int64_t	icsr;		/* CURRENT SETUP OF EV5 IBOX	*/
200 	u_int64_t	ic_perr_stat;	/*
201 					 * I-CACHE Reg:
202 					 *	<13> IBOX Timeout
203 					 *	<12> TAG parity
204 					 *	<11> Data parity
205 					 */
206 	u_int64_t	dc_perr_stat;	/* D-CACHE error Reg:
207 					 * Bits set to 1:
208 					 *  <2> Data error in bank 0
209 					 *  <3> Data error in bank 1
210 					 *  <4> Tag error in bank 0
211 					 *  <5> Tag error in bank 1
212 					 */
213 	u_int64_t	va;		/* Effective VA of fault or miss. */
214 	u_int64_t	mm_stat;	/*
215 					 * Holds the reason for D-stream
216 					 * fault or D-cache parity errors
217 					 */
218 	u_int64_t	sc_addr;	/*
219 					 * Address that was being accessed
220 					 * when EV5 detected Secondary cache
221 					 * failure.
222 					 */
223 	u_int64_t	sc_stat;	/*
224 					 * Helps determine if the error was
225 					 * TAG/Data parity(Secondary Cache)
226 					 */
227 	u_int64_t	bc_tag_addr;	/* Contents of EV5 BC_TAG_ADDR	  */
228 	u_int64_t	ei_addr;	/*
229 					 * Physical address of any transfer
230 					 * that is logged in the EV5 EI_STAT
231 					 */
232 	u_int64_t	fill_syndrome;	/* For correcting ECC errors.	  */
233 	u_int64_t	ei_stat;	/*
234 					 * Helps identify reason of any
235 					 * processor uncorrectable error
236 					 * at its external interface.
237 					 */
238 	u_int64_t	ld_lock;	/* Contents of EV5 LD_LOCK register*/
239 } mc_uc_ev5;
240 #define	EV5_IC_PERR_IBOXTMO	0x2000
241 
242 /*
243  * EV5 Specific Machine Check logout frame for correctable errors.
244  *
245  * This is used to log correctable errors such as Single bit ECC errors.
246  */
247 typedef struct {
248 	u_int64_t	ei_addr;	/*
249 					 * Physical address of any transfer
250 					 * that is logged in the EV5 EI_STAT
251 					 */
252 	u_int64_t	fill_syndrome;	/* For correcting ECC errors.	  */
253 	u_int64_t	ei_stat;	/*
254 					 * Helps identify reason of any
255 					 * processor uncorrectable error
256 					 * at its external interface.
257 					 */
258 	u_int64_t	isr;		/* Interrupt Status Reg. 	  */
259 } mc_cc_ev5;
260 
261 
262 #ifdef	_KERNEL
263 extern void ev5_logout_print(mc_hdr_ev5 *, mc_uc_ev5 *);
264 #endif
265 
266 /*
267  * EV6/67 specific Machine Check logout definitions
268  * from DS20E Service Guide, EK-K8F6W-SV. A01
269  */
270 
271 struct ev6_logout_area {
272 	struct alpha_logout_area la;
273 	uint32_t mchk_code;
274 	uint32_t mchk_rev;
275 };
276 
277 struct ev6_logout_proc {
278 	uint64_t i_stat;
279 	uint64_t dc_stat;
280 	uint64_t c_addr;
281 	uint64_t c_syndrome1;
282 	uint64_t c_syndrome0;
283 	uint64_t c_stat;
284 	uint64_t c_sts;
285 	uint64_t mm_stat;
286 	uint64_t exc_addr;
287 	uint64_t ier_cm;
288 	uint64_t isum;
289 	uint64_t _r;
290 	uint64_t pal_base;
291 	uint64_t i_ctl;
292 	uint64_t pctx;
293 };
294 
295 struct ev6_logout_sys {
296 	uint64_t flags;
297 	uint64_t dir;
298 	uint64_t misc;
299 	uint64_t p0_error;
300 	uint64_t p1_error;
301 };
302 
303