1 /* $NetBSD: pcb.h,v 1.8 2001/04/20 00:10:18 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/lock.h> 31 32 #include <machine/frame.h> 33 #include <machine/reg.h> 34 35 #include <machine/alpha_cpu.h> 36 37 /* 38 * PCB: process control block 39 * 40 * In this case, the hardware structure that is the defining element 41 * for a process, and the additional state that must be saved by software 42 * on a context switch. Fields marked [HW] are mandated by hardware; fields 43 * marked [SW] are for the software. 44 * 45 * It's said in the VMS PALcode section of the AARM that the pcb address 46 * passed to the swpctx PALcode call has to be a physical address. Not 47 * knowing this (and trying a virtual) address proved this correct. 48 * So we cache the physical address of the pcb in the md_proc struct. 49 */ 50 struct pcb { 51 struct alpha_pcb pcb_hw; /* PALcode defined */ 52 unsigned long pcb_context[9]; /* s[0-6], ra, ps [SW] */ 53 struct fpreg pcb_fp; /* FP registers [SW] */ 54 unsigned long pcb_onfault; /* for copy faults [SW] */ 55 unsigned long pcb_accessaddr; /* for [fs]uswintr [SW] */ 56 struct cpu_info * __volatile pcb_fpcpu; /* CPU with our FP state[SW] */ 57 struct simplelock pcb_fpcpu_slock; /* simple lock on fpcpu [SW] */ 58 }; 59 60 #if defined(MULTIPROCESSOR) 61 /* 62 * Need to block IPIs while holding the fpcpu_slock. 63 */ 64 #define FPCPU_LOCK(pcb, s) \ 65 do { \ 66 (s) = splhigh(); \ 67 simple_lock(&(pcb)->pcb_fpcpu_slock); \ 68 } while (/*CONSTCOND*/0) 69 70 #define FPCPU_UNLOCK(pcb, s) \ 71 do { \ 72 simple_unlock(&(pcb)->pcb_fpcpu_slock); \ 73 splx((s)); \ 74 } while (/*CONSTCOND*/0) 75 #else 76 #define FPCPU_LOCK(pcb, s) simple_lock(&(pcb)->pcb_fpcpu_slock) 77 #define FPCPU_UNLOCK(pcb, s) simple_unlock(&(pcb)->pcb_fpcpu_slock) 78 #endif /* MULTIPROCESSOR */ 79 80 /* 81 * The pcb is augmented with machine-dependent additional data for 82 * core dumps. For the Alpha, that's a trap frame and the floating 83 * point registers. 84 */ 85 struct md_coredump { 86 struct trapframe md_tf; 87 struct fpreg md_fpstate; 88 }; 89