1 /* $NetBSD: pmap.h,v 1.54 2001/09/10 21:19:09 chris Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center and by Chris G. Demetriou. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1987 Carnegie-Mellon University 42 * Copyright (c) 1991, 1993 43 * The Regents of the University of California. All rights reserved. 44 * 45 * This code is derived from software contributed to Berkeley by 46 * the Systems Programming Group of the University of Utah Computer 47 * Science Department. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. All advertising materials mentioning features or use of this software 58 * must display the following acknowledgement: 59 * This product includes software developed by the University of 60 * California, Berkeley and its contributors. 61 * 4. Neither the name of the University nor the names of its contributors 62 * may be used to endorse or promote products derived from this software 63 * without specific prior written permission. 64 * 65 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 66 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 68 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 71 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 72 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 73 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 74 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 75 * SUCH DAMAGE. 76 * 77 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 78 */ 79 80 #ifndef _PMAP_MACHINE_ 81 #define _PMAP_MACHINE_ 82 83 #if defined(_KERNEL_OPT) 84 #include "opt_multiprocessor.h" 85 #endif 86 87 #include <sys/lock.h> 88 #include <sys/queue.h> 89 90 #include <machine/pte.h> 91 92 /* 93 * Machine-dependent virtual memory state. 94 * 95 * If we ever support processor numbers higher than 63, we'll have to 96 * rethink the CPU mask. 97 * 98 * Note pm_asn and pm_asngen are arrays allocated in pmap_create(). 99 * Their size is based on the PCS count from the HWRPB, and indexed 100 * by processor ID (from `whami'). 101 * 102 * The kernel pmap is a special case; it gets statically-allocated 103 * arrays which hold enough for ALPHA_MAXPROCS. 104 */ 105 struct pmap_asn_info { 106 unsigned int pma_asn; /* address space number */ 107 unsigned long pma_asngen; /* ASN generation number */ 108 }; 109 110 struct pmap { 111 TAILQ_ENTRY(pmap) pm_list; /* list of all pmaps */ 112 pt_entry_t *pm_lev1map; /* level 1 map */ 113 int pm_count; /* pmap reference count */ 114 struct simplelock pm_slock; /* lock on pmap */ 115 struct pmap_statistics pm_stats; /* pmap statistics */ 116 unsigned long pm_cpus; /* mask of CPUs using pmap */ 117 unsigned long pm_needisync; /* mask of CPUs needing isync */ 118 struct pmap_asn_info pm_asni[1]; /* ASN information */ 119 /* variable length */ 120 }; 121 typedef struct pmap *pmap_t; 122 123 /* 124 * Compute the sizeo of a pmap structure. Subtract one because one 125 * ASN info structure is already included in the pmap structure itself. 126 */ 127 #define PMAP_SIZEOF(x) \ 128 (ALIGN(sizeof(struct pmap) + \ 129 (sizeof(struct pmap_asn_info) * ((x) - 1)))) 130 131 #define PMAP_ASN_RESERVED 0 /* reserved for Lev1map users */ 132 133 extern u_long kernel_pmap_store[]; 134 135 /* 136 * For each struct vm_page, there is a list of all currently valid virtual 137 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 138 */ 139 typedef struct pv_entry { 140 struct pv_entry *pv_next; /* next pv_entry on list */ 141 struct pmap *pv_pmap; /* pmap where mapping lies */ 142 vaddr_t pv_va; /* virtual address for mapping */ 143 pt_entry_t *pv_pte; /* PTE that maps the VA */ 144 } *pv_entry_t; 145 146 /* pvh_attrs */ 147 #define PGA_MODIFIED 0x01 /* modified */ 148 #define PGA_REFERENCED 0x02 /* referenced */ 149 150 /* pvh_usage */ 151 #define PGU_NORMAL 0 /* free or normal use */ 152 #define PGU_PVENT 1 /* PV entries */ 153 #define PGU_L1PT 2 /* level 1 page table */ 154 #define PGU_L2PT 3 /* level 2 page table */ 155 #define PGU_L3PT 4 /* level 3 page table */ 156 157 #ifdef _KERNEL 158 159 #ifndef _LKM 160 #include "opt_new_scc_driver.h" 161 #include "opt_dec_3000_300.h" /* XXX */ 162 #include "opt_dec_3000_500.h" /* XXX */ 163 #include "opt_dec_kn8ae.h" /* XXX */ 164 165 #if defined(NEW_SCC_DRIVER) 166 #if defined(DEC_KN8AE) 167 #define _PMAP_MAY_USE_PROM_CONSOLE 168 #endif 169 #else /* ! NEW_SCC_DRIVER */ 170 #if defined(DEC_3000_300) \ 171 || defined(DEC_3000_500) \ 172 || defined(DEC_KN8AE) /* XXX */ 173 #define _PMAP_MAY_USE_PROM_CONSOLE /* XXX */ 174 #endif /* XXX */ 175 #endif /* NEW_SCC_DRIVER */ 176 177 #if defined(MULTIPROCESSOR) 178 struct cpu_info; 179 struct trapframe; 180 181 void pmap_do_reactivate(struct cpu_info *, struct trapframe *); 182 183 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, u_long *); 184 void pmap_tlb_shootnow(u_long); 185 void pmap_do_tlb_shootdown(struct cpu_info *, struct trapframe *); 186 #define PMAP_TLB_SHOOTDOWN_CPUSET_DECL u_long shootset = 0; 187 #define PMAP_TLB_SHOOTDOWN(pm, va, pte) \ 188 pmap_tlb_shootdown((pm), (va), (pte), &shootset) 189 #define PMAP_TLB_SHOOTNOW() \ 190 pmap_tlb_shootnow(shootset) 191 #else 192 #define PMAP_TLB_SHOOTDOWN_CPUSET_DECL /* nothing */ 193 #define PMAP_TLB_SHOOTDOWN(pm, va, pte) /* nothing */ 194 #define PMAP_TLB_SHOOTNOW() /* nothing */ 195 #endif /* MULTIPROCESSOR */ 196 #endif /* _LKM */ 197 198 #define pmap_kernel() ((pmap_t) (&kernel_pmap_store[0])) 199 200 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 201 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 202 203 #define pmap_copy(dp, sp, da, l, sa) /* nothing */ 204 #define pmap_update(pmap) /* nothing (yet) */ 205 206 #define pmap_is_referenced(pg) \ 207 (((pg)->mdpage.pvh_attrs & PGA_REFERENCED) != 0) 208 #define pmap_is_modified(pg) \ 209 (((pg)->mdpage.pvh_attrs & PGA_MODIFIED) != 0) 210 211 extern pt_entry_t *VPT; /* Virtual Page Table */ 212 213 #define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */ 214 #define PMAP_GROWKERNEL /* enable pmap_growkernel() */ 215 216 /* 217 * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. 218 */ 219 #define PMAP_MAP_POOLPAGE(pa) ALPHA_PHYS_TO_K0SEG((pa)) 220 #define PMAP_UNMAP_POOLPAGE(va) ALPHA_K0SEG_TO_PHYS((va)) 221 222 boolean_t pmap_pageidlezero(paddr_t); 223 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) 224 225 paddr_t vtophys(vaddr_t); 226 227 /* Machine-specific functions. */ 228 void pmap_bootstrap(paddr_t ptaddr, u_int maxasn, u_long ncpuids); 229 void pmap_emulate_reference(struct proc *p, vaddr_t v, 230 int user, int write); 231 #ifdef _PMAP_MAY_USE_PROM_CONSOLE 232 int pmap_uses_prom_console(void); 233 #endif 234 235 #define pmap_pte_pa(pte) (PG_PFNUM(*(pte)) << PGSHIFT) 236 #define pmap_pte_prot(pte) (*(pte) & PG_PROT) 237 #define pmap_pte_w(pte) (*(pte) & PG_WIRED) 238 #define pmap_pte_v(pte) (*(pte) & PG_V) 239 #define pmap_pte_pv(pte) (*(pte) & PG_PVLIST) 240 #define pmap_pte_asm(pte) (*(pte) & PG_ASM) 241 #define pmap_pte_exec(pte) (*(pte) & PG_EXEC) 242 243 #define pmap_pte_set_w(pte, v) \ 244 do { \ 245 if (v) \ 246 *(pte) |= PG_WIRED; \ 247 else \ 248 *(pte) &= ~PG_WIRED; \ 249 } while (0) 250 251 #define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte)) 252 253 #define pmap_pte_set_prot(pte, np) \ 254 do { \ 255 *(pte) &= ~PG_PROT; \ 256 *(pte) |= (np); \ 257 } while (0) 258 259 #define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte)) 260 261 static __inline pt_entry_t *pmap_l2pte(pmap_t, vaddr_t, pt_entry_t *); 262 static __inline pt_entry_t *pmap_l3pte(pmap_t, vaddr_t, pt_entry_t *); 263 264 #define pmap_l1pte(pmap, v) \ 265 (&(pmap)->pm_lev1map[l1pte_index((vaddr_t)(v))]) 266 267 static __inline pt_entry_t * 268 pmap_l2pte(pmap, v, l1pte) 269 pmap_t pmap; 270 vaddr_t v; 271 pt_entry_t *l1pte; 272 { 273 pt_entry_t *lev2map; 274 275 if (l1pte == NULL) { 276 l1pte = pmap_l1pte(pmap, v); 277 if (pmap_pte_v(l1pte) == 0) 278 return (NULL); 279 } 280 281 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 282 return (&lev2map[l2pte_index(v)]); 283 } 284 285 static __inline pt_entry_t * 286 pmap_l3pte(pmap, v, l2pte) 287 pmap_t pmap; 288 vaddr_t v; 289 pt_entry_t *l2pte; 290 { 291 pt_entry_t *l1pte, *lev2map, *lev3map; 292 293 if (l2pte == NULL) { 294 l1pte = pmap_l1pte(pmap, v); 295 if (pmap_pte_v(l1pte) == 0) 296 return (NULL); 297 298 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 299 l2pte = &lev2map[l2pte_index(v)]; 300 if (pmap_pte_v(l2pte) == 0) 301 return (NULL); 302 } 303 304 lev3map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l2pte)); 305 return (&lev3map[l3pte_index(v)]); 306 } 307 308 /* 309 * Macros for locking pmap structures. 310 * 311 * Note that we if we access the kernel pmap in interrupt context, it 312 * is only to update statistics. Since stats are updated using atomic 313 * operations, locking the kernel pmap is not necessary. Therefore, 314 * it is not necessary to block interrupts when locking pmap strucutres. 315 */ 316 #define PMAP_LOCK(pmap) simple_lock(&(pmap)->pm_slock) 317 #define PMAP_UNLOCK(pmap) simple_unlock(&(pmap)->pm_slock) 318 319 /* 320 * Macro for processing deferred I-stream synchronization. 321 * 322 * The pmap module may defer syncing the user I-stream until the 323 * return to userspace, since the IMB PALcode op can be quite 324 * expensive. Since user instructions won't be executed until 325 * the return to userspace, this can be deferred until userret(). 326 */ 327 #define PMAP_USERRET(pmap) \ 328 do { \ 329 u_long cpu_mask = (1UL << cpu_number()); \ 330 \ 331 if ((pmap)->pm_needisync & cpu_mask) { \ 332 atomic_clearbits_ulong(&(pmap)->pm_needisync, \ 333 cpu_mask); \ 334 alpha_pal_imb(); \ 335 } \ 336 } while (0) 337 338 #endif /* _KERNEL */ 339 340 #endif /* _PMAP_MACHINE_ */ 341