xref: /netbsd/sys/arch/alpha/include/z8530var.h (revision bf9ec67e)
1 /* $NetBSD: z8530var.h,v 1.5 2000/12/08 09:42:44 nisimura Exp $ */
2 
3 /*
4  * Copyright (c) 1994 Gordon W. Ross
5  * Copyright (c) 1992, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This software was developed by the Computer Systems Engineering group
9  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10  * contributed to Berkeley.
11  *
12  * All advertising materials mentioning features or use of this software
13  * must display the following acknowledgement:
14  *	This product includes software developed by the University of
15  *	California, Lawrence Berkeley Laboratory.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  * 3. All advertising materials mentioning features or use of this software
26  *    must display the following acknowledgement:
27  *	This product includes software developed by the University of
28  *	California, Berkeley and its contributors.
29  * 4. Neither the name of the University nor the names of its contributors
30  *    may be used to endorse or promote products derived from this software
31  *    without specific prior written permission.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43  * SUCH DAMAGE.
44  *
45  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
46  */
47 
48 /*
49  * XXX XXX XXX THIS DOES NOT WORK WITH MULTIPLE ATTACHMENTS!!! XXX XXX XXX
50  */
51 
52 #include <dev/ic/z8530sc.h>
53 
54 struct zsc_softc {
55 	struct	device zsc_dev;		/* required first: base device */
56 	struct	zs_chanstate *zsc_cs[2];	/* channel A and B soft state */
57 	/* Machine-dependent part follows... */
58 	int zsc_addroffset;	/* used as "cookie" to identify scc */
59 	void *zsc_sih;
60 };
61 
62 /*
63  * Functions to read and write individual registers in a channel.
64  * The ZS chip requires a 1.6 uSec. recovery time between accesses,
65  * and the Alpha TC hardware does NOT take care of this for you.
66  * The delay is now handled inside the chip access functions.
67  * These could be inlines, but with the delay, speed is moot.
68  */
69 
70 u_int zs_read_reg(struct zs_chanstate *cs, u_int reg);
71 u_int zs_read_csr(struct zs_chanstate *cs);
72 u_int zs_read_data(struct zs_chanstate *cs);
73 
74 void  zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);
75 void  zs_write_csr(struct zs_chanstate *cs, u_int val);
76 void  zs_write_data(struct zs_chanstate *cs, u_int val);
77 
78 /* Interrupt priority for the SCC chip; needs to match ZSHARD_PRI. */
79 #define splzs()		spltty()
80