1 /* $NetBSD: apecs.c,v 1.39 2002/05/16 01:01:31 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 41 * All rights reserved. 42 * 43 * Author: Chris G. Demetriou 44 * 45 * Permission to use, copy, modify and distribute this software and 46 * its documentation is hereby granted, provided that both the copyright 47 * notice and this permission notice appear in all copies of the 48 * software, derivative works or modified versions, and any portions 49 * thereof, and that both notices appear in supporting documentation. 50 * 51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 * 55 * Carnegie Mellon requests users of this software to return to 56 * 57 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 58 * School of Computer Science 59 * Carnegie Mellon University 60 * Pittsburgh PA 15213-3890 61 * 62 * any improvements or extensions that they make and grant Carnegie the 63 * rights to redistribute these changes. 64 */ 65 66 #include "opt_dec_2100_a50.h" 67 #include "opt_dec_eb64plus.h" 68 #include "opt_dec_1000a.h" 69 #include "opt_dec_1000.h" 70 71 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 72 73 __KERNEL_RCSID(0, "$NetBSD: apecs.c,v 1.39 2002/05/16 01:01:31 thorpej Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/malloc.h> 79 #include <sys/device.h> 80 81 #include <uvm/uvm_extern.h> 82 83 #include <machine/autoconf.h> 84 #include <machine/rpb.h> 85 #include <machine/sysarch.h> 86 87 #include <dev/isa/isareg.h> 88 #include <dev/isa/isavar.h> 89 90 #include <dev/pci/pcireg.h> 91 #include <dev/pci/pcivar.h> 92 #include <alpha/pci/apecsreg.h> 93 #include <alpha/pci/apecsvar.h> 94 #ifdef DEC_2100_A50 95 #include <alpha/pci/pci_2100_a50.h> 96 #endif 97 #ifdef DEC_EB64PLUS 98 #include <alpha/pci/pci_eb64plus.h> 99 #endif 100 #ifdef DEC_1000A 101 #include <alpha/pci/pci_1000a.h> 102 #endif 103 #ifdef DEC_1000 104 #include <alpha/pci/pci_1000.h> 105 #endif 106 107 int apecsmatch __P((struct device *, struct cfdata *, void *)); 108 void apecsattach __P((struct device *, struct device *, void *)); 109 110 struct cfattach apecs_ca = { 111 sizeof(struct apecs_softc), apecsmatch, apecsattach, 112 }; 113 114 extern struct cfdriver apecs_cd; 115 116 static int apecsprint __P((void *, const char *pnp)); 117 118 int apecs_bus_get_window __P((int, int, 119 struct alpha_bus_space_translation *)); 120 121 /* There can be only one. */ 122 int apecsfound; 123 struct apecs_config apecs_configuration; 124 125 int 126 apecsmatch(parent, match, aux) 127 struct device *parent; 128 struct cfdata *match; 129 void *aux; 130 { 131 struct mainbus_attach_args *ma = aux; 132 133 /* Make sure that we're looking for an APECS. */ 134 if (strcmp(ma->ma_name, apecs_cd.cd_name) != 0) 135 return (0); 136 137 if (apecsfound) 138 return (0); 139 140 return (1); 141 } 142 143 /* 144 * Set up the chipset's function pointers. 145 */ 146 void 147 apecs_init(acp, mallocsafe) 148 struct apecs_config *acp; 149 int mallocsafe; 150 { 151 acp->ac_comanche_pass2 = 152 (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0; 153 acp->ac_memwidth = 154 (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64; 155 acp->ac_epic_pass2 = 156 (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0; 157 158 acp->ac_haxr1 = REGVAL(EPIC_HAXR1); 159 acp->ac_haxr2 = REGVAL(EPIC_HAXR2); 160 161 if (!acp->ac_initted) { 162 /* don't do these twice since they set up extents */ 163 apecs_bus_io_init(&acp->ac_iot, acp); 164 apecs_bus_mem_init(&acp->ac_memt, acp); 165 166 /* 167 * We have two I/O windows and 3 MEM windows. 168 */ 169 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2; 170 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3; 171 alpha_bus_get_window = apecs_bus_get_window; 172 } 173 acp->ac_mallocsafe = mallocsafe; 174 175 apecs_pci_init(&acp->ac_pc, acp); 176 alpha_pci_chipset = &acp->ac_pc; 177 178 acp->ac_initted = 1; 179 } 180 181 void 182 apecsattach(parent, self, aux) 183 struct device *parent, *self; 184 void *aux; 185 { 186 struct apecs_softc *sc = (struct apecs_softc *)self; 187 struct apecs_config *acp; 188 struct pcibus_attach_args pba; 189 190 /* note that we've attached the chipset; can't have 2 APECSes. */ 191 apecsfound = 1; 192 193 /* 194 * set up the chipset's info; done once at console init time 195 * (maybe), but doesn't hurt to do twice. 196 */ 197 acp = sc->sc_acp = &apecs_configuration; 198 apecs_init(acp, 1); 199 200 apecs_dma_init(acp); 201 202 printf(": DECchip %s Core Logic chipset\n", 203 acp->ac_memwidth == 128 ? "21072" : "21071"); 204 printf("%s: DC21071-CA pass %d, %d-bit memory bus\n", 205 self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth); 206 printf("%s: DC21071-DA pass %d\n", self->dv_xname, 207 acp->ac_epic_pass2 ? 2 : 1); 208 /* XXX print bcache size */ 209 210 if (!acp->ac_epic_pass2) 211 printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n"); 212 213 switch (cputype) { 214 #ifdef DEC_2100_A50 215 case ST_DEC_2100_A50: 216 pci_2100_a50_pickintr(acp); 217 break; 218 #endif 219 220 #ifdef DEC_EB64PLUS 221 case ST_EB64P: 222 pci_eb64plus_pickintr(acp); 223 break; 224 #endif 225 226 #ifdef DEC_1000A 227 case ST_DEC_1000A: 228 pci_1000a_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 229 &acp->ac_pc); 230 break; 231 #endif 232 233 #ifdef DEC_1000 234 case ST_DEC_1000: 235 pci_1000_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 236 &acp->ac_pc); 237 break; 238 #endif 239 240 default: 241 panic("apecsattach: shouldn't be here, really..."); 242 } 243 244 pba.pba_busname = "pci"; 245 pba.pba_iot = &acp->ac_iot; 246 pba.pba_memt = &acp->ac_memt; 247 pba.pba_dmat = 248 alphabus_dma_get_tag(&acp->ac_dmat_direct, ALPHA_BUS_PCI); 249 pba.pba_pc = &acp->ac_pc; 250 pba.pba_bus = 0; 251 pba.pba_bridgetag = NULL; 252 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 253 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 254 config_found(self, &pba, apecsprint); 255 } 256 257 static int 258 apecsprint(aux, pnp) 259 void *aux; 260 const char *pnp; 261 { 262 register struct pcibus_attach_args *pba = aux; 263 264 /* only PCIs can attach to APECSes; easy. */ 265 if (pnp) 266 printf("%s at %s", pba->pba_busname, pnp); 267 printf(" bus %d", pba->pba_bus); 268 return (UNCONF); 269 } 270 271 int 272 apecs_bus_get_window(type, window, abst) 273 int type, window; 274 struct alpha_bus_space_translation *abst; 275 { 276 struct apecs_config *acp = &apecs_configuration; 277 bus_space_tag_t st; 278 279 switch (type) { 280 case ALPHA_BUS_TYPE_PCI_IO: 281 st = &acp->ac_iot; 282 break; 283 284 case ALPHA_BUS_TYPE_PCI_MEM: 285 st = &acp->ac_memt; 286 break; 287 288 default: 289 panic("apecs_bus_get_window"); 290 } 291 292 return (alpha_bus_space_get_window(st, window, abst)); 293 } 294