xref: /netbsd/sys/arch/alpha/pci/apecs_pci.c (revision bf9ec67e)
1 /* $NetBSD: apecs_pci.c,v 1.19 2002/05/15 16:57:42 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31 
32 __KERNEL_RCSID(0, "$NetBSD: apecs_pci.c,v 1.19 2002/05/15 16:57:42 thorpej Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 
39 #include <uvm/uvm_extern.h>
40 
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <alpha/pci/apecsreg.h>
44 #include <alpha/pci/apecsvar.h>
45 
46 void		apecs_attach_hook __P((struct device *, struct device *,
47 		    struct pcibus_attach_args *));
48 int		apecs_bus_maxdevs __P((void *, int));
49 pcitag_t	apecs_make_tag __P((void *, int, int, int));
50 void		apecs_decompose_tag __P((void *, pcitag_t, int *, int *,
51 		    int *));
52 pcireg_t	apecs_conf_read __P((void *, pcitag_t, int));
53 void		apecs_conf_write __P((void *, pcitag_t, int, pcireg_t));
54 
55 void
56 apecs_pci_init(pc, v)
57 	pci_chipset_tag_t pc;
58 	void *v;
59 {
60 
61 	pc->pc_conf_v = v;
62 	pc->pc_attach_hook = apecs_attach_hook;
63 	pc->pc_bus_maxdevs = apecs_bus_maxdevs;
64 	pc->pc_make_tag = apecs_make_tag;
65 	pc->pc_decompose_tag = apecs_decompose_tag;
66 	pc->pc_conf_read = apecs_conf_read;
67 	pc->pc_conf_write = apecs_conf_write;
68 }
69 
70 void
71 apecs_attach_hook(parent, self, pba)
72 	struct device *parent, *self;
73 	struct pcibus_attach_args *pba;
74 {
75 }
76 
77 int
78 apecs_bus_maxdevs(cpv, busno)
79 	void *cpv;
80 	int busno;
81 {
82 
83 	return 32;
84 }
85 
86 pcitag_t
87 apecs_make_tag(cpv, b, d, f)
88 	void *cpv;
89 	int b, d, f;
90 {
91 
92 	return (b << 16) | (d << 11) | (f << 8);
93 }
94 
95 void
96 apecs_decompose_tag(cpv, tag, bp, dp, fp)
97 	void *cpv;
98 	pcitag_t tag;
99 	int *bp, *dp, *fp;
100 {
101 
102 	if (bp != NULL)
103 		*bp = (tag >> 16) & 0xff;
104 	if (dp != NULL)
105 		*dp = (tag >> 11) & 0x1f;
106 	if (fp != NULL)
107 		*fp = (tag >> 8) & 0x7;
108 }
109 
110 pcireg_t
111 apecs_conf_read(cpv, tag, offset)
112 	void *cpv;
113 	pcitag_t tag;
114 	int offset;
115 {
116 	struct apecs_config *acp = cpv;
117 	pcireg_t *datap, data;
118 	int s, secondary, ba;
119 	int32_t old_haxr2;					/* XXX */
120 
121 	s = 0;					/* XXX gcc -Wuninitialized */
122 	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
123 
124 	/* secondary if bus # != 0 */
125 	pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
126 	if (secondary) {
127 		s = splhigh();
128 		old_haxr2 = REGVAL(EPIC_HAXR2);
129 		alpha_mb();
130 		REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
131 		alpha_mb();
132 	}
133 
134 	datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
135 	    tag << 5UL |					/* XXX */
136 	    (offset & ~0x03) << 5 |				/* XXX */
137 	    0 << 5 |						/* XXX */
138 	    0x3 << 3);						/* XXX */
139 	data = (pcireg_t)-1;
140 	if (!(ba = badaddr(datap, sizeof *datap)))
141 		data = *datap;
142 
143 	if (secondary) {
144 		alpha_mb();
145 		REGVAL(EPIC_HAXR2) = old_haxr2;
146 		alpha_mb();
147 		splx(s);
148 	}
149 
150 #if 0
151 	printf("apecs_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
152 	    data, datap, ba ? " (badaddr)" : "");
153 #endif
154 
155 	return data;
156 }
157 
158 void
159 apecs_conf_write(cpv, tag, offset, data)
160 	void *cpv;
161 	pcitag_t tag;
162 	int offset;
163 	pcireg_t data;
164 {
165 	struct apecs_config *acp = cpv;
166 	pcireg_t *datap;
167 	int s, secondary;
168 	int32_t old_haxr2;					/* XXX */
169 
170 	s = 0;					/* XXX gcc -Wuninitialized */
171 	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
172 
173 	/* secondary if bus # != 0 */
174 	pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
175 	if (secondary) {
176 		s = splhigh();
177 		old_haxr2 = REGVAL(EPIC_HAXR2);
178 		alpha_mb();
179 		REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
180 		alpha_mb();
181 	}
182 
183 	datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
184 	    tag << 5UL |					/* XXX */
185 	    (offset & ~0x03) << 5 |				/* XXX */
186 	    0 << 5 |						/* XXX */
187 	    0x3 << 3);						/* XXX */
188 
189 	alpha_mb();
190 	*datap = data;
191 	alpha_mb();
192 	alpha_mb();
193 
194 	if (secondary) {
195 		alpha_mb();
196 		REGVAL(EPIC_HAXR2) = old_haxr2;
197 		alpha_mb();
198 		splx(s);
199 	}
200 
201 #if 0
202 	printf("apecs_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
203 	    reg, data, datap);
204 #endif
205 }
206