xref: /netbsd/sys/arch/alpha/pci/cia_pci.c (revision bf9ec67e)
1 /* $NetBSD: cia_pci.c,v 1.26 2002/05/15 16:57:42 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31 
32 __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.26 2002/05/15 16:57:42 thorpej Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 
39 #include <uvm/uvm_extern.h>
40 
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <alpha/pci/ciareg.h>
44 #include <alpha/pci/ciavar.h>
45 
46 void		cia_attach_hook __P((struct device *, struct device *,
47 		    struct pcibus_attach_args *));
48 int		cia_bus_maxdevs __P((void *, int));
49 pcitag_t	cia_make_tag __P((void *, int, int, int));
50 void		cia_decompose_tag __P((void *, pcitag_t, int *, int *,
51 		    int *));
52 pcireg_t	cia_conf_read __P((void *, pcitag_t, int));
53 void		cia_conf_write __P((void *, pcitag_t, int, pcireg_t));
54 
55 void
56 cia_pci_init(pc, v)
57 	pci_chipset_tag_t pc;
58 	void *v;
59 {
60 
61 	pc->pc_conf_v = v;
62 	pc->pc_attach_hook = cia_attach_hook;
63 	pc->pc_bus_maxdevs = cia_bus_maxdevs;
64 	pc->pc_make_tag = cia_make_tag;
65 	pc->pc_decompose_tag = cia_decompose_tag;
66 	pc->pc_conf_read = cia_conf_read;
67 	pc->pc_conf_write = cia_conf_write;
68 }
69 
70 void
71 cia_attach_hook(parent, self, pba)
72 	struct device *parent, *self;
73 	struct pcibus_attach_args *pba;
74 {
75 }
76 
77 int
78 cia_bus_maxdevs(cpv, busno)
79 	void *cpv;
80 	int busno;
81 {
82 
83 	return 32;
84 }
85 
86 pcitag_t
87 cia_make_tag(cpv, b, d, f)
88 	void *cpv;
89 	int b, d, f;
90 {
91 
92 	return (b << 16) | (d << 11) | (f << 8);
93 }
94 
95 void
96 cia_decompose_tag(cpv, tag, bp, dp, fp)
97 	void *cpv;
98 	pcitag_t tag;
99 	int *bp, *dp, *fp;
100 {
101 
102 	if (bp != NULL)
103 		*bp = (tag >> 16) & 0xff;
104 	if (dp != NULL)
105 		*dp = (tag >> 11) & 0x1f;
106 	if (fp != NULL)
107 		*fp = (tag >> 8) & 0x7;
108 }
109 
110 pcireg_t
111 cia_conf_read(cpv, tag, offset)
112 	void *cpv;
113 	pcitag_t tag;
114 	int offset;
115 {
116 	struct cia_config *ccp = cpv;
117 	pcireg_t *datap, data;
118 	int s, secondary, ba;
119 	u_int32_t old_cfg, errbits;
120 
121 #ifdef __GNUC__
122 	s = 0;					/* XXX gcc -Wuninitialized */
123 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
124 #endif
125 
126 	/*
127 	 * Some (apparently-common) revisions of EB164 and AlphaStation
128 	 * firmware do the Wrong thing with PCI master and target aborts,
129 	 * which are caused by accesing the configuration space of devices
130 	 * that don't exist (for example).
131 	 *
132 	 * To work around this, we clear the CIA error register's PCI
133 	 * master and target abort bits before touching PCI configuration
134 	 * space and check it afterwards.  If it indicates a master or target
135 	 * abort, the device wasn't there so we return 0xffffffff.
136 	 */
137 	REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
138 	alpha_mb();
139 	alpha_pal_draina();
140 
141 	/* secondary if bus # != 0 */
142 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
143 	if (secondary) {
144 		s = splhigh();
145 		old_cfg = REGVAL(CIA_CSR_CFG);
146 		alpha_mb();
147 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
148 		alpha_mb();
149 	}
150 
151 	/*
152 	 * We just inline the BWX support, since this is the only
153 	 * difference between BWX and swiz for config space.
154 	 */
155 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
156 		if (secondary) {
157 			datap =
158 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
159 				tag | (offset & ~0x03));
160 		} else {
161 			datap =
162 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
163 				tag | (offset & ~0x03));
164 		}
165 	} else {
166 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
167 		    tag << 5UL |				/* XXX */
168 		    (offset & ~0x03) << 5 |			/* XXX */
169 		    0 << 5 |					/* XXX */
170 		    0x3 << 3);					/* XXX */
171 	}
172 	data = (pcireg_t)-1;
173 	alpha_mb();
174 	if (!(ba = badaddr(datap, sizeof *datap)))
175 		data = *datap;
176 	alpha_mb();
177 	alpha_mb();
178 
179 	if (secondary) {
180 		alpha_mb();
181 		REGVAL(CIA_CSR_CFG) = old_cfg;
182 		alpha_mb();
183 		splx(s);
184 	}
185 
186 	alpha_pal_draina();
187 	alpha_mb();
188 	errbits = REGVAL(CIA_CSR_CIA_ERR);
189 	if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
190 		ba = 1;
191 		data = 0xffffffff;
192 	}
193 
194 	if (errbits) {
195 		REGVAL(CIA_CSR_CIA_ERR) = errbits;
196 		alpha_mb();
197 		alpha_pal_draina();
198 	}
199 
200 #if 0
201 	printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
202 	    data, datap, ba ? " (badaddr)" : "");
203 #endif
204 
205 	return data;
206 }
207 
208 void
209 cia_conf_write(cpv, tag, offset, data)
210 	void *cpv;
211 	pcitag_t tag;
212 	int offset;
213 	pcireg_t data;
214 {
215 	struct cia_config *ccp = cpv;
216 	pcireg_t *datap;
217 	int s, secondary;
218 	u_int32_t old_cfg;
219 
220 #ifdef __GNUC__
221 	s = 0;					/* XXX gcc -Wuninitialized */
222 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
223 #endif
224 
225 	/* secondary if bus # != 0 */
226 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
227 	if (secondary) {
228 		s = splhigh();
229 		old_cfg = REGVAL(CIA_CSR_CFG);
230 		alpha_mb();
231 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
232 		alpha_mb();
233 	}
234 
235 	/*
236 	 * We just inline the BWX support, since this is the only
237 	 * difference between BWX and swiz for config space.
238 	 */
239 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
240 		if (secondary) {
241 			datap =
242 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
243 				tag | (offset & ~0x03));
244 		} else {
245 			datap =
246 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
247 				tag | (offset & ~0x03));
248 		}
249 	} else {
250 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
251 		    tag << 5UL |				/* XXX */
252 		    (offset & ~0x03) << 5 |			/* XXX */
253 		    0 << 5 |					/* XXX */
254 		    0x3 << 3);					/* XXX */
255 	}
256 	alpha_mb();
257 	*datap = data;
258 	alpha_mb();
259 	alpha_mb();
260 
261 	if (secondary) {
262 		alpha_mb();
263 		REGVAL(CIA_CSR_CFG) = old_cfg;
264 		alpha_mb();
265 		splx(s);
266 	}
267 
268 #if 0
269 	printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
270 	    reg, data, datap);
271 #endif
272 }
273