xref: /netbsd/sys/arch/alpha/pci/ciavar.h (revision bf9ec67e)
1 /* $NetBSD: ciavar.h,v 1.17 2000/03/19 01:43:25 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <dev/isa/isavar.h>
31 #include <dev/pci/pcivar.h>
32 #include <alpha/pci/pci_sgmap_pte64.h>
33 
34 /*
35  * A 21171 chipset's configuration.
36  *
37  * All of the information that the chipset-specific functions need to
38  * do their dirty work (and more!).
39  */
40 struct cia_config {
41 	int	cc_initted;
42 
43 	struct alpha_bus_space cc_iot, cc_memt;
44 	struct alpha_pci_chipset cc_pc;
45 
46 	struct alpha_bus_dma_tag cc_dmat_direct;
47 	struct alpha_bus_dma_tag cc_dmat_sgmap;
48 
49 	struct alpha_sgmap cc_sgmap;
50 
51 	u_int32_t cc_hae_mem;
52 	u_int32_t cc_hae_io;
53 
54 	u_int32_t cc_rev;
55 	u_int32_t cc_cnfg;
56 
57 	int	cc_flags;
58 
59 #define	CCF_ISPYXIS	0x01		/* chip is a 21174 Pyxis */
60 #define	CCF_PYXISBUG	0x02
61 #define	CCF_PCI_USE_BWX	0x04		/* use BWX for PCI config space */
62 #define	CCF_BUS_USE_BWX	0x08		/* use BWX for bus space */
63 
64 	struct extent *cc_io_ex, *cc_d_mem_ex, *cc_s_mem_ex;
65 	int	cc_mallocsafe;
66 };
67 
68 struct cia_softc {
69 	struct	device sc_dev;
70 
71 	struct	cia_config *sc_ccp;
72 };
73 
74 void	cia_init __P((struct cia_config *, int));
75 void	cia_pci_init __P((pci_chipset_tag_t, void *));
76 void	cia_dma_init __P((struct cia_config *));
77 
78 void	cia_bwx_bus_io_init __P((bus_space_tag_t, void *));
79 void	cia_bwx_bus_mem_init __P((bus_space_tag_t, void *));
80 
81 void	cia_swiz_bus_io_init __P((bus_space_tag_t, void *));
82 void	cia_swiz_bus_mem_init __P((bus_space_tag_t, void *));
83 
84 void	cia_pyxis_intr_enable __P((int, int));
85