1 /* $NetBSD: tsc.c,v 1.7 2002/05/16 01:01:32 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ross Harvey. 17 * 4. The name of Ross Harvey may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE 23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 */ 33 34 #include "opt_dec_6600.h" 35 36 #include <sys/cdefs.h> 37 38 __KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.7 2002/05/16 01:01:32 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 45 #include <machine/autoconf.h> 46 #include <machine/rpb.h> 47 #include <machine/sysarch.h> 48 49 #include <dev/isa/isareg.h> 50 #include <dev/isa/isavar.h> 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <alpha/pci/tsreg.h> 54 #include <alpha/pci/tsvar.h> 55 56 #ifdef DEC_6600 57 #include <alpha/pci/pci_6600.h> 58 #endif 59 60 #define tsc() { Generate ctags(1) key. } 61 62 int tscmatch __P((struct device *, struct cfdata *, void *)); 63 void tscattach __P((struct device *, struct device *, void *)); 64 65 struct cfattach tsc_ca = { 66 sizeof(struct tsc_softc), tscmatch, tscattach, 67 }; 68 69 extern struct cfdriver tsc_cd; 70 71 struct tsp_config tsp_configuration[2]; 72 73 static int tscprint __P((void *, const char *pnp)); 74 75 int tspmatch __P((struct device *, struct cfdata *, void *)); 76 void tspattach __P((struct device *, struct device *, void *)); 77 78 struct cfattach tsp_ca = { 79 sizeof(struct tsp_softc), tspmatch, tspattach, 80 }; 81 82 extern struct cfdriver tsp_cd; 83 84 static int tspprint __P((void *, const char *pnp)); 85 86 static int tsp_bus_get_window __P((int, int, 87 struct alpha_bus_space_translation *)); 88 89 /* There can be only one */ 90 static int tscfound; 91 92 /* Which hose is the display console connected to? */ 93 int tsp_console_hose; 94 95 int 96 tscmatch(parent, match, aux) 97 struct device *parent; 98 struct cfdata *match; 99 void *aux; 100 { 101 struct mainbus_attach_args *ma = aux; 102 103 return cputype == ST_DEC_6600 104 && strcmp(ma->ma_name, tsc_cd.cd_name) == 0 105 && !tscfound; 106 } 107 108 void tscattach(parent, self, aux) 109 struct device *parent, *self; 110 void *aux; 111 { 112 int i; 113 int nbus; 114 u_int64_t csc, aar; 115 struct tsp_attach_args tsp; 116 struct mainbus_attach_args *ma = aux; 117 118 tscfound = 1; 119 120 csc = LDQP(TS_C_CSC); 121 122 nbus = 1 + (CSC_BC(csc) >= 2); 123 printf(": 21272 Core Logic Chipset, Cchip rev %d\n" 124 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n", 125 (int)MISC_REV(LDQP(TS_C_MISC)), 126 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)], 127 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0)); 128 printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot); 129 for(i = 0; i < 4; ++i) { 130 aar = LDQP(TS_C_AAR0 + i * TS_STEP); 131 printf("%s%dMB%s", i ? ", " : "", (8 << AAR_ASIZ(aar)) & ~0xf, 132 aar & AAR_SPLIT ? " (split)" : ""); 133 } 134 printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf); 135 136 memset(&tsp, 0, sizeof tsp); 137 tsp.tsp_name = "tsp"; 138 config_found(self, &tsp, NULL); 139 140 if(LDQP(TS_C_CSC) & CSC_P1P) { 141 ++tsp.tsp_slot; 142 config_found(self, &tsp, tscprint); 143 } 144 } 145 146 static int 147 tscprint(aux, p) 148 void *aux; 149 const char *p; 150 { 151 register struct tsp_attach_args *tsp = aux; 152 153 if(p) 154 printf("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p); 155 return UNCONF; 156 } 157 158 #define tsp() { Generate ctags(1) key. } 159 160 int 161 tspmatch(parent, match, aux) 162 struct device *parent; 163 struct cfdata *match; 164 void *aux; 165 { 166 struct tsp_attach_args *t = aux; 167 168 return cputype == ST_DEC_6600 169 && strcmp(t->tsp_name, tsp_cd.cd_name) == 0; 170 } 171 172 void 173 tspattach(parent, self, aux) 174 struct device *parent, *self; 175 void *aux; 176 { 177 struct pcibus_attach_args pba; 178 struct tsp_attach_args *t = aux; 179 struct tsp_config *pcp; 180 181 printf("\n"); 182 pcp = tsp_init(1, t->tsp_slot); 183 184 tsp_dma_init(pcp); 185 186 /* 187 * Do PCI memory initialization that needs to be deferred until 188 * malloc is safe. On the Tsunami, we need to do this after 189 * DMA is initialized, as well. 190 */ 191 tsp_bus_mem_init2(&pcp->pc_memt, pcp); 192 193 pci_6600_pickintr(pcp); 194 195 pba.pba_busname = "pci"; 196 pba.pba_iot = &pcp->pc_iot; 197 pba.pba_memt = &pcp->pc_memt; 198 pba.pba_dmat = 199 alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI); 200 pba.pba_pc = &pcp->pc_pc; 201 pba.pba_bus = 0; 202 pba.pba_bridgetag = NULL; 203 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 204 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 205 config_found(self, &pba, tspprint); 206 } 207 208 struct tsp_config * 209 tsp_init(mallocsafe, n) 210 int mallocsafe; 211 int n; /* Pchip number */ 212 { 213 struct tsp_config *pcp; 214 215 KASSERT((n | 1) == 1); 216 pcp = &tsp_configuration[n]; 217 pcp->pc_pslot = n; 218 pcp->pc_iobase = TS_Pn(n, 0); 219 pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE)); 220 if (!pcp->pc_initted) { 221 tsp_bus_io_init(&pcp->pc_iot, pcp); 222 tsp_bus_mem_init(&pcp->pc_memt, pcp); 223 224 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; 225 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; 226 227 alpha_bus_get_window = tsp_bus_get_window; 228 } 229 pcp->pc_mallocsafe = mallocsafe; 230 tsp_pci_init(&pcp->pc_pc, pcp); 231 pcp->pc_initted = 1; 232 return pcp; 233 } 234 235 static int 236 tspprint(aux, p) 237 void *aux; 238 const char *p; 239 { 240 register struct pcibus_attach_args *pci = aux; 241 242 if(p) 243 printf("%s at %s", pci->pba_busname, p); 244 printf(" bus %d", pci->pba_bus); 245 return UNCONF; 246 } 247 248 static int 249 tsp_bus_get_window(type, window, abst) 250 int type, window; 251 struct alpha_bus_space_translation *abst; 252 { 253 struct tsp_config *tsp = &tsp_configuration[tsp_console_hose]; 254 bus_space_tag_t st; 255 int error; 256 257 switch (type) { 258 case ALPHA_BUS_TYPE_PCI_IO: 259 st = &tsp->pc_iot; 260 break; 261 262 case ALPHA_BUS_TYPE_PCI_MEM: 263 st = &tsp->pc_memt; 264 break; 265 266 default: 267 panic("tsp_bus_get_window"); 268 } 269 270 error = alpha_bus_space_get_window(st, window, abst); 271 if (error) 272 return (error); 273 274 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start); 275 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end); 276 277 return (0); 278 } 279