1 /* $NetBSD: tsc.c,v 1.9 2002/10/02 04:06:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ross Harvey. 17 * 4. The name of Ross Harvey may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE 23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 */ 33 34 #include "opt_dec_6600.h" 35 36 #include <sys/cdefs.h> 37 38 __KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.9 2002/10/02 04:06:39 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 45 #include <machine/autoconf.h> 46 #include <machine/rpb.h> 47 #include <machine/sysarch.h> 48 49 #include <dev/isa/isareg.h> 50 #include <dev/isa/isavar.h> 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <alpha/pci/tsreg.h> 54 #include <alpha/pci/tsvar.h> 55 56 #ifdef DEC_6600 57 #include <alpha/pci/pci_6600.h> 58 #endif 59 60 #define tsc() { Generate ctags(1) key. } 61 62 int tscmatch __P((struct device *, struct cfdata *, void *)); 63 void tscattach __P((struct device *, struct device *, void *)); 64 65 CFATTACH_DECL(tsc, sizeof(struct tsc_softc), 66 tscmatch, tscattach, NULL, NULL); 67 68 extern struct cfdriver tsc_cd; 69 70 struct tsp_config tsp_configuration[2]; 71 72 static int tscprint __P((void *, const char *pnp)); 73 74 int tspmatch __P((struct device *, struct cfdata *, void *)); 75 void tspattach __P((struct device *, struct device *, void *)); 76 77 CFATTACH_DECL(tsp, sizeof(struct tsp_softc), 78 tspmatch, tspattach, NULL, NULL); 79 80 extern struct cfdriver tsp_cd; 81 82 static int tspprint __P((void *, const char *pnp)); 83 84 static int tsp_bus_get_window __P((int, int, 85 struct alpha_bus_space_translation *)); 86 87 /* There can be only one */ 88 static int tscfound; 89 90 /* Which hose is the display console connected to? */ 91 int tsp_console_hose; 92 93 int 94 tscmatch(parent, match, aux) 95 struct device *parent; 96 struct cfdata *match; 97 void *aux; 98 { 99 struct mainbus_attach_args *ma = aux; 100 101 return cputype == ST_DEC_6600 102 && strcmp(ma->ma_name, tsc_cd.cd_name) == 0 103 && !tscfound; 104 } 105 106 void tscattach(parent, self, aux) 107 struct device *parent, *self; 108 void *aux; 109 { 110 int i; 111 int nbus; 112 u_int64_t csc, aar; 113 struct tsp_attach_args tsp; 114 struct mainbus_attach_args *ma = aux; 115 116 tscfound = 1; 117 118 csc = LDQP(TS_C_CSC); 119 120 nbus = 1 + (CSC_BC(csc) >= 2); 121 printf(": 21272 Core Logic Chipset, Cchip rev %d\n" 122 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n", 123 (int)MISC_REV(LDQP(TS_C_MISC)), 124 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)], 125 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0)); 126 printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot); 127 for(i = 0; i < 4; ++i) { 128 aar = LDQP(TS_C_AAR0 + i * TS_STEP); 129 printf("%s%dMB%s", i ? ", " : "", (8 << AAR_ASIZ(aar)) & ~0xf, 130 aar & AAR_SPLIT ? " (split)" : ""); 131 } 132 printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf); 133 134 memset(&tsp, 0, sizeof tsp); 135 tsp.tsp_name = "tsp"; 136 config_found(self, &tsp, NULL); 137 138 if(LDQP(TS_C_CSC) & CSC_P1P) { 139 ++tsp.tsp_slot; 140 config_found(self, &tsp, tscprint); 141 } 142 } 143 144 static int 145 tscprint(aux, p) 146 void *aux; 147 const char *p; 148 { 149 register struct tsp_attach_args *tsp = aux; 150 151 if(p) 152 printf("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p); 153 return UNCONF; 154 } 155 156 #define tsp() { Generate ctags(1) key. } 157 158 int 159 tspmatch(parent, match, aux) 160 struct device *parent; 161 struct cfdata *match; 162 void *aux; 163 { 164 struct tsp_attach_args *t = aux; 165 166 return cputype == ST_DEC_6600 167 && strcmp(t->tsp_name, tsp_cd.cd_name) == 0; 168 } 169 170 void 171 tspattach(parent, self, aux) 172 struct device *parent, *self; 173 void *aux; 174 { 175 struct pcibus_attach_args pba; 176 struct tsp_attach_args *t = aux; 177 struct tsp_config *pcp; 178 179 printf("\n"); 180 pcp = tsp_init(1, t->tsp_slot); 181 182 tsp_dma_init(pcp); 183 184 /* 185 * Do PCI memory initialization that needs to be deferred until 186 * malloc is safe. On the Tsunami, we need to do this after 187 * DMA is initialized, as well. 188 */ 189 tsp_bus_mem_init2(&pcp->pc_memt, pcp); 190 191 pci_6600_pickintr(pcp); 192 193 pba.pba_busname = "pci"; 194 pba.pba_iot = &pcp->pc_iot; 195 pba.pba_memt = &pcp->pc_memt; 196 pba.pba_dmat = 197 alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI); 198 pba.pba_pc = &pcp->pc_pc; 199 pba.pba_bus = 0; 200 pba.pba_bridgetag = NULL; 201 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 202 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 203 config_found(self, &pba, tspprint); 204 } 205 206 struct tsp_config * 207 tsp_init(mallocsafe, n) 208 int mallocsafe; 209 int n; /* Pchip number */ 210 { 211 struct tsp_config *pcp; 212 213 KASSERT((n | 1) == 1); 214 pcp = &tsp_configuration[n]; 215 pcp->pc_pslot = n; 216 pcp->pc_iobase = TS_Pn(n, 0); 217 pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE)); 218 if (!pcp->pc_initted) { 219 tsp_bus_io_init(&pcp->pc_iot, pcp); 220 tsp_bus_mem_init(&pcp->pc_memt, pcp); 221 222 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; 223 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; 224 225 alpha_bus_get_window = tsp_bus_get_window; 226 } 227 pcp->pc_mallocsafe = mallocsafe; 228 tsp_pci_init(&pcp->pc_pc, pcp); 229 pcp->pc_initted = 1; 230 return pcp; 231 } 232 233 static int 234 tspprint(aux, p) 235 void *aux; 236 const char *p; 237 { 238 register struct pcibus_attach_args *pci = aux; 239 240 if(p) 241 printf("%s at %s", pci->pba_busname, p); 242 printf(" bus %d", pci->pba_bus); 243 return UNCONF; 244 } 245 246 static int 247 tsp_bus_get_window(type, window, abst) 248 int type, window; 249 struct alpha_bus_space_translation *abst; 250 { 251 struct tsp_config *tsp = &tsp_configuration[tsp_console_hose]; 252 bus_space_tag_t st; 253 int error; 254 255 switch (type) { 256 case ALPHA_BUS_TYPE_PCI_IO: 257 st = &tsp->pc_iot; 258 break; 259 260 case ALPHA_BUS_TYPE_PCI_MEM: 261 st = &tsp->pc_memt; 262 break; 263 264 default: 265 panic("tsp_bus_get_window"); 266 } 267 268 error = alpha_bus_space_get_window(st, window, abst); 269 if (error) 270 return (error); 271 272 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start); 273 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end); 274 275 return (0); 276 } 277