xref: /netbsd/sys/arch/alpha/pci/ttwoga_dma.c (revision 6550d01e)
1 /* $NetBSD: ttwoga_dma.c,v 1.5 2010/12/15 01:27:19 matt Exp $ */
2 
3 /*-
4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
33 
34 __KERNEL_RCSID(0, "$NetBSD: ttwoga_dma.c,v 1.5 2010/12/15 01:27:19 matt Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 
41 #define	_ALPHA_BUS_DMA_PRIVATE
42 #include <machine/bus.h>
43 
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 
47 #include <alpha/pci/ttwogareg.h>
48 #include <alpha/pci/ttwogavar.h>
49 
50 bus_dma_tag_t ttwoga_dma_get_tag(bus_dma_tag_t, alpha_bus_t);
51 
52 int	ttwoga_bus_dmamap_load_sgmap(bus_dma_tag_t, bus_dmamap_t, void *,
53 	    bus_size_t, struct proc *, int);
54 
55 int	ttwoga_bus_dmamap_load_mbuf_sgmap(bus_dma_tag_t, bus_dmamap_t,
56 	    struct mbuf *, int);
57 
58 int	ttwoga_bus_dmamap_load_uio_sgmap(bus_dma_tag_t, bus_dmamap_t,
59 	    struct uio *, int);
60 
61 int	ttwoga_bus_dmamap_load_raw_sgmap(bus_dma_tag_t, bus_dmamap_t,
62 	    bus_dma_segment_t *, int, bus_size_t, int);
63 
64 void	ttwoga_bus_dmamap_unload_sgmap(bus_dma_tag_t, bus_dmamap_t);
65 
66 /*
67  * Direct-mapped window: 1G at 1G
68  */
69 #define	TTWOGA_DIRECT_MAPPED_BASE	(1UL*1024UL*1024UL*1024UL)
70 #define	TTWOGA_DIRECT_MAPPED_SIZE	(1UL*1024UL*1024UL*1024UL)
71 
72 /*
73  * SGMAP window: 8M at 8M
74  */
75 #define	TTWOGA_SGMAP_MAPPED_BASE	(8UL*1024UL*1024UL)
76 #define	TTWOGA_SGMAP_MAPPED_SIZE	(8UL*1024UL*1024UL)
77 
78 /* T2 has a 256-byte out-bound DMA prefetch threshold. */
79 #define	TTWOGA_SGMAP_PFTHRESH		256
80 
81 /*
82  * Macro to flush the T2 Gate Array scatter/gather TLB.
83  */
84 #define	TTWOGA_TLB_INVALIDATE(tcp)					\
85 do {									\
86 	u_int64_t temp;							\
87 									\
88 	alpha_mb();							\
89 	temp = T2GA((tcp), T2_IOCSR);					\
90 	T2GA((tcp), T2_IOCSR) = temp | IOCSR_FTLB;			\
91 	alpha_mb();							\
92 	alpha_mb();	/* MAGIC */					\
93 	T2GA((tcp), T2_IOCSR) = temp;					\
94 	alpha_mb();							\
95 	alpha_mb();	/* MAGIC */					\
96 } while (0)
97 
98 void
99 ttwoga_dma_init(struct ttwoga_config *tcp)
100 {
101 	bus_dma_tag_t t;
102 
103 	/*
104 	 * Initialize the DMA tag used for direct-mapped DMA.
105 	 */
106 	t = &tcp->tc_dmat_direct;
107 	t->_cookie = tcp;
108 	t->_wbase = TTWOGA_DIRECT_MAPPED_BASE;
109 	t->_wsize = TTWOGA_DIRECT_MAPPED_SIZE;
110 	t->_next_window = NULL;
111 	t->_boundary = 0;
112 	t->_sgmap = NULL;
113 	t->_get_tag = ttwoga_dma_get_tag;
114 	t->_dmamap_create = _bus_dmamap_create;
115 	t->_dmamap_destroy = _bus_dmamap_destroy;
116 	t->_dmamap_load = _bus_dmamap_load_direct;
117 	t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct;
118 	t->_dmamap_load_uio = _bus_dmamap_load_uio_direct;
119 	t->_dmamap_load_raw = _bus_dmamap_load_raw_direct;
120 	t->_dmamap_unload = _bus_dmamap_unload;
121 	t->_dmamap_sync = _bus_dmamap_sync;
122 
123 	t->_dmamem_alloc = _bus_dmamem_alloc;
124 	t->_dmamem_free = _bus_dmamem_free;
125 	t->_dmamem_map = _bus_dmamem_map;
126 	t->_dmamem_unmap = _bus_dmamem_unmap;
127 	t->_dmamem_mmap = _bus_dmamem_mmap;
128 
129 	/*
130 	 * Initialize the DMA tag used for sgmap-mapped DMA.
131 	 */
132 	t = &tcp->tc_dmat_sgmap;
133 	t->_cookie = tcp;
134 	t->_wbase = TTWOGA_SGMAP_MAPPED_BASE;
135 	t->_wsize = TTWOGA_SGMAP_MAPPED_SIZE;
136 	t->_next_window = NULL;
137 	t->_boundary = 0;
138 	t->_sgmap = &tcp->tc_sgmap;
139 	t->_pfthresh = TTWOGA_SGMAP_PFTHRESH;
140 	t->_get_tag = ttwoga_dma_get_tag;
141 	t->_dmamap_create = alpha_sgmap_dmamap_create;
142 	t->_dmamap_destroy = alpha_sgmap_dmamap_destroy;
143 	t->_dmamap_load = ttwoga_bus_dmamap_load_sgmap;
144 	t->_dmamap_load_mbuf = ttwoga_bus_dmamap_load_mbuf_sgmap;
145 	t->_dmamap_load_uio = ttwoga_bus_dmamap_load_uio_sgmap;
146 	t->_dmamap_load_raw = ttwoga_bus_dmamap_load_raw_sgmap;
147 	t->_dmamap_unload = ttwoga_bus_dmamap_unload_sgmap;
148 	t->_dmamap_sync = _bus_dmamap_sync;
149 
150 	t->_dmamem_alloc = _bus_dmamem_alloc;
151 	t->_dmamem_free = _bus_dmamem_free;
152 	t->_dmamem_map = _bus_dmamem_map;
153 	t->_dmamem_unmap = _bus_dmamem_unmap;
154 	t->_dmamem_mmap = _bus_dmamem_mmap;
155 
156 	/*
157 	 * Disable the SGMAP TLB, and flush it.  We reenable it if
158 	 * we have a Sable or a Gamma with T3 or T4; Gamma with T2
159 	 * has a TLB bug apparently severe enough to require disabling
160 	 * it.
161 	 */
162 	alpha_mb();
163 	T2GA(tcp, T2_IOCSR) &= ~IOCSR_ETLB;
164 	alpha_mb();
165 	alpha_mb();	/* MAGIC */
166 
167 	TTWOGA_TLB_INVALIDATE(tcp);
168 
169 	/*
170 	 * XXX We might want to make sure our DMA windows don't
171 	 * XXX overlap with PCI memory space!
172 	 */
173 
174 	/*
175 	 * Set up window 1 as a 1G direct-mapped window
176 	 * starting at 1G.
177 	 */
178 	T2GA(tcp, T2_WBASE1) = 0;
179 	alpha_mb();
180 
181 	T2GA(tcp, T2_WMASK1) = (TTWOGA_DIRECT_MAPPED_SIZE - 1) & WMASKx_PWM;
182 	alpha_mb();
183 
184 	T2GA(tcp, T2_TBASE1) = 0;
185 	alpha_mb();
186 
187 	T2GA(tcp, T2_WBASE1) = TTWOGA_DIRECT_MAPPED_BASE |
188 	    ((TTWOGA_DIRECT_MAPPED_BASE + (TTWOGA_DIRECT_MAPPED_SIZE - 1)) >>
189 	     WBASEx_PWxA_SHIFT) | WBASEx_PWE;
190 	alpha_mb();
191 
192 	/*
193 	 * Initialize the SGMAP.
194 	 */
195 	alpha_sgmap_init(t, &tcp->tc_sgmap, "ttwoga_sgmap",
196 	    TTWOGA_SGMAP_MAPPED_BASE, 0, TTWOGA_SGMAP_MAPPED_SIZE,
197 	    sizeof(u_int64_t), NULL, 0);
198 
199 	/*
200 	 * Set up window 2 as an 8MB SGMAP-mapped window
201 	 * starting at 8MB.
202 	 */
203 #ifdef DIAGNOSTIC
204 	if ((TTWOGA_SGMAP_MAPPED_BASE & WBASEx_PWSA) !=
205 	    TTWOGA_SGMAP_MAPPED_BASE)
206 		panic("ttwoga_dma_init: SGMAP base inconsistency");
207 #endif
208 	T2GA(tcp, T2_WBASE2) = 0;
209 	alpha_mb();
210 
211 	T2GA(tcp, T2_WMASK2) = (TTWOGA_SGMAP_MAPPED_SIZE - 1) & WMASKx_PWM;
212 	alpha_mb();
213 
214 	T2GA(tcp, T2_TBASE2) = tcp->tc_sgmap.aps_ptpa >> 1;
215 	alpha_mb();
216 
217 	T2GA(tcp, T2_WBASE2) = TTWOGA_SGMAP_MAPPED_BASE |
218 	    ((TTWOGA_SGMAP_MAPPED_BASE + (TTWOGA_SGMAP_MAPPED_SIZE - 1)) >>
219 	     WBASEx_PWxA_SHIFT) | WBASEx_SGE | WBASEx_PWE;
220 	alpha_mb();
221 
222 	/*
223 	 * Enable SGMAP TLB on Sable or Gamma with T3 or T4; see above.
224 	 */
225 	if (alpha_implver() == ALPHA_IMPLVER_EV4 ||
226 	    tcp->tc_rev >= TRN_T3) {
227 		alpha_mb();
228 		T2GA(tcp, T2_IOCSR) |= IOCSR_ETLB;
229 		alpha_mb();
230 		alpha_mb();	/* MAGIC */
231 		tcp->tc_use_tlb = 1;
232 	}
233 
234 	/* XXX XXX BEGIN XXX XXX */
235 	{							/* XXX */
236 		extern paddr_t alpha_XXX_dmamap_or;		/* XXX */
237 		alpha_XXX_dmamap_or = TTWOGA_DIRECT_MAPPED_BASE;/* XXX */
238 	}							/* XXX */
239 	/* XXX XXX END XXX XXX */
240 }
241 
242 /*
243  * Return the bus dma tag to be used for the specified bus type.
244  * INTERNAL USE ONLY!
245  */
246 bus_dma_tag_t
247 ttwoga_dma_get_tag(bus_dma_tag_t t, alpha_bus_t bustype)
248 {
249 	struct ttwoga_config *tcp = t->_cookie;
250 
251 	switch (bustype) {
252 	case ALPHA_BUS_PCI:
253 	case ALPHA_BUS_EISA:
254 		/*
255 		 * Systems with a T2 Gate Array can have 2G
256 		 * of memory, but we only get a direct-mapped
257 		 * window of 1G!
258 		 *
259 		 * XXX FIX THIS SOMEDAY!
260 		 */
261 		return (&tcp->tc_dmat_direct);
262 
263 	case ALPHA_BUS_ISA:
264 		/*
265 		 * ISA doesn't have enough address bits to use
266 		 * the direct-mapped DMA window, so we must use
267 		 * SGMAPs.
268 		 */
269 		return (&tcp->tc_dmat_sgmap);
270 
271 	default:
272 		panic("ttwoga_dma_get_tag: shouldn't be here, really...");
273 	}
274 }
275 
276 /*
277  * Load a T2 SGMAP-mapped DMA map with a liner buffer.
278  */
279 int
280 ttwoga_bus_dmamap_load_sgmap(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
281     bus_size_t buflen, struct proc *p, int flags)
282 {
283 	struct ttwoga_config *tcp = t->_cookie;
284 	int error;
285 
286 	error = pci_sgmap_pte64_load(t, map, buf, buflen, p, flags,
287 	    t->_sgmap);
288 	if (error == 0 && tcp->tc_use_tlb)
289 		TTWOGA_TLB_INVALIDATE(tcp);
290 
291 	return (error);
292 }
293 
294 /*
295  * Load a T2 SGMAP-mapped DMA map with an mbuf chain.
296  */
297 int
298 ttwoga_bus_dmamap_load_mbuf_sgmap(bus_dma_tag_t t, bus_dmamap_t map,
299     struct mbuf *m, int flags)
300 {
301 	struct ttwoga_config *tcp = t->_cookie;
302 	int error;
303 
304 	error = pci_sgmap_pte64_load_mbuf(t, map, m, flags, t->_sgmap);
305 	if (error == 0 && tcp->tc_use_tlb)
306 		TTWOGA_TLB_INVALIDATE(tcp);
307 
308 	return (error);
309 }
310 
311 /*
312  * Load a T2 SGMAP-mapped DMA map with a uio.
313  */
314 int
315 ttwoga_bus_dmamap_load_uio_sgmap(bus_dma_tag_t t, bus_dmamap_t map,
316     struct uio *uio, int flags)
317 {
318 	struct ttwoga_config *tcp = t->_cookie;
319 	int error;
320 
321 	error = pci_sgmap_pte64_load_uio(t, map, uio, flags, t->_sgmap);
322 	if (error == 0 && tcp->tc_use_tlb)
323 		TTWOGA_TLB_INVALIDATE(tcp);
324 
325 	return (error);
326 }
327 
328 /*
329  * Load a T2 SGMAP-mapped DMA map with raw memory.
330  */
331 int
332 ttwoga_bus_dmamap_load_raw_sgmap(bus_dma_tag_t t, bus_dmamap_t map,
333     bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
334 {
335 	struct ttwoga_config *tcp = t->_cookie;
336 	int error;
337 
338 	error = pci_sgmap_pte64_load_raw(t, map, segs, nsegs, size, flags,
339 	    t->_sgmap);
340 	if (error == 0 && tcp->tc_use_tlb)
341 		TTWOGA_TLB_INVALIDATE(tcp);
342 
343 	return (error);
344 }
345 
346 /*
347  * Unload an T2 DMA map.
348  */
349 void
350 ttwoga_bus_dmamap_unload_sgmap(bus_dma_tag_t t, bus_dmamap_t map)
351 {
352 	struct ttwoga_config *tcp = t->_cookie;
353 
354 	/*
355 	 * Invalidate any SGMAP page table entries used by this
356 	 * mapping.
357 	 */
358 	pci_sgmap_pte64_unload(t, map, t->_sgmap);
359 	if (tcp->tc_use_tlb)
360 		TTWOGA_TLB_INVALIDATE(tcp);
361 
362 	/*
363 	 * Do the generic bits of the unload.
364 	 */
365 	_bus_dmamap_unload(t, map);
366 }
367