1 /* $NetBSD: tlsb.c,v 1.25 2002/10/02 04:06:40 thorpej Exp $ */ 2 /* 3 * Copyright (c) 1997 by Matthew Jacob 4 * NASA AMES Research Center. 5 * All rights reserved. 6 * 7 * Based in part upon a prototype version by Jason Thorpe 8 * Copyright (c) 1996, 1998 by Jason Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Autoconfiguration and support routines for the TurboLaser System Bus 37 * found on AlphaServer 8200 and 8400 systems. 38 */ 39 40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 41 42 __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.25 2002/10/02 04:06:40 thorpej Exp $"); 43 44 #include "opt_multiprocessor.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 51 #include <machine/autoconf.h> 52 #include <machine/cpu.h> 53 #include <machine/cpuvar.h> 54 #include <machine/rpb.h> 55 #include <machine/pte.h> 56 #include <machine/alpha.h> 57 58 #include <alpha/tlsb/tlsbreg.h> 59 #include <alpha/tlsb/tlsbvar.h> 60 61 #include "locators.h" 62 63 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 64 65 static int tlsbmatch __P((struct device *, struct cfdata *, void *)); 66 static void tlsbattach __P((struct device *, struct device *, void *)); 67 68 CFATTACH_DECL(tlsb, sizeof (struct device), 69 tlsbmatch, tlsbattach, NULL, NULL); 70 71 extern struct cfdriver tlsb_cd; 72 73 static int tlsbprint __P((void *, const char *)); 74 static int tlsbsubmatch __P((struct device *, struct cfdata *, void *)); 75 static char *tlsb_node_type_str __P((u_int32_t)); 76 77 /* 78 * There can be only one TurboLaser, and we'll overload it 79 * with a bitmap of found turbo laser nodes. Note that 80 * these are just the actual hard TL node IDS that we 81 * discover here, not the virtual IDs that get assigned 82 * to CPUs. During TLSB specific error handling we 83 * only need to know which actual TLSB slots have boards 84 * in them (irrespective of how many CPUs they have). 85 */ 86 int tlsb_found; 87 88 static int 89 tlsbprint(aux, pnp) 90 void *aux; 91 const char *pnp; 92 { 93 struct tlsb_dev_attach_args *tap = aux; 94 95 if (pnp) 96 printf("%s at %s node %d", tlsb_node_type_str(tap->ta_dtype), 97 pnp, tap->ta_node); 98 else 99 printf(" node %d: %s", tap->ta_node, 100 tlsb_node_type_str(tap->ta_dtype)); 101 102 return (UNCONF); 103 } 104 105 static int 106 tlsbsubmatch(parent, cf, aux) 107 struct device *parent; 108 struct cfdata *cf; 109 void *aux; 110 { 111 struct tlsb_dev_attach_args *tap = aux; 112 113 if (cf->cf_loc[TLSBCF_NODE] != TLSBCF_NODE_DEFAULT && 114 cf->cf_loc[TLSBCF_NODE] != tap->ta_node) 115 return (0); 116 117 return (config_match(parent, cf, aux)); 118 } 119 120 static int 121 tlsbmatch(parent, cf, aux) 122 struct device *parent; 123 struct cfdata *cf; 124 void *aux; 125 { 126 struct mainbus_attach_args *ma = aux; 127 128 /* Make sure we're looking for a TurboLaser. */ 129 if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0) 130 return (0); 131 132 /* 133 * Only one instance of TurboLaser allowed, 134 * and only available on 21000 processor type 135 * platforms. 136 */ 137 if ((cputype != ST_DEC_21000) || tlsb_found) 138 return (0); 139 140 return (1); 141 } 142 143 static void 144 tlsbattach(parent, self, aux) 145 struct device *parent; 146 struct device *self; 147 void *aux; 148 { 149 struct tlsb_dev_attach_args ta; 150 u_int32_t tldev; 151 int node; 152 153 printf("\n"); 154 155 /* 156 * Attempt to find all devices on the bus, including 157 * CPUs, memory modules, and I/O modules. 158 */ 159 160 /* 161 * Sigh. I would like to just start off nicely, 162 * but I need to treat I/O modules differently- 163 * The highest priority I/O node has to be in 164 * node #8, and I want to find it *first*, since 165 * it will have the primary disks (most likely) 166 * on it. 167 */ 168 for (node = 0; node <= TLSB_NODE_MAX; ++node) { 169 /* 170 * Check for invalid address. This may not really 171 * be necessary, but what the heck... 172 */ 173 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t))) 174 continue; 175 tldev = TLSB_GET_NODEREG(node, TLDEV); 176 if (tldev == 0) { 177 /* Nothing at this node. */ 178 continue; 179 } 180 /* 181 * Store up that we found something at this node. 182 * We do this so that we don't have to do something 183 * silly at fault time like try a 'baddadr'... 184 */ 185 tlsb_found |= (1 << node); 186 if (TLDEV_ISIOPORT(tldev)) 187 continue; /* not interested right now */ 188 ta.ta_node = node; 189 ta.ta_dtype = TLDEV_DTYPE(tldev); 190 ta.ta_swrev = TLDEV_SWREV(tldev); 191 ta.ta_hwrev = TLDEV_HWREV(tldev); 192 193 /* 194 * Deal with hooking CPU instances to TurboLaser nodes. 195 */ 196 if (TLDEV_ISCPU(tldev)) { 197 printf("%s node %d: %s\n", self->dv_xname, 198 node, tlsb_node_type_str(tldev)); 199 } 200 /* 201 * Attach any children nodes, including a CPU's GBus 202 */ 203 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch); 204 } 205 /* 206 * *Now* search for I/O nodes (in descending order) 207 */ 208 while (--node > 0) { 209 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t))) 210 continue; 211 tldev = TLSB_GET_NODEREG(node, TLDEV); 212 if (tldev == 0) { 213 continue; 214 } 215 if (TLDEV_ISIOPORT(tldev)) { 216 #if defined(MULTIPROCESSOR) 217 /* 218 * XXX Eventually, we want to select a secondary 219 * XXX processor on which to field interrupts for 220 * XXX this node. However, we just send them to 221 * XXX the primary CPU for now. 222 * 223 * XXX Maybe multiple CPUs? Does the hardware 224 * XXX round-robin, or check the length of the 225 * XXX per-CPU interrupt queue? 226 */ 227 printf("%s node %d: routing interrupts to %s\n", 228 self->dv_xname, node, 229 cpu_info[hwrpb->rpb_primary_cpu_id]->ci_softc->sc_dev.dv_xname); 230 TLSB_PUT_NODEREG(node, TLCPUMASK, 231 (1UL << hwrpb->rpb_primary_cpu_id)); 232 #else 233 /* 234 * Make sure interrupts are sent to the primary CPU. 235 */ 236 TLSB_PUT_NODEREG(node, TLCPUMASK, 237 (1UL << hwrpb->rpb_primary_cpu_id)); 238 #endif /* MULTIPROCESSOR */ 239 240 ta.ta_node = node; 241 ta.ta_dtype = TLDEV_DTYPE(tldev); 242 ta.ta_swrev = TLDEV_SWREV(tldev); 243 ta.ta_hwrev = TLDEV_HWREV(tldev); 244 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch); 245 } 246 } 247 } 248 249 static char * 250 tlsb_node_type_str(dtype) 251 u_int32_t dtype; 252 { 253 static char tlsb_line[64]; 254 255 switch (dtype & TLDEV_DTYPE_MASK) { 256 case TLDEV_DTYPE_KFTHA: 257 return ("KFTHA I/O interface"); 258 259 case TLDEV_DTYPE_KFTIA: 260 return ("KFTIA I/O interface"); 261 262 case TLDEV_DTYPE_MS7CC: 263 return ("MS7CC Memory Module"); 264 265 case TLDEV_DTYPE_SCPU4: 266 return ("Single CPU, 4MB cache"); 267 268 case TLDEV_DTYPE_SCPU16: 269 return ("Single CPU, 16MB cache"); 270 271 case TLDEV_DTYPE_DCPU4: 272 return ("Dual CPU, 4MB cache"); 273 274 case TLDEV_DTYPE_DCPU16: 275 return ("Dual CPU, 16MB cache"); 276 277 default: 278 memset(tlsb_line, 0, sizeof(tlsb_line)); 279 sprintf(tlsb_line, "unknown, dtype 0x%x", dtype); 280 return (tlsb_line); 281 } 282 /* NOTREACHED */ 283 } 284