1 /* $NetBSD: grf_cl.c,v 1.30 2002/05/14 00:08:21 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.30 2002/05/14 00:08:21 matt Exp $"); 40 41 #include "grfcl.h" 42 #if NGRFCL > 0 43 44 /* 45 * Graphics routines for Cirrus CL GD 5426 boards, 46 * 47 * This code offers low-level routines to access Cirrus Cl GD 5426 48 * graphics-boards from within NetBSD for the Amiga. 49 * No warranties for any kind of function at all - this 50 * code may crash your hardware and scratch your harddisk. Use at your 51 * own risk. Freely distributable. 52 * 53 * Modified for Cirrus CL GD 5426 from 54 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 55 * Contributions by Ill, ScottE, MiL 56 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 57 * Picasso/040 patches (wee!) by crest 01/96 58 * 59 * PicassoIV support bz Klaus "crest" Burkert. 60 * Fixed interlace and doublescan, added clockdoubling and 61 * HiColor&TrueColor suuport by crest 01/97 62 * 63 * Thanks to Village Tronic Marketing Gmbh for providing me with 64 * a Picasso-II board. 65 * Thanks for Integrated Electronics Oy Ab for providing me with 66 * Cirrus CL GD 542x family documentation. 67 * 68 * TODO: 69 * Mouse support (almost there! :-)) 70 * Blitter support 71 * 72 */ 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/ioctl.h> 78 #include <sys/device.h> 79 #include <sys/malloc.h> 80 81 #include <machine/cpu.h> 82 #include <dev/cons.h> 83 #include <amiga/dev/itevar.h> 84 #include <amiga/amiga/device.h> 85 #include <amiga/dev/grfioctl.h> 86 #include <amiga/dev/grfvar.h> 87 #include <amiga/dev/grf_clreg.h> 88 #include <amiga/dev/zbusvar.h> 89 90 int cl_mondefok(struct grfvideo_mode *); 91 void cl_boardinit(struct grf_softc *); 92 static void cl_CompFQ(u_int, u_char *, u_char *, u_char *); 93 int cl_getvmode(struct grf_softc *, struct grfvideo_mode *); 94 int cl_setvmode(struct grf_softc *, unsigned int); 95 int cl_toggle(struct grf_softc *, unsigned short); 96 int cl_getcmap(struct grf_softc *, struct grf_colormap *); 97 int cl_putcmap(struct grf_softc *, struct grf_colormap *); 98 #ifndef CL5426CONSOLE 99 void cl_off(struct grf_softc *); 100 #endif 101 void cl_inittextmode(struct grf_softc *); 102 int cl_ioctl(register struct grf_softc *, u_long, void *); 103 int cl_getmousepos(struct grf_softc *, struct grf_position *); 104 int cl_setmousepos(struct grf_softc *, struct grf_position *); 105 static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 106 int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 107 static int cl_getspritemax(struct grf_softc *, struct grf_position *); 108 int cl_blank(struct grf_softc *, int *); 109 int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *); 110 void cl_writesprpos(volatile char *, short, short); 111 void writeshifted(volatile char *, char, char); 112 113 static void RegWakeup(volatile caddr_t); 114 static void RegOnpass(volatile caddr_t); 115 static void RegOffpass(volatile caddr_t); 116 117 void grfclattach(struct device *, struct device *, void *); 118 int grfclprint(void *, const char *); 119 int grfclmatch(struct device *, struct cfdata *, void *); 120 void cl_memset(unsigned char *, unsigned char, int); 121 122 /* Graphics display definitions. 123 * These are filled by 'grfconfig' using GRFIOCSETMON. 124 */ 125 #define monitor_def_max 24 126 static struct grfvideo_mode monitor_def[24] = { 127 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 128 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 129 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 130 }; 131 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 132 133 /* Patchable maximum pixel clock */ 134 unsigned long cl_maxpixelclock = 86000000; 135 136 /* Console display definition. 137 * Default hardcoded text mode. This grf_cl is set up to 138 * use one text mode only, and this is it. You may use 139 * grfconfig to change the mode after boot. 140 */ 141 /* Console font */ 142 #ifdef KFONT_8X11 143 #define CIRRUSFONT kernel_font_8x11 144 #define CIRRUSFONTY 11 145 #else 146 #define CIRRUSFONT kernel_font_8x8 147 #define CIRRUSFONTY 8 148 #endif 149 extern unsigned char CIRRUSFONT[]; 150 151 struct grfcltext_mode clconsole_mode = { 152 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 153 481, 490, 498, 522, 0}, 154 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 155 }; 156 /* Console colors */ 157 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 158 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 159 }; 160 161 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 162 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 163 unsigned char cl_pass_toggle; /* passthru status tracker */ 164 165 /* 166 * because all 542x-boards have 2 configdev entries, one for 167 * framebuffer mem and the other for regs, we have to hold onto 168 * the pointers globally until we match on both. This and 'cltype' 169 * are the primary obsticles to multiple board support, but if you 170 * have multiple boards you have bigger problems than grf_cl. 171 */ 172 static void *cl_fbaddr = 0; /* framebuffer */ 173 static void *cl_regaddr = 0; /* registers */ 174 static int cl_fbsize; /* framebuffer size */ 175 static int cl_fbautosize; /* framebuffer autoconfig size */ 176 177 178 /* 179 * current sprite info, if you add support for multiple boards 180 * make this an array or something 181 */ 182 struct grf_spriteinfo cl_cursprite; 183 184 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 185 * you add multiple board support 186 */ 187 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 188 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 189 190 /* standard driver stuff */ 191 struct cfattach grfcl_ca = { 192 sizeof(struct grf_softc), grfclmatch, grfclattach 193 }; 194 195 static struct cfdata *cfdata; 196 197 int 198 grfclmatch(pdp, cfp, auxp) 199 struct device *pdp; 200 struct cfdata *cfp; 201 void *auxp; 202 { 203 struct zbus_args *zap; 204 static int regprod, fbprod, fbprod2; 205 int error; 206 207 fbprod2 = 0; 208 zap = auxp; 209 210 #ifndef CL5426CONSOLE 211 if (amiga_realconfig == 0) 212 return (0); 213 #endif 214 215 /* Grab the first board we encounter as the preferred one. This will 216 * allow one board to work in a multiple 5426 board system, but not 217 * multiple boards at the same time. */ 218 if (cltype == 0) { 219 switch (zap->manid) { 220 case PICASSO: 221 switch (zap->prodid) { 222 case 11: 223 case 12: 224 regprod = 12; 225 fbprod = 11; 226 error = 0; 227 break; 228 case 22: 229 fbprod2 = 22; 230 error = 0; 231 break; 232 case 21: 233 case 23: 234 regprod = 23; 235 fbprod = 21; 236 cl_64bit = 1; 237 error = 0; 238 break; 239 case 24: 240 regprod = 24; 241 fbprod = 24; 242 cl_64bit = 1; 243 error = 0; 244 break; 245 default: 246 error = 1; 247 break; 248 } 249 if (error == 1) 250 return (0); 251 else 252 break; 253 case SPECTRUM: 254 if (zap->prodid != 2 && zap->prodid != 1) 255 return (0); 256 regprod = 2; 257 fbprod = 1; 258 break; 259 case PICCOLO: 260 switch (zap->prodid) { 261 case 5: 262 case 6: 263 regprod = 6; 264 fbprod = 5; 265 error = 0; 266 break; 267 case 10: 268 case 11: 269 regprod = 11; 270 fbprod = 10; 271 cl_64bit = 1; 272 error = 0; 273 break; 274 default: 275 error = 1; 276 break; 277 } 278 if (error == 1) 279 return (0); 280 else 281 break; 282 default: 283 return (0); 284 } 285 cltype = zap->manid; 286 } else { 287 if (cltype != zap->manid) { 288 return (0); 289 } 290 } 291 292 /* Configure either registers or framebuffer in any order */ 293 if ((cltype == PICASSO) && (cl_64bit == 1)) { 294 switch (zap->prodid) { 295 case 21: 296 cl_fbaddr = zap->va; 297 cl_fbautosize = zap->size; 298 break; 299 case 22: 300 cl_fbautosize += zap->size; 301 break; 302 case 23: 303 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 304 break; 305 case 24: 306 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 307 /* check for PicassoIV with 64MB config and handle it */ 308 if (zap->size == 0x04000000) { 309 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 310 } else { 311 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 312 } 313 cl_fbautosize = 0x400000; 314 break; 315 default: 316 return (0); 317 } 318 } 319 else { 320 if (zap->prodid == regprod) 321 cl_regaddr = zap->va; 322 else 323 if (zap->prodid == fbprod) { 324 cl_fbaddr = zap->va; 325 cl_fbautosize = zap->size; 326 } else 327 return (0); 328 } 329 330 #ifdef CL5426CONSOLE 331 if (amiga_realconfig == 0) { 332 cfdata = cfp; 333 } 334 #endif 335 336 return (1); 337 } 338 339 void 340 grfclattach(pdp, dp, auxp) 341 struct device *pdp, *dp; 342 void *auxp; 343 { 344 static struct grf_softc congrf; 345 struct zbus_args *zap; 346 struct grf_softc *gp; 347 static char attachflag = 0; 348 349 zap = auxp; 350 351 printf("\n"); 352 353 /* make sure both halves have matched */ 354 if (!cl_regaddr || !cl_fbaddr) 355 return; 356 357 /* do all that messy console/grf stuff */ 358 if (dp == NULL) 359 gp = &congrf; 360 else 361 gp = (struct grf_softc *) dp; 362 363 if (dp != NULL && congrf.g_regkva != 0) { 364 /* 365 * inited earlier, just copy (not device struct) 366 */ 367 bcopy(&congrf.g_display, &gp->g_display, 368 (char *) &gp[1] - (char *) &gp->g_display); 369 } else { 370 gp->g_regkva = (volatile caddr_t) cl_regaddr; 371 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 372 373 gp->g_unit = GRF_CL5426_UNIT; 374 gp->g_mode = cl_mode; 375 gp->g_conpri = grfcl_cnprobe(); 376 gp->g_flags = GF_ALIVE; 377 378 /* wakeup the board */ 379 cl_boardinit(gp); 380 #ifdef CL5426CONSOLE 381 grfcl_iteinit(gp); 382 (void) cl_load_mon(gp, &clconsole_mode); 383 #endif 384 385 } 386 387 /* 388 * attach grf (once) 389 */ 390 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 391 attachflag = 1; 392 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 393 switch (cltype) { 394 case PICASSO: 395 if (cl_64bit == 1) { 396 printf("Picasso IV"); 397 /* 135MHz will be supported if we 398 * have a palette doubling mode. 399 */ 400 cl_maxpixelclock = 86000000; 401 } 402 else { 403 printf("Picasso II"); 404 405 /* check for PicassoII+ (crest) */ 406 if(zap->serno == 0x00100000) 407 printf("+"); 408 409 /* determine used Gfx/chipset (crest) */ 410 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 411 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 412 case 0x24: 413 printf(" (with CL-GD5426)"); 414 break; 415 case 0x26: 416 printf(" (with CL-GD5428)"); 417 break; 418 case 0x27: 419 printf(" (with CL-GD5429)"); 420 break; 421 } 422 cl_maxpixelclock = 86000000; 423 } 424 break; 425 case SPECTRUM: 426 printf("Spectrum"); 427 cl_maxpixelclock = 90000000; 428 break; 429 case PICCOLO: 430 if (cl_64bit == 1) { 431 printf("Piccolo SD64"); 432 /* 110MHz will be supported if we 433 * have a palette doubling mode. 434 */ 435 cl_maxpixelclock = 90000000; 436 } else { 437 printf("Piccolo"); 438 cl_maxpixelclock = 90000000; 439 } 440 break; 441 } 442 printf(" being used\n"); 443 #ifdef CL_OVERCLOCK 444 cl_maxpixelclock = 115000000; 445 #endif 446 } else { 447 if (!attachflag) 448 printf("grfcl unattached!!\n"); 449 } 450 } 451 452 int 453 grfclprint(auxp, pnp) 454 void *auxp; 455 const char *pnp; 456 { 457 if (pnp) 458 printf("ite at %s: ", pnp); 459 return (UNCONF); 460 } 461 462 void 463 cl_boardinit(gp) 464 struct grf_softc *gp; 465 { 466 unsigned char *ba = gp->g_regkva; 467 int x; 468 469 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 470 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 471 delay(200000); /* wait some time (two frames as of now) */ 472 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 473 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 474 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 475 cl_fbsize = cl_fbautosize; 476 } else { 477 478 /* wakeup board and flip passthru OFF */ 479 RegWakeup(ba); 480 RegOnpass(ba); 481 482 vgaw(ba, 0x46e8, 0x16); 483 vgaw(ba, 0x102, 1); 484 vgaw(ba, 0x46e8, 0x0e); 485 if (cl_64bit != 1) 486 vgaw(ba, 0x3c3, 1); 487 488 cl_fbsize = cl_fbautosize; 489 490 /* setup initial unchanging parameters */ 491 492 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 493 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 494 495 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 496 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 497 498 if (cl_64bit == 1) { 499 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 500 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 501 } else { 502 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 503 } 504 WSeq(ba, SEQ_ID_RESET, 0x03); 505 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 506 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 507 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 508 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 509 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 510 if (cl_64bit == 1) 511 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 512 else 513 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 514 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 515 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 516 517 if (cl_64bit == 1) 518 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 519 else 520 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 521 522 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 523 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 524 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 525 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 526 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 527 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 528 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 529 530 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 531 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 532 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 533 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 534 if (cl_64bit == 1) { 535 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 536 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 537 } 538 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 539 540 WGfx(ba, GCT_ID_SET_RESET, 0x00); 541 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 542 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 543 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 544 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 545 WGfx(ba, GCT_ID_MISC, 0x01); 546 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 547 WGfx(ba, GCT_ID_BITMASK, 0xff); 548 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 549 550 for (x = 0; x < 0x10; x++) 551 WAttr(ba, x, x); 552 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 553 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 554 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 555 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 556 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 557 WAttr(ba, 0x34, 0x00); 558 559 vgaw(ba, VDAC_MASK, 0xff); 560 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 561 562 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 563 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 564 } 565 566 /* colors initially set to greyscale */ 567 vgaw(ba, VDAC_ADDRESS_W, 0); 568 for (x = 255; x >= 0; x--) { 569 vgaw(ba, VDAC_DATA, x); 570 vgaw(ba, VDAC_DATA, x); 571 vgaw(ba, VDAC_DATA, x); 572 } 573 /* set sprite bitmap pointers */ 574 cl_cursprite.image = cl_imageptr; 575 cl_cursprite.mask = cl_maskptr; 576 cl_cursprite.cmap.red = cl_sprred; 577 cl_cursprite.cmap.green = cl_sprgreen; 578 cl_cursprite.cmap.blue = cl_sprblue; 579 580 if (cl_64bit == 0) { 581 582 /* check for 1MB or 2MB board (crest) */ 583 volatile unsigned long *cl_fbtestaddr; 584 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 585 586 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 587 *cl_fbtestaddr = 0x12345678; 588 589 if (*cl_fbtestaddr != 0x12345678) { 590 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 591 cl_fbsize = 0x100000; 592 } 593 else 594 { 595 cl_fbsize = 0x200000; 596 } 597 } 598 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 599 } 600 601 602 int 603 cl_getvmode(gp, vm) 604 struct grf_softc *gp; 605 struct grfvideo_mode *vm; 606 { 607 struct grfvideo_mode *gv; 608 609 #ifdef CL5426CONSOLE 610 /* Handle grabbing console mode */ 611 if (vm->mode_num == 255) { 612 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 613 /* XXX so grfconfig can tell us the correct text dimensions. */ 614 vm->depth = clconsole_mode.fy; 615 } else 616 #endif 617 { 618 if (vm->mode_num == 0) 619 vm->mode_num = (monitor_current - monitor_def) + 1; 620 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 621 return (EINVAL); 622 gv = monitor_def + (vm->mode_num - 1); 623 if (gv->mode_num == 0) 624 return (EINVAL); 625 626 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 627 } 628 629 /* adjust internal values to pixel values */ 630 631 vm->hblank_start *= 8; 632 vm->hsync_start *= 8; 633 vm->hsync_stop *= 8; 634 vm->htotal *= 8; 635 636 return (0); 637 } 638 639 640 int 641 cl_setvmode(gp, mode) 642 struct grf_softc *gp; 643 unsigned mode; 644 { 645 if (!mode || (mode > monitor_def_max) || 646 monitor_def[mode - 1].mode_num == 0) 647 return (EINVAL); 648 649 monitor_current = monitor_def + (mode - 1); 650 651 return (0); 652 } 653 654 #ifndef CL5426CONSOLE 655 void 656 cl_off(gp) 657 struct grf_softc *gp; 658 { 659 char *ba = gp->g_regkva; 660 661 /* 662 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 663 * on just in case it didn't work...but then it doesn't matter does 664 * it? =) 665 */ 666 RegOnpass(ba); 667 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 668 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 669 } 670 #endif 671 672 int 673 cl_blank(gp, on) 674 struct grf_softc *gp; 675 int *on; 676 { 677 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 678 return(0); 679 } 680 681 /* 682 * Change the mode of the display. 683 * Return a UNIX error number or 0 for success. 684 */ 685 int 686 cl_mode(gp, cmd, arg, a2, a3) 687 register struct grf_softc *gp; 688 u_long cmd; 689 void *arg; 690 u_long a2; 691 int a3; 692 { 693 int error; 694 695 switch (cmd) { 696 case GM_GRFON: 697 error = cl_load_mon(gp, 698 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 699 return (error); 700 701 case GM_GRFOFF: 702 #ifndef CL5426CONSOLE 703 cl_off(gp); 704 #else 705 cl_load_mon(gp, &clconsole_mode); 706 #endif 707 return (0); 708 709 case GM_GRFCONFIG: 710 return (0); 711 712 case GM_GRFGETVMODE: 713 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 714 715 case GM_GRFSETVMODE: 716 error = cl_setvmode(gp, *(unsigned *) arg); 717 if (!error && (gp->g_flags & GF_GRFON)) 718 cl_load_mon(gp, 719 (struct grfcltext_mode *) monitor_current); 720 return (error); 721 722 case GM_GRFGETNUMVM: 723 *(int *) arg = monitor_def_max; 724 return (0); 725 726 case GM_GRFIOCTL: 727 return (cl_ioctl(gp, a2, arg)); 728 729 default: 730 break; 731 } 732 733 return (EPASSTHROUGH); 734 } 735 736 int 737 cl_ioctl(gp, cmd, data) 738 register struct grf_softc *gp; 739 u_long cmd; 740 void *data; 741 { 742 switch (cmd) { 743 case GRFIOCGSPRITEPOS: 744 return (cl_getmousepos(gp, (struct grf_position *) data)); 745 746 case GRFIOCSSPRITEPOS: 747 return (cl_setmousepos(gp, (struct grf_position *) data)); 748 749 case GRFIOCSSPRITEINF: 750 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 751 752 case GRFIOCGSPRITEINF: 753 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 754 755 case GRFIOCGSPRITEMAX: 756 return (cl_getspritemax(gp, (struct grf_position *) data)); 757 758 case GRFIOCGETCMAP: 759 return (cl_getcmap(gp, (struct grf_colormap *) data)); 760 761 case GRFIOCPUTCMAP: 762 return (cl_putcmap(gp, (struct grf_colormap *) data)); 763 764 case GRFIOCBITBLT: 765 break; 766 767 case GRFTOGGLE: 768 return (cl_toggle(gp, 0)); 769 770 case GRFIOCSETMON: 771 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 772 773 case GRFIOCBLANK: 774 return (cl_blank(gp, (int *)data)); 775 776 } 777 return (EPASSTHROUGH); 778 } 779 780 int 781 cl_getmousepos(gp, data) 782 struct grf_softc *gp; 783 struct grf_position *data; 784 { 785 data->x = cl_cursprite.pos.x; 786 data->y = cl_cursprite.pos.y; 787 return (0); 788 } 789 790 void 791 cl_writesprpos(ba, x, y) 792 volatile char *ba; 793 short x; 794 short y; 795 { 796 /* we want to use a 16-bit write to 3c4 so no macros used */ 797 volatile unsigned char *cwp; 798 volatile unsigned short *wp; 799 800 cwp = ba + 0x3c4; 801 wp = (unsigned short *)cwp; 802 803 /* 804 * don't ask me why, but apparently you can't do a 16-bit write with 805 * x-position like with y-position below (dagge) 806 */ 807 cwp[0] = 0x10 | ((x << 5) & 0xff); 808 cwp[1] = (x >> 3) & 0xff; 809 810 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 811 } 812 813 void 814 writeshifted(to, shiftx, shifty) 815 volatile char *to; 816 char shiftx; 817 char shifty; 818 { 819 int y; 820 unsigned long long *tptr, *iptr, *mptr, line; 821 822 tptr = (unsigned long long *) to; 823 iptr = (unsigned long long *) cl_cursprite.image; 824 mptr = (unsigned long long *) cl_cursprite.mask; 825 826 shiftx = shiftx < 0 ? 0 : shiftx; 827 shifty = shifty < 0 ? 0 : shifty; 828 829 /* start reading shifty lines down, and 830 * shift each line in by shiftx 831 */ 832 for (y = shifty; y < 64; y++) { 833 834 /* image */ 835 line = iptr[y]; 836 *tptr++ = line << shiftx; 837 838 /* mask */ 839 line = mptr[y]; 840 *tptr++ = line << shiftx; 841 } 842 843 /* clear the remainder */ 844 for (y = shifty; y > 0; y--) { 845 *tptr++ = 0; 846 *tptr++ = 0; 847 } 848 } 849 850 int 851 cl_setmousepos(gp, data) 852 struct grf_softc *gp; 853 struct grf_position *data; 854 { 855 volatile char *ba = gp->g_regkva; 856 short rx, ry, prx, pry; 857 #ifdef CL_SHIFTSPRITE 858 volatile char *fb = gp->g_fbkva; 859 volatile char *sprite = fb + (cl_fbsize - 1024); 860 #endif 861 862 /* no movement */ 863 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 864 return (0); 865 866 /* current and previous real coordinates */ 867 rx = data->x - cl_cursprite.hot.x; 868 ry = data->y - cl_cursprite.hot.y; 869 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 870 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 871 872 /* 873 * if we are/were on an edge, create (un)shifted bitmap -- 874 * ripped out optimization (not extremely worthwhile, 875 * and kind of buggy anyhow). 876 */ 877 #ifdef CL_SHIFTSPRITE 878 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 879 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 880 } 881 #endif 882 883 /* do movement, save position */ 884 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 885 cl_cursprite.pos.x = data->x; 886 cl_cursprite.pos.y = data->y; 887 888 return (0); 889 } 890 891 int 892 cl_getspriteinfo(gp, data) 893 struct grf_softc *gp; 894 struct grf_spriteinfo *data; 895 { 896 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 897 copyout(cl_cursprite.image, data->image, 64 * 8); 898 copyout(cl_cursprite.mask, data->mask, 64 * 8); 899 return (0); 900 } 901 902 static int 903 cl_setspriteinfo(gp, data) 904 struct grf_softc *gp; 905 struct grf_spriteinfo *data; 906 { 907 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 908 volatile char *sprite = fb + (cl_fbsize - 1024); 909 910 if (data->set & GRFSPRSET_SHAPE) { 911 912 unsigned short dsx, dsy, i; 913 unsigned long *di, *dm, *si, *sm; 914 unsigned long ssi[128], ssm[128]; 915 struct grf_position gpos; 916 917 918 /* check for a too large sprite (no clipping!) */ 919 dsy = data->size.y; 920 dsx = data->size.x; 921 if (dsy > 64 || dsx > 64) 922 return(EINVAL); 923 924 /* prepare destination */ 925 di = (unsigned long *)cl_cursprite.image; 926 dm = (unsigned long *)cl_cursprite.mask; 927 cl_memset((unsigned char *)di, 0, 8*64); 928 cl_memset((unsigned char *)dm, 0, 8*64); 929 930 /* two alternatives: 64 across, then it's 931 * the same format we use, just copy. Otherwise, 932 * copy into tmp buf and recopy skipping the 933 * unused 32 bits. 934 */ 935 if ((dsx - 1) / 32) { 936 copyin(data->image, di, 8 * dsy); 937 copyin(data->mask, dm, 8 * dsy); 938 } else { 939 si = ssi; sm = ssm; 940 copyin(data->image, si, 4 * dsy); 941 copyin(data->mask, sm, 4 * dsy); 942 for (i = 0; i < dsy; i++) { 943 *di = *si++; 944 *dm = *sm++; 945 di += 2; 946 dm += 2; 947 } 948 } 949 950 /* set size */ 951 cl_cursprite.size.x = data->size.x; 952 cl_cursprite.size.y = data->size.y; 953 954 /* forcably load into board */ 955 gpos.x = cl_cursprite.pos.x; 956 gpos.y = cl_cursprite.pos.y; 957 cl_cursprite.pos.x = -1; 958 cl_cursprite.pos.y = -1; 959 writeshifted(sprite, 0, 0); 960 cl_setmousepos(gp, &gpos); 961 962 } 963 if (data->set & GRFSPRSET_HOT) { 964 965 cl_cursprite.hot = data->hot; 966 967 } 968 if (data->set & GRFSPRSET_CMAP) { 969 970 u_char red[2], green[2], blue[2]; 971 972 copyin(data->cmap.red, red, 2); 973 copyin(data->cmap.green, green, 2); 974 copyin(data->cmap.blue, blue, 2); 975 bcopy(red, cl_cursprite.cmap.red, 2); 976 bcopy(green, cl_cursprite.cmap.green, 2); 977 bcopy(blue, cl_cursprite.cmap.blue, 2); 978 979 /* enable and load colors 256 & 257 */ 980 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 981 982 /* 256 */ 983 vgaw(ba, VDAC_ADDRESS_W, 0x00); 984 if (cltype == PICASSO) { 985 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 986 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 987 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 988 } else { 989 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 990 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 991 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 992 } 993 994 /* 257 */ 995 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 996 if (cltype == PICASSO) { 997 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 998 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 999 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 1000 } else { 1001 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 1002 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 1003 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 1004 } 1005 1006 /* turn on/off sprite */ 1007 if (cl_cursprite.enable) { 1008 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1009 } else { 1010 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1011 } 1012 1013 } 1014 if (data->set & GRFSPRSET_ENABLE) { 1015 1016 if (data->enable == 1) { 1017 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1018 cl_cursprite.enable = 1; 1019 } else { 1020 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1021 cl_cursprite.enable = 0; 1022 } 1023 1024 } 1025 if (data->set & GRFSPRSET_POS) { 1026 1027 /* force placement */ 1028 cl_cursprite.pos.x = -1; 1029 cl_cursprite.pos.y = -1; 1030 1031 /* do it */ 1032 cl_setmousepos(gp, &data->pos); 1033 1034 } 1035 return (0); 1036 } 1037 1038 static int 1039 cl_getspritemax(gp, data) 1040 struct grf_softc *gp; 1041 struct grf_position *data; 1042 { 1043 if (gp->g_display.gd_planes == 24) 1044 return (EINVAL); 1045 data->x = 64; 1046 data->y = 64; 1047 return (0); 1048 } 1049 1050 int 1051 cl_setmonitor(gp, gv) 1052 struct grf_softc *gp; 1053 struct grfvideo_mode *gv; 1054 { 1055 struct grfvideo_mode *md; 1056 1057 if (!cl_mondefok(gv)) 1058 return(EINVAL); 1059 1060 #ifdef CL5426CONSOLE 1061 /* handle interactive setting of console mode */ 1062 if (gv->mode_num == 255) { 1063 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1064 clconsole_mode.gv.hblank_start /= 8; 1065 clconsole_mode.gv.hsync_start /= 8; 1066 clconsole_mode.gv.hsync_stop /= 8; 1067 clconsole_mode.gv.htotal /= 8; 1068 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1069 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1070 if (!(gp->g_flags & GF_GRFON)) 1071 cl_load_mon(gp, &clconsole_mode); 1072 ite_reinit(gp->g_itedev); 1073 return (0); 1074 } 1075 #endif 1076 1077 md = monitor_def + (gv->mode_num - 1); 1078 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1079 1080 /* adjust pixel oriented values to internal rep. */ 1081 1082 md->hblank_start /= 8; 1083 md->hsync_start /= 8; 1084 md->hsync_stop /= 8; 1085 md->htotal /= 8; 1086 1087 return (0); 1088 } 1089 1090 int 1091 cl_getcmap(gfp, cmap) 1092 struct grf_softc *gfp; 1093 struct grf_colormap *cmap; 1094 { 1095 volatile unsigned char *ba; 1096 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1097 short x; 1098 int error; 1099 1100 if (cmap->count == 0 || cmap->index >= 256) 1101 return 0; 1102 1103 if (cmap->index + cmap->count > 256) 1104 cmap->count = 256 - cmap->index; 1105 1106 ba = gfp->g_regkva; 1107 /* first read colors out of the chip, then copyout to userspace */ 1108 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1109 x = cmap->count - 1; 1110 1111 /* 1112 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1113 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1114 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1115 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1116 */ 1117 1118 /* 1119 * The source for the above comment is somewhat unknow to me. 1120 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1121 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1122 * be native to the chipset. This requires special programming for the 1123 * CLUT in 8BPP to compensate and avoid false colors. 1124 * I didn't find any special stuff for 15 and 16BPP though, crest. 1125 */ 1126 1127 switch (cltype) { 1128 case SPECTRUM: 1129 case PICCOLO: 1130 rp = blue + cmap->index; 1131 gp = green + cmap->index; 1132 bp = red + cmap->index; 1133 break; 1134 case PICASSO: 1135 rp = red + cmap->index; 1136 gp = green + cmap->index; 1137 bp = blue + cmap->index; 1138 break; 1139 default: 1140 rp = gp = bp = 0; 1141 break; 1142 } 1143 1144 do { 1145 *rp++ = vgar(ba, VDAC_DATA) << 2; 1146 *gp++ = vgar(ba, VDAC_DATA) << 2; 1147 *bp++ = vgar(ba, VDAC_DATA) << 2; 1148 } while (x-- > 0); 1149 1150 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1151 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1152 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1153 return (0); 1154 1155 return (error); 1156 } 1157 1158 int 1159 cl_putcmap(gfp, cmap) 1160 struct grf_softc *gfp; 1161 struct grf_colormap *cmap; 1162 { 1163 volatile unsigned char *ba; 1164 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1165 short x; 1166 int error; 1167 1168 if (cmap->count == 0 || cmap->index >= 256) 1169 return (0); 1170 1171 if (cmap->index + cmap->count > 256) 1172 cmap->count = 256 - cmap->index; 1173 1174 /* first copy the colors into kernelspace */ 1175 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1176 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1177 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1178 ba = gfp->g_regkva; 1179 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1180 x = cmap->count - 1; 1181 1182 switch (cltype) { 1183 case SPECTRUM: 1184 case PICCOLO: 1185 rp = blue + cmap->index; 1186 gp = green + cmap->index; 1187 bp = red + cmap->index; 1188 break; 1189 case PICASSO: 1190 rp = red + cmap->index; 1191 gp = green + cmap->index; 1192 bp = blue + cmap->index; 1193 break; 1194 default: 1195 rp = gp = bp = 0; 1196 break; 1197 } 1198 1199 do { 1200 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1201 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1202 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1203 } while (x-- > 0); 1204 return (0); 1205 } else 1206 return (error); 1207 } 1208 1209 1210 int 1211 cl_toggle(gp, wopp) 1212 struct grf_softc *gp; 1213 unsigned short wopp; /* don't need that one yet, ill */ 1214 { 1215 volatile caddr_t ba; 1216 1217 ba = gp->g_regkva; 1218 1219 if (cl_pass_toggle) { 1220 RegOffpass(ba); 1221 } else { 1222 RegOnpass(ba); 1223 } 1224 return (0); 1225 } 1226 1227 static void 1228 cl_CompFQ(fq, num, denom, clkdoub) 1229 u_int fq; 1230 u_char *num; 1231 u_char *denom; 1232 u_char *clkdoub; 1233 { 1234 #define OSC 14318180 1235 /* OK, here's what we're doing here: 1236 * 1237 * OSC * NUMERATOR 1238 * VCLK = ------------------- Hz 1239 * DENOMINATOR * (1+P) 1240 * 1241 * so we're given VCLK and we should give out some useful 1242 * values.... 1243 * 1244 * NUMERATOR is 7 bits wide 1245 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1246 * 1247 * We run through all the possible combinations and 1248 * return the values which deviate the least from the chosen frequency. 1249 * 1250 */ 1251 #define OSC 14318180 1252 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1253 1254 unsigned char n, d, p, minn, mind, minp = 0; 1255 unsigned long err, minerr; 1256 1257 /* 1258 numer = 0x00 - 0x7f 1259 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1260 */ 1261 1262 /* find lowest error in 6144 iterations. */ 1263 minerr = fq; 1264 minn = 0; 1265 mind = 0; 1266 p = 0; 1267 1268 if ((cl_64bit == 1) && (fq >= 86000000)) 1269 { 1270 for (d = 1; d < 0x20; d++) { 1271 for (n = 1; n < 0x80; n++) { 1272 err = abs(count(n, d, 0) - fq); 1273 if (err < minerr) { 1274 minerr = err; 1275 minn = n; 1276 mind = d; 1277 minp = 1; 1278 } 1279 } 1280 } 1281 *clkdoub = 1; 1282 } 1283 else { 1284 for (d = 1; d < 0x20; d++) { 1285 for (n = 1; n < 0x80; n++) { 1286 err = abs(count(n, d, p) - fq); 1287 if (err < minerr) { 1288 minerr = err; 1289 minn = n; 1290 mind = d; 1291 minp = p; 1292 } 1293 } 1294 if (d == 0x1f && p == 0) { 1295 p = 1; 1296 d = 0x0f; 1297 } 1298 } 1299 *clkdoub = 0; 1300 } 1301 1302 *num = minn; 1303 *denom = (mind << 1) | minp; 1304 if (minerr > 500000) 1305 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1306 return; 1307 } 1308 1309 int 1310 cl_mondefok(gv) 1311 struct grfvideo_mode *gv; 1312 { 1313 unsigned long maxpix; 1314 1315 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1316 if (gv->mode_num != 255 || gv->depth != 4) 1317 return(0); 1318 1319 switch (gv->depth) { 1320 case 4: 1321 if (gv->mode_num != 255) 1322 return(0); 1323 case 1: 1324 case 8: 1325 maxpix = cl_maxpixelclock; 1326 if (cl_64bit == 1) 1327 { 1328 if (cltype == PICASSO) /* Picasso IV */ 1329 maxpix = 135000000; 1330 else /* Piccolo SD64 */ 1331 maxpix = 110000000; 1332 } 1333 break; 1334 case 15: 1335 case 16: 1336 if (cl_64bit == 1) 1337 maxpix = 85000000; 1338 else 1339 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1340 break; 1341 case 24: 1342 if ((cltype == PICASSO) && (cl_64bit == 1)) 1343 maxpix = 85000000; 1344 else 1345 maxpix = cl_maxpixelclock / 3; 1346 break; 1347 case 32: 1348 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1349 maxpix = 50000000; 1350 else 1351 maxpix = 0; 1352 break; 1353 default: 1354 printf("grfcl: Illegal depth in mode %d\n", 1355 (int) gv->mode_num); 1356 return (0); 1357 } 1358 1359 if (gv->pixel_clock > maxpix) { 1360 printf("grfcl: Pixelclock too high in mode %d\n", 1361 (int) gv->mode_num); 1362 return (0); 1363 } 1364 1365 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1366 printf("grfcl: sync-on-green is not supported\n"); 1367 return (0); 1368 } 1369 1370 return (1); 1371 } 1372 1373 int 1374 cl_load_mon(gp, md) 1375 struct grf_softc *gp; 1376 struct grfcltext_mode *md; 1377 { 1378 struct grfvideo_mode *gv; 1379 struct grfinfo *gi; 1380 volatile caddr_t ba, fb; 1381 unsigned char num0, denom0, clkdoub; 1382 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1383 VSE, VT; 1384 int clkmul, offsmul, clkmode; 1385 int vmul; 1386 int sr15; 1387 unsigned char hvsync_pulse; 1388 char TEXT; 1389 1390 /* identity */ 1391 gv = &md->gv; 1392 TEXT = (gv->depth == 4); 1393 1394 if (!cl_mondefok(gv)) { 1395 printf("grfcl: Monitor definition not ok\n"); 1396 return (0); 1397 } 1398 1399 ba = gp->g_regkva; 1400 fb = gp->g_fbkva; 1401 1402 /* provide all needed information in grf device-independant locations */ 1403 gp->g_data = (caddr_t) gv; 1404 gi = &gp->g_display; 1405 gi->gd_regaddr = (caddr_t) kvtop(ba); 1406 gi->gd_regsize = 64 * 1024; 1407 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1408 gi->gd_fbsize = cl_fbsize; 1409 gi->gd_colors = 1 << gv->depth; 1410 gi->gd_planes = gv->depth; 1411 gi->gd_fbwidth = gv->disp_width; 1412 gi->gd_fbheight = gv->disp_height; 1413 gi->gd_fbx = 0; 1414 gi->gd_fby = 0; 1415 if (TEXT) { 1416 gi->gd_dwidth = md->fx * md->cols; 1417 gi->gd_dheight = md->fy * md->rows; 1418 } else { 1419 gi->gd_dwidth = gv->disp_width; 1420 gi->gd_dheight = gv->disp_height; 1421 } 1422 gi->gd_dx = 0; 1423 gi->gd_dy = 0; 1424 1425 /* get display mode parameters */ 1426 1427 HBS = gv->hblank_start; 1428 HSS = gv->hsync_start; 1429 HSE = gv->hsync_stop; 1430 HBE = gv->htotal - 1; 1431 HT = gv->htotal; 1432 VBS = gv->vblank_start; 1433 VSS = gv->vsync_start; 1434 VSE = gv->vsync_stop; 1435 VBE = gv->vtotal - 1; 1436 VT = gv->vtotal; 1437 1438 if (TEXT) 1439 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1440 else 1441 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1442 VDE = gv->disp_height - 1; 1443 1444 /* adjustments */ 1445 switch (gv->depth) { 1446 case 8: 1447 clkmul = 1; 1448 offsmul = 1; 1449 clkmode = 0x0; 1450 break; 1451 case 15: 1452 case 16: 1453 clkmul = 1; 1454 offsmul = 2; 1455 clkmode = 0x6; 1456 break; 1457 case 24: 1458 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1459 clkmul = 1; 1460 else 1461 clkmul = 3; 1462 offsmul = 3; 1463 clkmode = 0x4; 1464 break; 1465 case 32: 1466 clkmul = 1; 1467 offsmul = 2; 1468 clkmode = 0x8; 1469 break; 1470 default: 1471 clkmul = 1; 1472 offsmul = 1; 1473 clkmode = 0x0; 1474 break; 1475 } 1476 1477 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1478 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1479 } else 1480 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1481 1482 vmul = 2; 1483 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1484 vmul = 1; 1485 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1486 vmul = 4; 1487 1488 VDE = VDE * vmul / 2; 1489 VBS = VBS * vmul / 2; 1490 VSS = VSS * vmul / 2; 1491 VSE = VSE * vmul / 2; 1492 VBE = VBE * vmul / 2; 1493 VT = VT * vmul / 2; 1494 1495 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1496 if (cl_64bit == 1) { 1497 if (TEXT || (gv->depth == 1)) 1498 sr15 = 0xd0; 1499 else 1500 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1501 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1502 } else { 1503 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1504 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1505 } 1506 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1507 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1508 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1509 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1510 1511 /* Set clock */ 1512 1513 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1514 1515 /* Horizontal/Vertical Sync Pulse */ 1516 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1517 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1518 hvsync_pulse &= ~0x40; 1519 else 1520 hvsync_pulse |= 0x40; 1521 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1522 hvsync_pulse &= ~0x80; 1523 else 1524 hvsync_pulse |= 0x80; 1525 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1526 1527 if (clkdoub) { 1528 HDE /= 2; 1529 HBS /= 2; 1530 HSS /= 2; 1531 HSE /= 2; 1532 HBE /= 2; 1533 HT /= 2; 1534 clkmode = 0x6; 1535 } 1536 1537 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1538 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1539 1540 /* load display parameters into board */ 1541 1542 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1543 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1544 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1545 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1546 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1547 WCrt(ba, CRT_ID_END_HOR_RETR, 1548 (HSE & 0x1f) | 1549 ((HBE & 0x20) ? 0x80 : 0x00)); 1550 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1551 WCrt(ba, CRT_ID_OVERFLOW, 1552 0x10 | 1553 ((VT & 0x100) ? 0x01 : 0x00) | 1554 ((VDE & 0x100) ? 0x02 : 0x00) | 1555 ((VSS & 0x100) ? 0x04 : 0x00) | 1556 ((VBS & 0x100) ? 0x08 : 0x00) | 1557 ((VT & 0x200) ? 0x20 : 0x00) | 1558 ((VDE & 0x200) ? 0x40 : 0x00) | 1559 ((VSS & 0x200) ? 0x80 : 0x00)); 1560 1561 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1562 0x40 | /* TEXT ? 0x00 ??? */ 1563 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1564 ((VBS & 0x200) ? 0x20 : 0x00) | 1565 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1566 1567 /* text cursor */ 1568 1569 if (TEXT) { 1570 #if CL_ULCURSOR 1571 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1572 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1573 #else 1574 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1575 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1576 #endif 1577 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1578 1579 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1580 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1581 } 1582 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1583 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1584 1585 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1586 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1587 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1588 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1589 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1590 1591 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1592 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1593 WCrt(ba, CRT_ID_LACE_CNTL, 1594 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1595 ((HBE & 0x40) ? 0x10 : 0x00) | 1596 ((HBE & 0x80) ? 0x20 : 0x00) | 1597 ((VBE & 0x100) ? 0x40 : 0x00) | 1598 ((VBE & 0x200) ? 0x80 : 0x00)); 1599 1600 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1601 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1602 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1603 1604 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1605 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1606 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1607 1608 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1609 sometimes, out of "secret" application note (crest) */ 1610 vgaw(ba, VDAC_MASK, 0); 1611 /* reset HDR "magic" access counter (crest) */ 1612 vgar(ba, VDAC_ADDRESS); 1613 1614 delay(200000); 1615 vgar(ba, VDAC_MASK); 1616 delay(200000); 1617 vgar(ba, VDAC_MASK); 1618 delay(200000); 1619 vgar(ba, VDAC_MASK); 1620 delay(200000); 1621 vgar(ba, VDAC_MASK); 1622 delay(200000); 1623 switch (gv->depth) { 1624 case 1: 1625 case 4: /* text */ 1626 vgaw(ba, VDAC_MASK, 0); 1627 HDE = gv->disp_width / 16; 1628 break; 1629 case 8: 1630 if (clkdoub) 1631 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1632 else 1633 vgaw(ba, VDAC_MASK, 0); 1634 HDE = gv->disp_width / 8; 1635 break; 1636 case 15: 1637 vgaw(ba, VDAC_MASK, 0xd0); 1638 HDE = gv->disp_width / 4; 1639 break; 1640 case 16: 1641 vgaw(ba, VDAC_MASK, 0xc1); 1642 HDE = gv->disp_width / 4; 1643 break; 1644 case 24: 1645 vgaw(ba, VDAC_MASK, 0xc5); 1646 HDE = (gv->disp_width / 8) * 3; 1647 break; 1648 case 32: 1649 vgaw(ba, VDAC_MASK, 0xc5); 1650 HDE = (gv->disp_width / 4); 1651 break; 1652 } 1653 1654 /* reset HDR "magic" access counter (crest) */ 1655 vgar(ba, VDAC_ADDRESS); 1656 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1657 vgaw(ba, VDAC_MASK, 0xff); 1658 1659 WCrt(ba, CRT_ID_OFFSET, HDE); 1660 if (cl_64bit == 1) { 1661 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1662 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1663 } 1664 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1665 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1666 0x22 | 1667 ((HDE > 0xff) ? 0x10 : 0x00)); 1668 1669 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1670 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1671 (gv->depth == 1) ? 0x01 : 0x0f); 1672 1673 /* text initialization */ 1674 1675 if (TEXT) { 1676 cl_inittextmode(gp); 1677 } 1678 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1679 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1680 1681 /* Pass-through */ 1682 1683 RegOffpass(ba); 1684 1685 return (1); 1686 } 1687 1688 void 1689 cl_inittextmode(gp) 1690 struct grf_softc *gp; 1691 { 1692 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1693 volatile unsigned char *ba = gp->g_regkva; 1694 unsigned char *fb = gp->g_fbkva; 1695 unsigned char *c, *f, y; 1696 unsigned short z; 1697 1698 1699 /* load text font into beginning of display memory. Each character 1700 * cell is 32 bytes long (enough for 4 planes) */ 1701 1702 SetTextPlane(ba, 0x02); 1703 cl_memset(fb, 0, 256 * 32); 1704 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1705 f = tm->fdata; 1706 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1707 for (y = 0; y < tm->fy; y++) 1708 *c++ = *f++; 1709 1710 /* clear out text/attr planes (three screens worth) */ 1711 1712 SetTextPlane(ba, 0x01); 1713 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1714 SetTextPlane(ba, 0x00); 1715 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1716 1717 /* print out a little init msg */ 1718 1719 c = (unsigned char *) (fb) + (tm->cols - 16); 1720 strcpy(c, "CIRRUS"); 1721 c[6] = 0x20; 1722 1723 /* set colors (B&W) */ 1724 1725 vgaw(ba, VDAC_ADDRESS_W, 0); 1726 for (z = 0; z < 256; z++) { 1727 unsigned char r, g, b; 1728 1729 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1730 1731 if (cltype == PICASSO) { 1732 r = clconscolors[y][0]; 1733 g = clconscolors[y][1]; 1734 b = clconscolors[y][2]; 1735 } else { 1736 b = clconscolors[y][0]; 1737 g = clconscolors[y][1]; 1738 r = clconscolors[y][2]; 1739 } 1740 vgaw(ba, VDAC_DATA, r >> 2); 1741 vgaw(ba, VDAC_DATA, g >> 2); 1742 vgaw(ba, VDAC_DATA, b >> 2); 1743 } 1744 } 1745 1746 void 1747 cl_memset(d, c, l) 1748 unsigned char *d; 1749 unsigned char c; 1750 int l; 1751 { 1752 for (; l > 0; l--) 1753 *d++ = c; 1754 } 1755 1756 /* 1757 * Special wakeup/passthrough registers on graphics boards 1758 * 1759 * The methods have diverged a bit for each board, so 1760 * WPass(P) has been converted into a set of specific 1761 * inline functions. 1762 */ 1763 static void 1764 RegWakeup(ba) 1765 volatile caddr_t ba; 1766 { 1767 1768 switch (cltype) { 1769 case SPECTRUM: 1770 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1771 break; 1772 case PICASSO: 1773 /* Picasso needs no wakeup */ 1774 break; 1775 case PICCOLO: 1776 if (cl_64bit == 1) 1777 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1778 else 1779 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1780 break; 1781 } 1782 delay(200000); 1783 } 1784 1785 static void 1786 RegOnpass(ba) 1787 volatile caddr_t ba; 1788 { 1789 1790 switch (cltype) { 1791 case SPECTRUM: 1792 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1793 break; 1794 case PICASSO: 1795 if (cl_64bit == 0) 1796 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1797 break; 1798 case PICCOLO: 1799 if (cl_64bit == 1) 1800 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1801 else 1802 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1803 break; 1804 } 1805 cl_pass_toggle = 1; 1806 delay(200000); 1807 } 1808 1809 static void 1810 RegOffpass(ba) 1811 volatile caddr_t ba; 1812 { 1813 1814 switch (cltype) { 1815 case SPECTRUM: 1816 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1817 break; 1818 case PICASSO: 1819 if (cl_64bit == 0) 1820 vgaw(ba, PASS_ADDRESS_W, 0xff); 1821 break; 1822 case PICCOLO: 1823 if (cl_64bit == 1) 1824 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1825 else 1826 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1827 break; 1828 } 1829 cl_pass_toggle = 0; 1830 delay(200000); 1831 } 1832 1833 #endif /* NGRFCL */ 1834