1 /* $NetBSD: grf_ul.c,v 1.46 2009/10/26 19:16:54 cegger Exp $ */ 2 #define UL_DEBUG 3 4 /*- 5 * Copyright (c) 1995 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Ignatios Souvatzis. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include "opt_amigacons.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: grf_ul.c,v 1.46 2009/10/26 19:16:54 cegger Exp $"); 37 38 #include "grful.h" 39 #if NGRFUL > 0 40 41 /* Graphics routines for the University of Lowell A2410 board, 42 using the TMS34010 processor. */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/errno.h> 47 #include <sys/ioctl.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 #include <sys/syslog.h> 51 52 #include <machine/cpu.h> 53 54 #include <amiga/amiga/device.h> 55 #include <amiga/amiga/isr.h> 56 #include <amiga/dev/zbusvar.h> 57 #include <amiga/dev/grfioctl.h> 58 #include <amiga/dev/grfvar.h> 59 #include <amiga/dev/grf_ulreg.h> 60 61 extern u_int16_t tmscode[]; 62 63 int ul_ioctl(struct grf_softc *, u_long, void *, dev_t); 64 int ul_getcmap(struct grf_softc *, struct grf_colormap *, dev_t); 65 int ul_putcmap(struct grf_softc *, struct grf_colormap *, dev_t); 66 int ul_bitblt(struct grf_softc *, struct grf_bitblt *, dev_t); 67 int ul_blank(struct grf_softc *, int *, dev_t); 68 69 static int ulisr(void *); 70 int ulowell_alive(struct grfvideo_mode *); 71 static void ul_load_code(struct grf_softc *); 72 static int ul_load_mon(struct grf_softc *, struct grfvideo_mode *); 73 static int ul_getvmode(struct grf_softc *, struct grfvideo_mode *); 74 static int ul_setvmode(struct grf_softc *, unsigned); 75 static inline void ul_setfb(struct grf_softc *, u_long); 76 77 /* 78 * marked true early so that ulowell_cnprobe() can tell if we are alive. 79 */ 80 int ulowell_inited; 81 82 /* standard-palette definition */ 83 u_int8_t ul_std_palette[] = { 84 0,128, 0,128, 0,128, 0,128, 0,255, 0,255, 0,255, 0,255, 85 0, 0,128,128, 0, 0,128,128, 0, 0,255,255, 0, 0,255,255, 86 0, 0, 0, 0, 128,128,128,128, 0, 0, 0, 0, 255,255,255,255}; 87 88 u_int8_t ul_ovl_palette[] = { 89 128, 0, 0, 0, 90 128, 0, 0, 0, 91 128, 0, 0, 0}; 92 93 struct grfvideo_mode ul_monitor_defs[] = { 94 95 /* 96 * We give all these values in MI units, that is: 97 * horizontal timings in units of pixels 98 * vertical timings in units of lines 99 * point of reference is blanking end. 100 * 101 * The ul_load_mon transforms these values right before loading 102 * them into the chip. 103 * 104 * This leaves us with a single point where things are transformed, 105 * which should make life easier if we ever change things again. 106 */ 107 108 /* 1024x768, 60Hz */ 109 {1,"1024x768", 66667000, 1024,768,8, 1024,1088,1296,1392, 110 768,771,774,798, 0}, 111 /* 864x648, 70Hz */ 112 {2,"864x648", 50000000, 864,648,8, 864,928,992,1056, 113 648,658,663,678, 0}, 114 /* 800x600, 60Hz */ 115 {3, "800x600", 36000000, 800,600,8, 800,864,928,992, 116 600,610,615,630, 0}, 117 /* 640x400, 60 Hz, interlaced */ 118 {4, "640x400i", 14318000, 640,400,8, 640,768,832,912, 119 200,223,203,240, 1}, 120 /* 1024x768, 65Hz interlaced, s.th. is strange */ 121 {5, "1024x768?i", 44980000, 1024,768,8, 1024,1072,1136,1280, 122 488,509,512,534, 1}, 123 /* 1024x1024, 60Hz */ 124 {6, "1024x1024", 80000000, 1024,1024,8, 1024,1040,1120,1248, 125 1024,1027,1030,1055, 0}, 126 /* 736x480, 60 Hz */ 127 {7, "736x480", 28636300, 736,480,8, 736,784,848,928, 128 480,491,495,515, 0}, 129 }; 130 131 int ulowell_mon_max = sizeof (ul_monitor_defs)/sizeof (ul_monitor_defs[0]); 132 133 /* option settable */ 134 #ifndef ULOWELL_OSC1 135 #define ULOWELL_OSC1 36000000 136 #endif 137 138 #ifndef ULOWELL_OSC2 139 #define ULOWELL_OSC2 66667000 140 #endif 141 142 #ifndef ULOWELL_DEFAULT_MON 143 #define ULOWELL_DEFAULT_MON 1 144 #endif 145 146 /* patchable */ 147 int ulowell_default_mon = ULOWELL_DEFAULT_MON; 148 int ulowell_default_gfx = ULOWELL_DEFAULT_MON; 149 150 /* 151 * yes, this should be per board. We don't pay service to multiple boards, 152 * anyway. 153 */ 154 155 u_long ulowell_clock[2] = { ULOWELL_OSC2, ULOWELL_OSC1 }; 156 157 static struct grfvideo_mode *current_mon; 158 159 /* 160 * We dont use ints at the moment, but will need this later to avoid 161 * busy_waiting in gsp_write, and we use it for spurious int warnings. 162 */ 163 164 static int 165 ulisr(void *arg) 166 { 167 struct grf_softc *gp = arg; 168 volatile struct gspregs *ba; 169 u_int16_t thebits; 170 171 if (gp == NULL) 172 return 0; 173 174 ba = (volatile struct gspregs *)gp->g_regkva; 175 176 if (ba == NULL) 177 return 0; 178 179 thebits = ba->ctrl; 180 if (thebits & INTOUT) { 181 log(LOG_INFO, "grf4: got interrupt, ctrl=0x%4x\n", thebits); 182 /* clear int */ 183 ba->ctrl = thebits & ~INTOUT; 184 return 1; 185 } 186 return 0; 187 } 188 189 /* 190 * used to query the ulowell board to see if its alive. 191 * for the moment, a NOP. 192 */ 193 int 194 ulowell_alive(struct grfvideo_mode *mdp) 195 { 196 return 1; 197 } 198 199 /* 200 * Load the (mostly) ite support code and the default colormaps. 201 */ 202 static void 203 ul_load_code(struct grf_softc *gp) 204 { 205 struct grf_ul_softc *gup; 206 volatile struct gspregs *ba; 207 struct grfinfo *gi; 208 int i,j; 209 #if 0 210 struct grf_colormap gcm; 211 #endif 212 213 gup = (struct grf_ul_softc *)gp; 214 ba = (volatile struct gspregs *)gp->g_regkva; 215 gi = &gp->g_display; 216 217 gi->gd_regaddr = ztwopa((volatile void *)ba); 218 gi->gd_regsize = sizeof(struct gspregs); 219 gi->gd_fbaddr = NULL; 220 gi->gd_fbsize = 0; 221 gi->gd_fbwidth = 1024; 222 gi->gd_fbheight = 1024; 223 gi->gd_colors = 256; 224 225 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); 226 ba->hstadrh = 0xC000; 227 ba->hstadrl = 0x0080; 228 ba->data = 0x0; /* disable screen refresh and video output */ 229 ba->data = 0xFFFC; /* screen refresh base address */ 230 ba->data = 0xFFFF; /* no display int possible */ 231 ba->data = 0x000C; /* CAS before RAS refresh each 64 local clks */ 232 233 ba->ctrl = (ba->ctrl & ~INCW) | LBL; 234 ba->hstadrh = 0xfe80; 235 ba->hstadrl = 0; 236 ba->data = 4; 237 ba->hstadrl = 0x20; 238 ba->data = 0xFF; /* all color planes visible */ 239 240 ba->hstadrl = 0; 241 ba->data = 5; 242 ba->hstadrl = 0x20; 243 ba->data = 0; /* no color planes blinking */ 244 245 ba->hstadrl = 0; 246 ba->data = 6; 247 ba->hstadrl = 0x20; 248 ba->data = gup->gus_ovslct = 0x43; 249 /* overlay visible, no overlay blinking, overlay color 0 transparent */ 250 251 ba->hstadrl = 0; 252 ba->data = 7; 253 ba->hstadrl = 0x20; 254 ba->data = 0; /* voodoo */ 255 256 /* clear overlay planes */ 257 ba->ctrl |= INCW; 258 ba->hstadrh = 0xff80; 259 ba->hstadrl = 0x0000; 260 for (i=0xff80000; i< 0xffa0000; ++i) { 261 ba->data = 0; 262 } 263 264 /* download tms code */ 265 266 ba->ctrl = LBL | INCW | NMI | NMIM | HLT | CF; 267 268 printf("\ndownloading TMS code"); 269 i=0; 270 while ((j = tmscode[i++])) { 271 printf("."); 272 ba->hstadrh = tmscode[i++]; 273 ba->hstadrl = tmscode[i++]; 274 while (j-- > 0) { 275 ba->data = tmscode[i++]; 276 } 277 } 278 279 /* font info was uploaded in ite_ul.c(ite_ulinit). */ 280 281 #if 1 282 /* XXX load image palette with some initial values, slightly hacky */ 283 284 ba->hstadrh = 0xfe80; 285 ba->hstadrl = 0x0000; 286 ba->ctrl |= INCW; 287 ba->data = 0; 288 ba->ctrl &= ~INCW; 289 290 for (i=0; i<16; ++i) { 291 ba->data = gup->gus_imcmap[i+ 0] = ul_std_palette[i+ 0]; 292 ba->data = gup->gus_imcmap[i+256] = ul_std_palette[i+16]; 293 ba->data = gup->gus_imcmap[i+512] = ul_std_palette[i+32]; 294 } 295 296 /* 297 * XXX load shadow overlay palette with what the TMS code will load 298 * into the real one some time after the TMS code is started below. 299 * This might be considered a rude hack. 300 */ 301 memcpy(gup->gus_ovcmap, ul_ovl_palette, 3*4); 302 303 /* 304 * Unflush cache, unhalt CPU -> nmi starts to run. This MUST NOT BE 305 * DONE before the image color map initialization above, to guarantee 306 * the index register in the BT458 is not used by more than one CPU 307 * at once. 308 * 309 * XXX For the same reason, we'll have to rething ul_putcmap(). For 310 * details, look at comment there. 311 */ 312 ba->ctrl &= ~(HLT|CF); 313 314 #else 315 /* 316 * XXX I wonder why this partially ever worked. 317 * 318 * This can't possibly work this way, as we are copyin()ing data in 319 * ul_putcmap. 320 * 321 * I guess this partially worked because SFC happened to point to 322 * to supervisor data space on 68030 machines coming from the old 323 * boot loader. 324 * 325 * While this looks more correct than the hack in the other part of the 326 * loop, we would have to do our own version of the loop through 327 * colormap entries, set up command buffer, and call gsp_write(), or 328 * factor out some code. 329 */ 330 331 /* 332 * XXX This version will work for the overlay, if our queue codes 333 * initial conditions are set at load time (not start time). 334 * It further assumes that ul_putcmap only uses the 335 * GRFIMDEV/GRFOVDEV bits of the dev parameter. 336 */ 337 338 339 /* unflush cache, unhalt CPU first -> nmi starts to run */ 340 ba->ctrl &= ~(HLT|CF); 341 342 gcm.index = 0; 343 gcm.count = 16; 344 gcm.red = ul_std_palette + 0; 345 gcm.green = ul_std_palette + 16; 346 gcm.blue = ul_std_palette + 32; 347 ul_putcmap(gp, &gcm, GRFIMDEV); 348 349 gcm.index = 0; 350 gcm.count = 4; 351 gcm.red = ul_ovl_palette + 0; 352 gcm.green = ul_ovl_palette + 4; 353 gcm.blue = ul_ovl_palette + 8; 354 ul_putcmap(gp, &gcm, GRFOVDEV); 355 #endif 356 357 } 358 359 static int 360 ul_load_mon(struct grf_softc *gp, struct grfvideo_mode *md) 361 { 362 struct grf_ul_softc *gup; 363 struct grfinfo *gi; 364 volatile struct gspregs *ba; 365 u_int16_t buf[8]; 366 367 gup = (struct grf_ul_softc *)gp; 368 gi = &gp->g_display; 369 ba = (volatile struct gspregs *)gp->g_regkva; 370 371 gi->gd_dyn.gdi_fbx = 0; 372 gi->gd_dyn.gdi_fby = 0; 373 gi->gd_dyn.gdi_dwidth = md->disp_width; 374 gi->gd_dyn.gdi_dheight = md->disp_height; 375 gi->gd_dyn.gdi_dx = 0; 376 gi->gd_dyn.gdi_dy = 0; 377 378 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); /* XXX */ 379 380 ba->hstadrh = 0xC000; 381 ba->hstadrl = 0x0000; 382 383 ba->data = (md->hsync_stop - md->hsync_start)/16; 384 ba->data = (md->htotal - md->hsync_start)/16 - 1; 385 ba->data = (md->hblank_start + md->htotal - md->hsync_start)/16 - 1; 386 ba->data = md->htotal/16 - 1; 387 388 ba->data = md->vsync_stop - md->vsync_start; 389 ba->data = md->vtotal - md->vsync_start - 1; 390 ba->data = md->vblank_start + md->vtotal - md->vsync_start - 1; 391 ba->data = md->vtotal - 1; 392 393 ba->ctrl &= ~INCW; 394 ba->hstadrh = 0xFE90; 395 ba->hstadrl = 0x0000; 396 397 if (abs(md->pixel_clock - ulowell_clock[0]) > 398 abs(md->pixel_clock - ulowell_clock[1])) { 399 400 ba->data = (ba->data & 0xFC) | 2 | 1; 401 md->pixel_clock = ulowell_clock[1]; 402 403 } else { 404 ba->data = (ba->data & 0xFC) | 2 | 0; 405 md->pixel_clock = ulowell_clock[0]; 406 } 407 408 ba->ctrl |= LBL | INCW; 409 ba->hstadrh = 0xC000; 410 ba->hstadrl = 0x0080; 411 ba->data = md->disp_flags & GRF_FLAGS_LACE ? 0xb020 : 0xf020; 412 413 /* I guess this should be in the yet unimplemented mode select ioctl */ 414 /* Hm.. maybe not. We always put the console on overlay plane no 0. */ 415 /* Anyway, this _IS_ called in the mode select ioctl. */ 416 417 /* ite support code parameters: */ 418 buf[0] = GCMD_MCHG; 419 buf[1] = md->disp_width; /* display width */ 420 buf[2] = md->disp_height; /* display height */ 421 buf[3] = 0; /* LSW of frame buffer origin */ 422 buf[4] = 0xFF80; /* MSW of frame buffer origin */ 423 buf[5] = gi->gd_fbwidth * 1; /* frame buffer pitch */ 424 buf[6] = 1; /* frame buffer depth */ 425 gsp_write(ba, buf, 7); 426 427 return(1); 428 } 429 430 int ul_mode(struct grf_softc *, u_long, void *, u_long, int); 431 432 void grfulattach(struct device *, struct device *, void *); 433 int grfulprint(void *, const char *); 434 int grfulmatch(struct device *, struct cfdata *, void *); 435 436 CFATTACH_DECL(grful, sizeof(struct grf_ul_softc), 437 grfulmatch, grfulattach, NULL, NULL); 438 439 /* 440 * only used in console init 441 */ 442 static struct cfdata *cfdata; 443 444 /* 445 * we make sure to only init things once. this is somewhat 446 * tricky regarding the console. 447 */ 448 int 449 grfulmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 450 { 451 #ifdef ULOWELLCONSOLE 452 static int ulconunit = -1; 453 #endif 454 struct zbus_args *zap; 455 456 zap = auxp; 457 458 /* 459 * allow only one ulowell console 460 */ 461 if (amiga_realconfig == 0) 462 #ifdef ULOWELLCONSOLE 463 if (ulconunit != -1) 464 #endif 465 return(0); 466 467 if (zap->manid != 1030 || zap->prodid != 0) 468 return(0); 469 470 #ifdef ULOWELLCONSOLE 471 if (amiga_realconfig == 0 || ulconunit != cfp->cf_unit) { 472 #endif 473 if ((unsigned)ulowell_default_mon > ulowell_mon_max) 474 ulowell_default_mon = 1; 475 476 current_mon = ul_monitor_defs + ulowell_default_mon - 1; 477 if (ulowell_alive(current_mon) == 0) 478 return(0); 479 #ifdef ULOWELLCONSOLE 480 if (amiga_realconfig == 0) { 481 ulconunit = cfp->cf_unit; 482 cfdata = cfp; 483 } 484 } 485 #endif 486 return(1); 487 } 488 489 /* 490 * attach to the grfbus (zbus) 491 */ 492 void 493 grfulattach(struct device *pdp, struct device *dp, void *auxp) 494 { 495 static struct grf_ul_softc congrf; 496 struct zbus_args *zap; 497 struct grf_softc *gp; 498 struct grf_ul_softc *gup; 499 500 zap = auxp; 501 502 if (dp == NULL) 503 gup = &congrf; 504 else 505 gup = (struct grf_ul_softc *)dp; 506 507 gp = &gup->gus_sc; 508 509 if (dp != NULL && congrf.gus_sc.g_regkva != 0) { 510 /* 511 * inited earlier, just copy (not device struct) 512 */ 513 memcpy(&gp->g_display, &congrf.gus_sc.g_display, 514 (char *)&gup->gus_isr - (char *)&gp->g_display); 515 516 /* ...and transfer the isr */ 517 gup->gus_isr.isr_ipl = 2; 518 gup->gus_isr.isr_intr = ulisr; 519 gup->gus_isr.isr_arg = (void *)gp; 520 /* 521 * To make sure ints are always catched, first add new isr 522 * then remove old: 523 */ 524 add_isr(&gup->gus_isr); 525 remove_isr(&congrf.gus_isr); 526 } else { 527 gp->g_regkva = (void *)zap->va; 528 gp->g_fbkva = NULL; 529 gp->g_unit = GRF_ULOWELL_UNIT; 530 gp->g_flags = GF_ALIVE; 531 gp->g_mode = ul_mode; 532 gp->g_conpri = grful_cnprobe(); 533 gp->g_data = NULL; 534 535 gup->gus_isr.isr_ipl = 2; 536 gup->gus_isr.isr_intr = ulisr; 537 gup->gus_isr.isr_arg = (void *)gp; 538 add_isr(&gup->gus_isr); 539 540 (void)ul_load_code(gp); 541 (void)ul_load_mon(gp, current_mon); 542 grful_iteinit(gp); 543 } 544 if (dp != NULL) 545 printf("\n"); 546 /* 547 * attach grf 548 */ 549 amiga_config_found(cfdata, &gp->g_device, gp, grfulprint); 550 } 551 552 int 553 grfulprint(void *auxp, const char *pnp) 554 { 555 if (pnp) 556 aprint_normal("grf%d at %s", ((struct grf_softc *)auxp)->g_unit, 557 pnp); 558 return(UNCONF); 559 } 560 561 static int 562 ul_getvmode (struct grf_softc *gp, struct grfvideo_mode *vm) 563 { 564 struct grfvideo_mode *md; 565 566 if (vm->mode_num && vm->mode_num > ulowell_mon_max) 567 return EINVAL; 568 569 if (! vm->mode_num) 570 vm->mode_num = current_mon - ul_monitor_defs + 1; 571 572 md = ul_monitor_defs + vm->mode_num - 1; 573 strncpy (vm->mode_descr, md->mode_descr, 574 sizeof (vm->mode_descr)); 575 576 /* XXX should tell TMS to measure it */ 577 vm->pixel_clock = md->pixel_clock; 578 vm->disp_width = md->disp_width; 579 vm->disp_height = md->disp_height; 580 vm->depth = md->depth; 581 582 vm->hblank_start = md->hblank_start; 583 vm->hsync_start = md->hsync_start; 584 vm->hsync_stop = md->hsync_stop; 585 vm->htotal = md->htotal; 586 587 vm->vblank_start = md->vblank_start; 588 vm->vsync_start = md->vsync_start; 589 vm->vsync_stop = md->vsync_stop; 590 vm->vtotal = md->vtotal; 591 592 vm->disp_flags = md->disp_flags; 593 return 0; 594 } 595 596 597 static int 598 ul_setvmode (struct grf_softc *gp, unsigned mode) 599 { 600 struct grf_ul_softc *gup; 601 volatile struct gspregs *ba; 602 int error; 603 604 if (!mode || mode > ulowell_mon_max) 605 return EINVAL; 606 607 ba = (volatile struct gspregs *)gp->g_regkva; 608 gup = (struct grf_ul_softc *)gp; 609 current_mon = ul_monitor_defs + mode - 1; 610 611 error = ul_load_mon (gp, current_mon) ? 0 : EINVAL; 612 613 return error; 614 } 615 616 /* 617 * Set the frame buffer or overlay planes on or off. 618 * Always succeeds. 619 */ 620 621 static inline void 622 ul_setfb(struct grf_softc *gp, u_long cmd) 623 { 624 struct grf_ul_softc *gup; 625 volatile struct gspregs *ba; 626 627 gup = (struct grf_ul_softc *)gp; 628 629 ba = (volatile struct gspregs *)gp->g_regkva; 630 ba->ctrl = LBL; 631 ba->hstadrh = 0xfe80; 632 ba->hstadrl = 0x0000; 633 ba->data = 6; 634 ba->hstadrl = 0x0020; 635 636 switch (cmd) { 637 case GM_GRFON: 638 gup->gus_ovslct |= 0x40; 639 break; 640 case GM_GRFOFF: 641 gup->gus_ovslct &= ~0x40; 642 break; 643 case GM_GRFOVON: 644 gup->gus_ovslct |= 3; 645 break; 646 case GM_GRFOVOFF: 647 gup->gus_ovslct &= ~3; 648 break; 649 } 650 ba->data = gup->gus_ovslct; 651 } 652 653 /* 654 * Change the mode of the display. 655 * Return a UNIX error number or 0 for success. 656 */ 657 int 658 ul_mode(struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 659 { 660 int i; 661 struct grfdyninfo *gd; 662 663 switch (cmd) { 664 case GM_GRFON: 665 case GM_GRFOFF: 666 case GM_GRFOVON: 667 case GM_GRFOVOFF: 668 ul_setfb (gp, cmd); 669 return 0; 670 671 case GM_GRFCONFIG: 672 gd = (struct grfdyninfo *)arg; 673 for (i=0; i<ulowell_mon_max; ++i) { 674 if (ul_monitor_defs[i].disp_width == gd->gdi_dwidth && 675 ul_monitor_defs[i].disp_height == gd->gdi_dheight) 676 return ul_setvmode(gp, i+1); 677 } 678 return EINVAL; 679 680 case GM_GRFGETVMODE: 681 return ul_getvmode (gp, (struct grfvideo_mode *) arg); 682 683 case GM_GRFSETVMODE: 684 return ul_setvmode (gp, *(unsigned *) arg); 685 686 case GM_GRFGETNUMVM: 687 *(int *)arg = ulowell_mon_max; 688 return 0; 689 690 case GM_GRFIOCTL: 691 return ul_ioctl (gp, a2, arg, (dev_t)a3); 692 693 default: 694 break; 695 } 696 697 return EPASSTHROUGH; 698 } 699 700 int 701 ul_ioctl (register struct grf_softc *gp, u_long cmd, void *data, dev_t dev) 702 { 703 switch (cmd) { 704 #if 0 705 /* 706 * XXX we have no hardware sprites, but might implement them 707 * later in TMS code. 708 */ 709 710 case GRFIOCGSPRITEPOS: 711 return ul_getspritepos (gp, (struct grf_position *) data); 712 713 case GRFIOCSSPRITEPOS: 714 return ul_setspritepos (gp, (struct grf_position *) data); 715 716 case GRFIOCSSPRITEINF: 717 return ul_setspriteinfo (gp, (struct grf_spriteinfo *) data); 718 719 case GRFIOCGSPRITEINF: 720 return ul_getspriteinfo (gp, (struct grf_spriteinfo *) data); 721 722 case GRFIOCGSPRITEMAX: 723 return ul_getspritemax (gp, (struct grf_position *) data); 724 725 #endif 726 727 case GRFIOCGETCMAP: 728 return ul_getcmap (gp, (struct grf_colormap *) data, dev); 729 730 case GRFIOCPUTCMAP: 731 return ul_putcmap (gp, (struct grf_colormap *) data, dev); 732 733 case GRFIOCBITBLT: 734 return ul_bitblt (gp, (struct grf_bitblt *) data, dev); 735 736 case GRFIOCBLANK: 737 return ul_blank (gp, (int *) data, dev); 738 } 739 740 return EPASSTHROUGH; 741 } 742 743 int 744 ul_getcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 745 { 746 struct grf_ul_softc *gup; 747 u_int8_t *mymap; 748 int mxidx, error; 749 750 gup = (struct grf_ul_softc *)gp; 751 752 if (minor(dev) & GRFIMDEV) { 753 mxidx = 256; 754 mymap = gup->gus_imcmap; 755 } else { 756 mxidx = 4; 757 mymap = gup->gus_ovcmap; 758 } 759 760 if (cmap->count == 0 || cmap->index >= mxidx) 761 return 0; 762 763 if (cmap->count > mxidx - cmap->index) 764 cmap->count = mxidx - cmap->index; 765 766 /* just copyout from the shadow color map */ 767 768 if ((error = copyout(mymap + cmap->index, cmap->red, cmap->count)) 769 770 || (error = copyout(mymap + mxidx + cmap->index, cmap->green, 771 cmap->count)) 772 773 || (error = copyout(mymap + mxidx * 2 + cmap->index, cmap->blue, 774 cmap->count))) 775 776 return(error); 777 778 return(0); 779 } 780 781 int 782 ul_putcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 783 { 784 struct grf_ul_softc *gup; 785 volatile struct gspregs *ba; 786 u_int16_t cmd[8]; 787 int x, mxidx, error; 788 u_int8_t *mymap; 789 790 gup = (struct grf_ul_softc *)gp; 791 792 if (minor(dev) & GRFIMDEV) { 793 mxidx = 256; 794 mymap = gup->gus_imcmap; 795 } else { 796 mxidx = 4; 797 mymap = gup->gus_ovcmap; 798 } 799 800 if (cmap->count == 0 || cmap->index >= mxidx) 801 return 0; 802 803 if (cmap->count > mxidx - cmap->index) 804 cmap->count = mxidx - cmap->index; 805 806 /* first copyin to our shadow color map */ 807 808 if ((error = copyin(cmap->red, mymap + cmap->index, cmap->count)) 809 810 || (error = copyin(cmap->green, mymap + cmap->index + mxidx, 811 cmap->count)) 812 813 || (error = copyin(cmap->blue, mymap + cmap->index + mxidx*2, 814 cmap->count))) 815 816 return error; 817 818 819 /* then write from there to the hardware */ 820 ba = (volatile struct gspregs *)gp->g_regkva; 821 /* 822 * XXX This is a bad thing to do. 823 * We should always use the gsp call, or have a means to arbitrate 824 * the usage of the BT458 index register. Else there might be a 825 * race condition (when writing both colormaps at nearly the same 826 * time), where one CPU changes the index register when the other 827 * one has not finished using it. 828 */ 829 if (mxidx > 4) { 830 /* image color map: we can write, with a hack, directly */ 831 ba->ctrl = LBL; 832 ba->hstadrh = 0xfe80; 833 ba->hstadrl = 0x0000; 834 ba->ctrl |= INCW; 835 ba->data = cmap->index; 836 ba->ctrl &= ~INCW; 837 838 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 839 ba->data = (u_int16_t) mymap[x]; 840 ba->data = (u_int16_t) mymap[x + mxidx]; 841 ba->data = (u_int16_t) mymap[x + mxidx * 2]; 842 } 843 } else { 844 845 /* overlay planes color map: have to call tms to do it */ 846 cmd[0] = GCMD_CMAP; 847 cmd[1] = 1; 848 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 849 cmd[2] = x; 850 cmd[3] = mymap[x]; 851 cmd[4] = mymap[x + mxidx]; 852 cmd[5] = mymap[x + mxidx * 2]; 853 gsp_write(ba, cmd, 6); 854 } 855 } 856 return 0; 857 } 858 859 int 860 ul_blank(struct grf_softc *gp, int *onoff, dev_t dev) 861 { 862 volatile struct gspregs *gsp; 863 864 gsp = (volatile struct gspregs *)gp->g_regkva; 865 gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL; 866 gsp->hstadrh = 0xC000; 867 gsp->hstadrl = 0x0080; 868 if (*onoff > 0) 869 gsp->data |= 0x9000; 870 else 871 gsp->data &= ~0x9000; 872 873 return 0; 874 } 875 /* 876 * !!! THIS AREA UNDER CONSTRUCTION !!! 877 */ 878 int ul_BltOpMap[16] = { 879 3, 1, 2, 0, 11, 9, 10, 8, 880 7, 5, 6, 4, 15, 13, 14, 12 881 }; 882 883 int 884 ul_bitblt (struct grf_softc *gp, struct grf_bitblt *bb, dev_t dev) 885 { 886 /* XXX not yet implemented, but pretty trivial */ 887 return EPASSTHROUGH; 888 } 889 890 void 891 gsp_write(volatile struct gspregs *gsp, u_short *ptr, size_t size) 892 { 893 u_short put, new_put, next, oc; 894 u_long put_hi, oa; 895 size_t n; 896 897 if (size == 0 || size > 8) 898 return; 899 900 n = size; 901 902 oc = gsp->ctrl; 903 oa = GSPGETHADRS(gsp); 904 905 gsp->ctrl = (oc & ~INCR) | LBL | INCW; 906 GSPSETHADRS(gsp, GSP_MODE_ADRS); 907 gsp->data &= ~GMODE_FLUSH; 908 909 GSPSETHADRS(gsp, PUT_HI_PTR_ADRS); 910 put_hi = gsp->data << 16; 911 912 GSPSETHADRS(gsp, PUT_PTR_ADRS); 913 put = gsp->data; 914 new_put = put + (8<<4); 915 916 GSPSETHADRS(gsp, GET_PTR_ADRS); 917 next = gsp->data; 918 919 while (next == new_put) { 920 /* 921 * we should use an intr. here. unfortunately, we already 922 * are called from an interrupt and can't use tsleep. 923 * so we do busy waiting, at least for the moment. 924 */ 925 926 GSPSETHADRS(gsp,GET_PTR_ADRS); 927 next = gsp->data; 928 } 929 930 GSPSETHADRS(gsp,put|put_hi); 931 gsp->data = *ptr++ | 8<<4; 932 while ( --n > 0) { 933 gsp->data = *ptr++; 934 } 935 936 GSPSETHADRS(gsp,PUT_PTR_ADRS); 937 gsp->data = new_put; 938 GSPSETHADRS(gsp,oa); 939 gsp->ctrl = oc; 940 941 return; 942 } 943 944 #endif /* NGRF */ 945