xref: /netbsd/sys/arch/amiga/dev/ivsc.c (revision c4a72b64)
1 /*	$NetBSD: ivsc.c,v 1.32 2002/10/02 04:55:52 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1994 Michael L. Hitch
5  * Copyright (c) 1982, 1990 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by the University of
19  *	California, Berkeley and its contributors.
20  * 4. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *	@(#)ivsdma.c
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: ivsc.c,v 1.32 2002/10/02 04:55:52 thorpej Exp $");
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/device.h>
46 #include <dev/scsipi/scsi_all.h>
47 #include <dev/scsipi/scsipi_all.h>
48 #include <dev/scsipi/scsiconf.h>
49 #include <amiga/amiga/custom.h>
50 #include <amiga/amiga/device.h>
51 #include <amiga/amiga/isr.h>
52 #include <amiga/dev/scireg.h>
53 #include <amiga/dev/scivar.h>
54 #include <amiga/dev/zbusvar.h>
55 
56 void ivscattach(struct device *, struct device *, void *);
57 int ivscmatch(struct device *, struct cfdata *, void *);
58 
59 int ivsc_intr(void *);
60 int ivsc_dma_xfer_in(struct sci_softc *dev, int len,
61     register u_char *buf, int phase);
62 int ivsc_dma_xfer_out(struct sci_softc *dev, int len,
63     register u_char *buf, int phase);
64 
65 
66 #ifdef DEBUG
67 extern int sci_debug;
68 #define QPRINTF(a) if (sci_debug > 1) printf a
69 #else
70 #define QPRINTF(a)
71 #endif
72 
73 extern int sci_data_wait;
74 
75 int ivsdma_pseudo = 1;		/* 0=off, 1=on */
76 
77 CFATTACH_DECL(ivsc, sizeof(struct sci_softc),
78     ivscmatch, ivscattach, NULL, NULL);
79 
80 /*
81  * if this is an IVS board
82  */
83 int
84 ivscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
85 {
86 	struct zbus_args *zap;
87 
88 	zap = auxp;
89 
90 	/*
91 	 * Check manufacturer and product id.
92 	 */
93 	if (zap->manid != 2112 ||	/* If manufacturer is IVS */
94 	    (zap->prodid != 48 &&	/*   product = Trumpcard 500 */
95 	    zap->prodid != 52 &&	/*   product = Trumpcard */
96 	    zap->prodid != 243))	/*   product = Vector SCSI */
97 		return(0);		/* didn't match */
98 	return(1);
99 }
100 
101 void
102 ivscattach(struct device *pdp, struct device *dp, void *auxp)
103 {
104 	volatile u_char *rp;
105 	struct sci_softc *sc = (struct sci_softc *)dp;
106 	struct zbus_args *zap;
107 	struct scsipi_adapter *adapt = &sc->sc_adapter;
108 	struct scsipi_channel *chan = &sc->sc_channel;
109 
110 	printf("\n");
111 
112 	zap = auxp;
113 
114 	rp = (u_char *)zap->va + 0x40;
115 	sc->sci_data = rp;
116 	sc->sci_odata = rp;
117 	sc->sci_icmd = rp + 2;
118 	sc->sci_mode = rp + 4;
119 	sc->sci_tcmd = rp + 6;
120 	sc->sci_bus_csr = rp + 8;
121 	sc->sci_sel_enb = rp + 8;
122 	sc->sci_csr = rp + 10;
123 	sc->sci_dma_send = rp + 10;
124 	sc->sci_idata = rp + 12;
125 	sc->sci_trecv = rp + 12;
126 	sc->sci_iack = rp + 14;
127 	sc->sci_irecv = rp + 14;
128 
129 	if (ivsdma_pseudo == 1) {
130 		sc->dma_xfer_in = ivsc_dma_xfer_in;
131 		sc->dma_xfer_out = ivsc_dma_xfer_out;
132 	}
133 
134 	sc->sc_isr.isr_intr = ivsc_intr;
135 	sc->sc_isr.isr_arg = sc;
136 	sc->sc_isr.isr_ipl = 2;
137 	add_isr(&sc->sc_isr);
138 
139 	scireset(sc);
140 
141 	/*
142 	 * Fill in the scsipi_adapter.
143 	 */
144 	memset(adapt, 0, sizeof(*adapt));
145 	adapt->adapt_dev = &sc->sc_dev;
146 	adapt->adapt_nchannels = 1;
147 	adapt->adapt_openings = 7;
148 	adapt->adapt_max_periph = 1;
149 	adapt->adapt_request = sci_scsipi_request;
150 	adapt->adapt_minphys = sci_minphys;
151 
152 	/*
153 	 * Fill in the scsipi_channel.
154 	 */
155 	memset(chan, 0, sizeof(*chan));
156 	chan->chan_adapter = adapt;
157 	chan->chan_bustype = &scsi_bustype;
158 	chan->chan_channel = 0;
159 	chan->chan_ntargets = 8;
160 	chan->chan_nluns = 8;
161 	chan->chan_id = 7;
162 
163 	/*
164 	 * attach all scsi units on us
165 	 */
166 	config_found(dp, chan, scsiprint);
167 }
168 
169 int
170 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
171                  int phase)
172 {
173 	int wait = sci_data_wait;
174 	volatile register u_char *sci_dma = dev->sci_idata + 0x20;
175 	volatile register u_char *sci_csr = dev->sci_csr;
176 #ifdef DEBUG
177 	u_char *obp = buf;
178 #endif
179 
180 	QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
181 
182 	*dev->sci_tcmd = phase;
183 	*dev->sci_mode |= SCI_MODE_DMA;
184 	*dev->sci_irecv = 0;
185 
186 	while (len >= 128) {
187 		wait = sci_data_wait;
188 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
189 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
190 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
191 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
192 			  || --wait < 0) {
193 #ifdef DEBUG
194 				if (sci_debug)
195 					printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
196 					len, *dev->sci_bus_csr, wait);
197 #endif
198 				*dev->sci_mode &= ~SCI_MODE_DMA;
199 				return 0;
200 			}
201 		}
202 
203 #define	R1	(*buf++ = *sci_dma)
204 		R1; R1; R1; R1; R1; R1; R1; R1;
205 		R1; R1; R1; R1; R1; R1; R1; R1;
206 		R1; R1; R1; R1; R1; R1; R1; R1;
207 		R1; R1; R1; R1; R1; R1; R1; R1;
208 		R1; R1; R1; R1; R1; R1; R1; R1;
209 		R1; R1; R1; R1; R1; R1; R1; R1;
210 		R1; R1; R1; R1; R1; R1; R1; R1;
211 		R1; R1; R1; R1; R1; R1; R1; R1;
212 		R1; R1; R1; R1; R1; R1; R1; R1;
213 		R1; R1; R1; R1; R1; R1; R1; R1;
214 		R1; R1; R1; R1; R1; R1; R1; R1;
215 		R1; R1; R1; R1; R1; R1; R1; R1;
216 		R1; R1; R1; R1; R1; R1; R1; R1;
217 		R1; R1; R1; R1; R1; R1; R1; R1;
218 		R1; R1; R1; R1; R1; R1; R1; R1;
219 		R1; R1; R1; R1; R1; R1; R1; R1;
220 		len -= 128;
221 	}
222 
223   	while (len > 0) {
224 		wait = sci_data_wait;
225 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
226 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
227 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
228 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
229 			  || --wait < 0) {
230 #ifdef DEBUG
231 				if (sci_debug)
232 					printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
233 					len, *dev->sci_bus_csr, wait);
234 #endif
235 				*dev->sci_mode &= ~SCI_MODE_DMA;
236 				return 0;
237 			}
238 		}
239 
240 		*buf++ = *sci_dma;
241 		len--;
242 	}
243 
244 	QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
245 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
246 	  obp[6], obp[7], obp[8], obp[9]));
247 
248 	*dev->sci_mode &= ~SCI_MODE_DMA;
249 	return 0;
250 }
251 
252 int
253 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
254                   int phase)
255 {
256 	int wait = sci_data_wait;
257 	volatile register u_char *sci_dma = dev->sci_data + 0x20;
258 	volatile register u_char *sci_csr = dev->sci_csr;
259 
260 	QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
261 
262 	QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
263   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
264 	 buf[6], buf[7], buf[8], buf[9]));
265 
266 	*dev->sci_tcmd = phase;
267 	*dev->sci_mode |= SCI_MODE_DMA;
268 	*dev->sci_icmd |= SCI_ICMD_DATA;
269 	*dev->sci_dma_send = 0;
270 	while (len > 0) {
271 		wait = sci_data_wait;
272 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
273 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
274 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
275 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
276 			  || --wait < 0) {
277 #ifdef DEBUG
278 				if (sci_debug)
279 					printf("ivsc_dma_out fail: l%d i%x w%d\n",
280 					len, *dev->sci_bus_csr, wait);
281 #endif
282 				*dev->sci_mode &= ~SCI_MODE_DMA;
283 				return 0;
284 			}
285 		}
286 
287 		*sci_dma = *buf++;
288 		len--;
289 	}
290 
291 	wait = sci_data_wait;
292 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
293 	  SCI_CSR_PHASE_MATCH && --wait);
294 
295 
296 	*dev->sci_mode &= ~SCI_MODE_DMA;
297 	return 0;
298 }
299 
300 int
301 ivsc_intr(void *arg)
302 {
303 	struct sci_softc *dev = arg;
304 	u_char stat;
305 
306 	if ((*dev->sci_csr & SCI_CSR_INT) == 0)
307 		return(0);
308 	stat = *dev->sci_iack;
309 	/* XXXX is: something is missing here, at least a: */
310 	return(1);
311 }
312