1 /* $NetBSD: otgsc.c,v 1.28 2002/10/02 04:55:52 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)csa12gdma.c 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: otgsc.c,v 1.28 2002/10/02 04:55:52 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <dev/scsipi/scsi_all.h> 47 #include <dev/scsipi/scsipi_all.h> 48 #include <dev/scsipi/scsiconf.h> 49 #include <amiga/amiga/device.h> 50 #include <amiga/amiga/isr.h> 51 #include <amiga/dev/scireg.h> 52 #include <amiga/dev/scivar.h> 53 #include <amiga/dev/zbusvar.h> 54 55 void otgscattach(struct device *, struct device *, void *); 56 int otgscmatch(struct device *, struct cfdata *, void *); 57 58 int otgsc_dma_xfer_in(struct sci_softc *dev, int len, 59 register u_char *buf, int phase); 60 int otgsc_dma_xfer_out(struct sci_softc *dev, int len, 61 register u_char *buf, int phase); 62 int otgsc_intr(void *); 63 64 65 #ifdef DEBUG 66 extern int sci_debug; 67 #define QPRINTF(a) if (sci_debug > 1) printf a 68 #else 69 #define QPRINTF(a) 70 #endif 71 72 extern int sci_data_wait; 73 74 CFATTACH_DECL(otgsc, sizeof(struct sci_softc), 75 otgscmatch, otgscattach, NULL, NULL); 76 77 /* 78 * if we are my Hacker's SCSI board we are here. 79 */ 80 int 81 otgscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 82 { 83 struct zbus_args *zap; 84 85 zap = auxp; 86 87 /* 88 * Check manufacturer and product id. 89 */ 90 if (zap->manid == 1058 && zap->prodid == 21) 91 return(1); 92 else 93 return(0); 94 } 95 96 void 97 otgscattach(struct device *pdp, struct device *dp, void *auxp) 98 { 99 volatile u_char *rp; 100 struct sci_softc *sc = (struct sci_softc *)dp; 101 struct zbus_args *zap; 102 struct scsipi_adapter *adapt = &sc->sc_adapter; 103 struct scsipi_channel *chan = &sc->sc_channel; 104 105 printf("\n"); 106 107 zap = auxp; 108 109 sc = (struct sci_softc *)dp; 110 rp = (u_char *)zap->va + 0x2000; 111 sc->sci_data = rp; 112 sc->sci_odata = rp; 113 sc->sci_icmd = rp + 0x10; 114 sc->sci_mode = rp + 0x20; 115 sc->sci_tcmd = rp + 0x30; 116 sc->sci_bus_csr = rp + 0x40; 117 sc->sci_sel_enb = rp + 0x40; 118 sc->sci_csr = rp + 0x50; 119 sc->sci_dma_send = rp + 0x50; 120 sc->sci_idata = rp + 0x60; 121 sc->sci_trecv = rp + 0x60; 122 sc->sci_iack = rp + 0x70; 123 sc->sci_irecv = rp + 0x70; 124 125 sc->dma_xfer_in = otgsc_dma_xfer_in; 126 sc->dma_xfer_out = otgsc_dma_xfer_out; 127 128 sc->sc_isr.isr_intr = otgsc_intr; 129 sc->sc_isr.isr_arg = sc; 130 sc->sc_isr.isr_ipl = 2; 131 add_isr(&sc->sc_isr); 132 133 scireset(sc); 134 135 /* 136 * Fill in the scsipi_adapter. 137 */ 138 memset(adapt, 0, sizeof(*adapt)); 139 adapt->adapt_dev = &sc->sc_dev; 140 adapt->adapt_nchannels = 1; 141 adapt->adapt_openings = 7; 142 adapt->adapt_max_periph = 1; 143 adapt->adapt_request = sci_scsipi_request; 144 adapt->adapt_minphys = sci_minphys; 145 146 /* 147 * Fill in the scsipi_channel. 148 */ 149 memset(chan, 0, sizeof(*chan)); 150 chan->chan_adapter = adapt; 151 chan->chan_bustype = &scsi_bustype; 152 chan->chan_channel = 0; 153 chan->chan_ntargets = 8; 154 chan->chan_nluns = 8; 155 chan->chan_id = 7; 156 157 /* 158 * attach all scsi units on us 159 */ 160 config_found(dp, chan, scsiprint); 161 } 162 163 int 164 otgsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 165 int phase) 166 { 167 int wait = sci_data_wait; 168 volatile register u_char *sci_dma = dev->sci_data + 0x100; 169 volatile register u_char *sci_csr = dev->sci_csr; 170 #ifdef DEBUG 171 u_char *obp = buf; 172 #endif 173 174 QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 175 176 *dev->sci_tcmd = phase; 177 *dev->sci_mode |= SCI_MODE_DMA; 178 *dev->sci_icmd = 0; 179 *dev->sci_irecv = 0; 180 while (len > 0) { 181 wait = sci_data_wait; 182 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 183 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 184 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 185 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 186 || --wait < 0) { 187 #ifdef DEBUG 188 if (sci_debug) 189 printf("otgsc_dma_in fail: l%d i%x w%d\n", 190 len, *dev->sci_bus_csr, wait); 191 #endif 192 *dev->sci_mode &= ~SCI_MODE_DMA; 193 return 0; 194 } 195 } 196 197 *buf++ = *sci_dma; 198 len--; 199 } 200 201 QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 202 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 203 obp[6], obp[7], obp[8], obp[9])); 204 205 *dev->sci_mode &= ~SCI_MODE_DMA; 206 return 0; 207 } 208 209 int 210 otgsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 211 int phase) 212 { 213 int wait = sci_data_wait; 214 volatile register u_char *sci_dma = dev->sci_data + 0x100; 215 volatile register u_char *sci_csr = dev->sci_csr; 216 217 QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 218 219 QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 220 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 221 buf[6], buf[7], buf[8], buf[9])); 222 223 *dev->sci_tcmd = phase; 224 *dev->sci_mode |= SCI_MODE_DMA; 225 *dev->sci_icmd = SCI_ICMD_DATA; 226 *dev->sci_dma_send = 0; 227 while (len > 0) { 228 wait = sci_data_wait; 229 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 230 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 231 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 232 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 233 || --wait < 0) { 234 #ifdef DEBUG 235 if (sci_debug) 236 printf("otgsc_dma_out fail: l%d i%x w%d\n", 237 len, *dev->sci_bus_csr, wait); 238 #endif 239 *dev->sci_mode &= ~SCI_MODE_DMA; 240 return 0; 241 } 242 } 243 244 *sci_dma = *buf++; 245 len--; 246 } 247 248 wait = sci_data_wait; 249 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 250 SCI_CSR_PHASE_MATCH && --wait); 251 252 253 *dev->sci_mode &= ~SCI_MODE_DMA; 254 return 0; 255 } 256 257 int 258 otgsc_intr(void *arg) 259 { 260 struct sci_softc *dev = arg; 261 u_char stat; 262 263 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 264 return (1); 265 stat = *dev->sci_iack; 266 *dev->sci_mode = 0; 267 return (1); 268 } 269