1 /* $NetBSD: c_isa.c,v 1.1 2001/06/13 15:27:17 soda Exp $ */ 2 /* $OpenBSD: isabus.c,v 1.15 1998/03/16 09:38:46 pefo Exp $ */ 3 4 /*- 5 * Copyright (c) 1995 Per Fogelstrom 6 * Copyright (c) 1993, 1994 Charles M. Hannum. 7 * Copyright (c) 1990 The Regents of the University of California. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * William Jolitz and Don Ahn. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)isa.c 7.2 (Berkeley) 5/12/91 42 */ 43 /* 44 * Mach Operating System 45 * Copyright (c) 1991,1990,1989 Carnegie Mellon University 46 * All Rights Reserved. 47 * 48 * Permission to use, copy, modify and distribute this software and its 49 * documentation is hereby granted, provided that both the copyright 50 * notice and this permission notice appear in all copies of the 51 * software, derivative works or modified versions, and any portions 52 * thereof, and that both notices appear in supporting documentation. 53 * 54 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 55 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 56 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 57 * 58 * Carnegie Mellon requests users of this software to return to 59 * 60 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 61 * School of Computer Science 62 * Carnegie Mellon University 63 * Pittsburgh PA 15213-3890 64 * 65 * any improvements or extensions that they make and grant Carnegie Mellon 66 * the rights to redistribute these changes. 67 */ 68 /* 69 Copyright 1988, 1989 by Intel Corporation, Santa Clara, California. 70 71 All Rights Reserved 72 73 Permission to use, copy, modify, and distribute this software and 74 its documentation for any purpose and without fee is hereby 75 granted, provided that the above copyright notice appears in all 76 copies and that both the copyright notice and this permission notice 77 appear in supporting documentation, and that the name of Intel 78 not be used in advertising or publicity pertaining to distribution 79 of the software without specific, written prior permission. 80 81 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 82 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, 83 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 84 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 85 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 86 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 87 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 88 */ 89 90 /* 91 * for "DESKTECH-ARCStation I" and DESKTECH-TYNE 92 */ 93 94 #include <sys/param.h> 95 #include <sys/systm.h> 96 #include <sys/device.h> 97 98 #include <machine/autoconf.h> 99 #include <machine/pio.h> 100 #include <machine/platform.h> 101 102 #include <dev/isa/isareg.h> 103 #include <dev/isa/isavar.h> 104 105 #include <arc/isa/mcclock_isavar.h> 106 #include <arc/isa/timer_isavar.h> 107 #include <arc/isa/isabrvar.h> 108 109 #include "pc.h" 110 #if NPC_ISA > 0 111 #include <arc/isa/pccons_isavar.h> 112 #endif 113 114 #include "vga_isa.h" 115 #if NVGA_ISA > 0 116 #include <dev/ic/mc6845reg.h> 117 #include <dev/ic/pcdisplayvar.h> 118 #include <dev/isa/vga_isavar.h> 119 #endif 120 121 #include "pckbc.h" 122 #if NPCKBC > 0 123 #include <dev/ic/pckbcvar.h> 124 #endif 125 126 #include "com.h" 127 #if NCOM > 0 128 #include <sys/termios.h> 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #endif 132 133 /* 134 * chipset-dependent isa bus configuration 135 */ 136 137 int isabr_dti_intr_status __P((void)); 138 139 struct isabr_config isabr_dti_conf = { 140 isabr_dti_intr_status, 141 }; 142 143 int 144 isabr_dti_intr_status() 145 { 146 int isa_vector; 147 char vector; 148 149 isa_outb(IO_ICU1, 0x0f); /* Poll */ 150 vector = isa_inb(IO_ICU1); 151 if (vector < 0) /* XXX: OpenBSD source had a bug, re-look this */ 152 return (-1); 153 isa_vector = vector & 7; 154 if (isa_vector == 2) { 155 isa_outb(IO_ICU2, 0x0f); 156 vector = isa_inb(IO_ICU2); 157 if (vector > 0) { 158 printf("isa: spurious interrupt.\n"); 159 return (-1); 160 } 161 isa_vector = (vector & 7) | 8; 162 } 163 return (isa_vector); 164 } 165 166 /* 167 * common configuration for DTI platforms 168 */ 169 void 170 c_isa_init() 171 { 172 /* chipset-dependent mcclock configuration */ 173 mcclock_isa_conf = 1; 174 175 /* chipset-dependent timer configuration */ 176 timer_isa_conf = 1; 177 178 /* chipset-dependent isa bus configuration */ 179 isabr_conf = &isabr_dti_conf; 180 } 181 182 /* 183 * console initialization 184 */ 185 void 186 c_isa_cons_init() 187 { 188 if (!com_console) { 189 #if NVGA_ISA > 0 190 if (vga_isa_cnattach(&arc_bus_io, &arc_bus_mem) == 0) { 191 #if NPCKBC > 0 192 pckbc_cnattach(&arc_bus_io, IO_KBD, KBCMDP, 193 PCKBC_KBD_SLOT); 194 return; 195 #endif 196 } 197 #endif 198 #if NPC_ISA > 0 199 if (pccons_isa_cnattach(&arc_bus_io, &arc_bus_mem) == 0) 200 return; 201 #endif 202 } 203 204 #if NCOM > 0 205 if (com_console_address == 0) 206 com_console_address = IO_COM1; 207 comcnattach(&arc_bus_io, com_console_address, 208 com_console_speed, com_freq, com_console_mode); 209 #endif 210 } 211