1 /* $NetBSD: c_nec_eisa.c,v 1.3 2002/12/07 13:09:46 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (C) 2000 Shuichiro URATA. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * for NEC EISA generation machines. 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <uvm/uvm_extern.h> 37 38 #include <machine/autoconf.h> 39 #include <machine/pio.h> 40 #include <machine/platform.h> 41 #include <mips/pte.h> 42 43 #include <dev/isa/isavar.h> 44 45 #include <arc/arc/wired_map.h> 46 #include <arc/jazz/pica.h> 47 #include <arc/jazz/rd94.h> 48 #include <arc/jazz/jazziovar.h> 49 #include <arc/isa/isabrvar.h> 50 51 /* 52 * chipset-dependent isa bus configuration 53 */ 54 55 int isabr_nec_eisa_intr_status __P((void)); 56 57 struct isabr_config isabr_nec_eisa_conf = { 58 isabr_nec_eisa_intr_status, 59 }; 60 61 int 62 isabr_nec_eisa_intr_status() 63 { 64 return (in32(RD94_SYS_INTSTAT2) & (ICU_LEN - 1)); 65 } 66 67 /* 68 * chipset-dependent jazzio bus configuration 69 */ 70 71 void jazzio_nec_eisa_set_iointr_mask __P((int)); 72 73 struct jazzio_config jazzio_nec_eisa_conf = { 74 RD94_SYS_INTSTAT1, 75 jazzio_nec_eisa_set_iointr_mask, 76 RD94_SYS_TL_BASE, 77 RD94_SYS_DMA0_REGS, 78 }; 79 80 void 81 jazzio_nec_eisa_set_iointr_mask(mask) 82 int mask; 83 { 84 out16(RD94_SYS_LB_IE2, mask); 85 } 86 87 /* 88 * critial i/o space, interrupt, and other chipset related initialization. 89 */ 90 void 91 c_nec_eisa_init() 92 { 93 /* 94 * Initialize I/O address offset 95 */ 96 97 arc_bus_space_init(&jazzio_bus, "jazzio", 98 RD94_P_LOCAL_IO_BASE, RD94_V_LOCAL_IO_BASE, 99 RD94_V_LOCAL_IO_BASE, RD94_S_LOCAL_IO_BASE); 100 101 /* XXX - not really confirmed */ 102 arc_bus_space_init(&arc_bus_io, "r94eisaio", 103 RD94_P_PCI_IO, RD94_V_EISA_IO, 0, RD94_S_EISA_IO); 104 arc_bus_space_init(&arc_bus_mem, "r94eisamem", 105 RD94_P_PCI_MEM, RD94_V_EISA_MEM, 0, RD94_S_EISA_MEM); 106 107 /* 108 * Initialize wired TLB for I/O space which is used on early stage 109 */ 110 arc_enter_wired(RD94_V_LOCAL_IO_BASE, RD94_P_LOCAL_IO_BASE, 0, 111 MIPS3_PG_SIZE_256K); 112 arc_enter_wired(RD94_V_PCI_IO, RD94_P_PCI_IO, RD94_P_PCI_MEM, 113 MIPS3_PG_SIZE_16M); 114 115 /* 116 * Initialize interrupt priority 117 */ 118 splvec.splnet = MIPS_INT_MASK_SPL2; 119 splvec.splbio = MIPS_INT_MASK_SPL2; 120 splvec.splvm = MIPS_INT_MASK_SPL2; 121 splvec.spltty = MIPS_INT_MASK_SPL2; 122 splvec.splclock = MIPS_INT_MASK_SPL5; 123 splvec.splstatclock = MIPS_INT_MASK_SPL5; 124 125 /* 126 * Disable all interrupts. New masks will be set up 127 * during system configuration 128 */ 129 out16(RD94_SYS_LB_IE1, 0); 130 out16(RD94_SYS_LB_IE2, 0); 131 out32(RD94_SYS_EXT_IMASK, 0); 132 133 /* 134 * common configuration between NEC EISA and PCI platforms 135 */ 136 c_nec_jazz_init(); 137 138 /* common configuration for Magnum derived and NEC EISA machines */ 139 c_jazz_eisa_init(); 140 141 /* chipset-dependent isa bus configuration */ 142 isabr_conf = &isabr_nec_eisa_conf; 143 144 /* chipset-dependent jazzio bus configuration */ 145 jazzio_conf = &jazzio_nec_eisa_conf; 146 } 147