1 /* $NetBSD: c_nec_jazz.c,v 1.1 2001/06/13 15:21:52 soda Exp $ */ 2 3 /*- 4 * Copyright (C) 2000 Shuichiro URATA. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * for NEC EISA and NEC PCI platforms 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 37 #include <machine/autoconf.h> 38 #include <machine/pio.h> 39 #include <machine/platform.h> 40 41 #include <dev/isa/isavar.h> 42 43 #include <arc/jazz/rd94.h> 44 #include <arc/jazz/jazziovar.h> 45 #include <arc/dev/mcclockvar.h> 46 #include <arc/jazz/mcclock_jazziovar.h> 47 #include <arc/jazz/timer_jazziovar.h> 48 49 extern int cpu_int_mask; 50 51 /* 52 * chipset-dependent mcclock routines. 53 */ 54 55 u_int mc_nec_jazz_read __P((struct mcclock_softc *, u_int)); 56 void mc_nec_jazz_write __P((struct mcclock_softc *, u_int, u_int)); 57 58 struct mcclock_jazzio_config mcclock_nec_jazz_conf = { 59 0x80004000, 2, 60 { mc_nec_jazz_read, mc_nec_jazz_write } 61 }; 62 63 u_int 64 mc_nec_jazz_read(sc, reg) 65 struct mcclock_softc *sc; 66 u_int reg; 67 { 68 int i, as; 69 70 as = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 1) & 0x80; 71 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1, as | reg); 72 i = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0); 73 return (i); 74 } 75 76 void 77 mc_nec_jazz_write(sc, reg, datum) 78 struct mcclock_softc *sc; 79 u_int reg, datum; 80 { 81 int as; 82 83 as = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 1) & 0x80; 84 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1, as | reg); 85 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0, datum); 86 } 87 88 /* 89 * chipset-dependent timer routine. 90 */ 91 92 int timer_nec_jazz_intr __P((u_int, struct clockframe *)); 93 void timer_nec_jazz_init __P((int)); 94 95 struct timer_jazzio_config timer_nec_jazz_conf = { 96 MIPS_INT_MASK_3, 97 timer_nec_jazz_intr, 98 timer_nec_jazz_init, 99 }; 100 101 /* handle jazzio bus clock interrupt */ 102 int 103 timer_nec_jazz_intr(mask, cf) 104 u_int mask; 105 struct clockframe *cf; 106 { 107 int temp; 108 109 temp = in32(RD94_SYS_INTSTAT3); 110 hardclock(cf); 111 112 /* Re-enable clock interrupts */ 113 splx(MIPS_INT_MASK_3 | MIPS_SR_INT_IE); 114 115 return (~MIPS_INT_MASK_3); /* Keep clock interrupts enabled */ 116 } 117 118 void 119 timer_nec_jazz_init(interval) 120 int interval; /* milliseconds */ 121 { 122 if (interval <= 0) 123 panic("timer_nec_jazz_init: invalid interval %d", interval); 124 125 out32(RD94_SYS_IT_VALUE, interval - 1); 126 127 /* Enable periodic clock interrupt */ 128 out32(RD94_SYS_EXT_IMASK, cpu_int_mask); 129 } 130 131 /* 132 * chipset-dependent jazzio bus configuration 133 */ 134 135 struct pica_dev nec_rd94_cpu[] = { 136 {{ "timer", -1, 0, }, (void *)RD94_SYS_IT_VALUE, }, 137 {{ "dallas_rtc", -1, 0, }, (void *)RD94_SYS_CLOCK, }, 138 {{ "lpt", 0, 0, }, (void *)RD94_SYS_PAR1, }, 139 {{ "fdc", 1, 0, }, (void *)RD94_SYS_FLOPPY, }, 140 {{ "AD1848", 2, 0, }, (void *)RD94_SYS_SOUND,}, 141 {{ "sonic", 3, 0, }, (void *)RD94_SYS_SONIC, }, 142 {{ "NCRC700", 4, 0, }, (void *)RD94_SYS_SCSI0, }, 143 {{ "NCRC700", 5, 0, }, (void *)RD94_SYS_SCSI1, }, 144 {{ "pckbd", 6, 0, }, (void *)RD94_SYS_KBD, }, 145 {{ "pms", 7, 0, }, (void *)RD94_SYS_KBD, }, 146 {{ "com", 8, 0, }, (void *)RD94_SYS_COM1, }, 147 {{ "com", 9, 0, }, (void *)RD94_SYS_COM2, }, 148 {{ NULL, -1, 0, }, (void *)NULL, }, 149 }; 150 151 void 152 c_nec_jazz_set_intr(mask, int_hand, prio) 153 int mask; 154 int (*int_hand)(u_int, struct clockframe *); 155 int prio; 156 { 157 arc_set_intr(mask, int_hand, prio); 158 159 /* Update external interrupt mask but don't enable clock. */ 160 out32(RD94_SYS_EXT_IMASK, cpu_int_mask & (~MIPS_INT_MASK_3 >> 10)); 161 } 162 163 /* 164 * common configuration between NEC EISA and PCI platforms 165 */ 166 void 167 c_nec_jazz_init() 168 { 169 /* chipset-dependent mcclock configuration */ 170 mcclock_jazzio_conf = &mcclock_nec_jazz_conf; 171 172 /* chipset-dependent timer configuration */ 173 timer_jazzio_conf = &timer_nec_jazz_conf; 174 175 /* chipset-dependent jazzio bus configuration */ 176 jazzio_devconfig = nec_rd94_cpu; 177 } 178