1 /* $NetBSD: c_nec_pci.c,v 1.1 2001/06/13 15:23:22 soda Exp $ */ 2 3 /*- 4 * Copyright (C) 2000 Shuichiro URATA. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * for NEC PCI generation machines. 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kcore.h> 36 #include <sys/device.h> 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pio.h> 41 #include <machine/platform.h> 42 #include <mips/pte.h> 43 44 #include <dev/pci/pcivar.h> 45 46 #include <arc/arc/arcbios.h> 47 #include <arc/arc/wired_map.h> 48 #include <arc/jazz/pica.h> 49 #include <arc/jazz/rd94.h> 50 #include <arc/jazz/jazziovar.h> 51 #include <arc/pci/necpbvar.h> 52 53 #include "tga.h" 54 #if NTGA > 0 55 #include <dev/pci/tgavar.h> 56 #endif 57 58 #include "vga_pci.h" 59 #if NVGA_PCI > 0 60 #include <dev/pci/vga_pcivar.h> 61 #endif 62 63 #include "rasdisplay_jazzio.h" 64 #if NRASDISPLAY_JAZZIO > 0 65 #include <arc/jazz/rasdisplay_jazziovar.h> 66 #endif 67 68 #include "pckbc_jazzio.h" 69 #if NPCKBC_JAZZIO > 0 70 #include <dev/ic/pckbcvar.h> 71 #include <arc/jazz/pckbc_jazzioreg.h> 72 #endif 73 74 #include "com.h" 75 #if NCOM > 0 76 #include <sys/termios.h> 77 #include <dev/ic/comreg.h> 78 #include <dev/ic/comvar.h> 79 #endif 80 81 char *c_nec_pci_mainbusdevs[] = { 82 "jazzio", 83 "necpb", 84 NULL, 85 }; 86 87 /* 88 * chipset-dependent jazzio bus configuration 89 */ 90 91 void jazzio_nec_pci_set_iointr_mask __P((int)); 92 93 struct jazzio_config jazzio_nec_pci_conf = { 94 RD94_SYS_INTSTAT1, 95 jazzio_nec_pci_set_iointr_mask, 96 RD94_SYS_TL_BASE, 97 RD94_SYS_DMA0_REGS, 98 }; 99 100 void 101 jazzio_nec_pci_set_iointr_mask(mask) 102 int mask; 103 { 104 /* XXX: I don't know why, but firmware does. */ 105 if (in32(RD94_V_LOCAL_IO_BASE + 0x560) != 0) 106 out16(RD94_SYS_LB_IE2, mask); 107 else 108 out16(RD94_SYS_LB_IE1, mask); 109 } 110 111 /* 112 * critial i/o space, interrupt, and other chipset related initialization. 113 */ 114 void 115 c_nec_pci_init() 116 { 117 /* 118 * Initialize I/O address offset 119 */ 120 arc_bus_space_init(&jazzio_bus, "jazzio", 121 RD94_P_LOCAL_IO_BASE, RD94_V_LOCAL_IO_BASE, 122 RD94_V_LOCAL_IO_BASE, RD94_S_LOCAL_IO_BASE); 123 124 arc_bus_space_init(&arc_bus_io, "rd94pciio", 125 RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO); 126 arc_bus_space_init(&arc_bus_mem, "rd94pcimem", 127 RD94_P_PCI_MEM, RD94_V_PCI_MEM, 0, RD94_S_PCI_MEM); 128 129 /* 130 * Initialize wired TLB for I/O space which is used on early stage 131 */ 132 arc_enter_wired(RD94_V_LOCAL_IO_BASE, RD94_P_LOCAL_IO_BASE, 0, 133 MIPS3_PG_SIZE_256K); 134 arc_enter_wired(RD94_V_PCI_IO, RD94_P_PCI_IO, RD94_P_PCI_MEM, 135 MIPS3_PG_SIZE_16M); 136 137 /* 138 * By default, reserve 32MB in KSEG2 for PCI memory space. 139 * Since kseg2iobufsize/NBPG*4 bytes are used for Sysmap, 140 * this consumes 32KB physical memory. 141 * 142 * If a kernel with "options DIAGNOSTIC" panics with 143 * the message "pmap_enter: kva too big", you have to 144 * increase this value by a option like below: 145 * options KSEG2IOBUFSIZE=0x1b000000 # 432MB consumes 432KB 146 * If you met this symptom, please report it to 147 * port-arc-maintainer@netbsd.org. 148 * 149 * kseg2iobufsize will be refered from pmap_bootstrap(). 150 */ 151 kseg2iobufsize = 0x02000000; /* 32MB: consumes 32KB for PTEs */ 152 153 /* 154 * Initialize interrupt priority 155 */ 156 splvec.splnet = MIPS_INT_MASK_SPL2; 157 splvec.splbio = MIPS_INT_MASK_SPL2; 158 splvec.splvm = MIPS_INT_MASK_SPL2; 159 splvec.spltty = MIPS_INT_MASK_SPL2; 160 splvec.splclock = MIPS_INT_MASK_SPL5; 161 splvec.splstatclock = MIPS_INT_MASK_SPL5; 162 163 /* 164 * Disable all interrupts. New masks will be set up 165 * during system configuration 166 */ 167 out16(RD94_SYS_LB_IE1, 0); 168 out16(RD94_SYS_LB_IE2, 0); 169 out32(RD94_SYS_EXT_IMASK, 0); 170 171 /* 172 * common configuration between NEC EISA and PCI platforms 173 */ 174 c_nec_jazz_init(); 175 176 /* chipset-dependent jazzio bus configuration */ 177 jazzio_conf = &jazzio_nec_pci_conf; 178 } 179 180 /* 181 * console initialization 182 */ 183 void 184 c_nec_pci_cons_init() 185 { 186 if (!com_console) { 187 if (strcmp(arc_displayc_id, "10110004") == 0) { 188 /* NEC RISCstation 2200 PCI TGA [NEC-RA94] */ 189 /* NEC RISCstation 2250 PCI TGA [NEC-RD94] */ 190 /* NEC Express 5800/230 R4400 PCI TGA [NEC-JC94] */ 191 /* NEC Express 5800/230 R10000 PCI TGA [[NEC-J95] */ 192 #if NTGA > 0 193 necpb_init(&necpb_main_context); 194 /* XXX device number is hardcoded */ 195 if (tga_cnattach(&necpb_main_context.nc_iot, 196 &necpb_main_context.nc_memt, 197 &necpb_main_context.nc_pc, 0, 3, 0) == 0) { 198 #if NPCKBC_JAZZIO > 0 199 pckbc_cnattach(&jazzio_bus, PICA_SYS_KBD, 200 JAZZIO_KBCMDP, PCKBC_KBD_SLOT); 201 #endif 202 return; 203 } 204 #endif 205 } else if (strcmp(arc_displayc_id, "53335631") == 0 206 /* NEC RISCstation 2200 PCI VGA S3 ViRGE [NEC-RA'94] */ 207 || strcmp(arc_displayc_id, "3D3D0001") == 0 208 /* NEC RISCstation 2200 PCI VGA 3Dlab GLINT 300SX */ 209 ) { 210 /* XXX - the followings are not really tested */ 211 #if NVGA_PCI > 0 212 necpb_init(&necpb_main_context); 213 /* XXX device number is hardcoded */ 214 if (vga_pci_cnattach(&necpb_main_context.nc_iot, 215 &necpb_main_context.nc_memt, 216 &necpb_main_context.nc_pc, 0, 3, 0) == 0) { 217 #if NPCKBC_JAZZIO > 0 218 pckbc_cnattach(&jazzio_bus, PICA_SYS_KBD, 219 JAZZIO_KBCMDP, PCKBC_KBD_SLOT); 220 #endif 221 return; 222 } 223 #endif 224 } else { 225 printf("nec_pci: unknown display controller [%s]\n", 226 arc_displayc_id); 227 } 228 } 229 230 #if NCOM > 0 231 if (com_console_address == 0) 232 com_console_address = RD94_SYS_COM1; 233 comcnattach(&jazzio_bus, com_console_address, 234 com_console_speed, com_freq, com_console_mode); 235 #endif 236 } 237