1 /* $NetBSD: p_acer_pica_61.c,v 1.11 2010/11/12 16:09:57 uebayasi Exp $ */ 2 /* $OpenBSD: picabus.c,v 1.11 1999/01/11 05:11:10 millert Exp $ */ 3 4 /* 5 * Copyright (c) 1994, 1995 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * Author: Per Fogelstrom. (Mips R4x00) 10 * 11 * Permission to use, copy, modify and distribute this software and 12 * its documentation is hereby granted, provided that both the copyright 13 * notice and this permission notice appear in all copies of the 14 * software, derivative works or modified versions, and any portions 15 * thereof, and that both notices appear in supporting documentation. 16 * 17 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 18 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 19 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 20 * 21 * Carnegie Mellon requests users of this software to return to 22 * 23 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 24 * School of Computer Science 25 * Carnegie Mellon University 26 * Pittsburgh PA 15213-3890 27 * 28 * any improvements or extensions that they make and grant Carnegie the 29 * rights to redistribute these changes. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: p_acer_pica_61.c,v 1.11 2010/11/12 16:09:57 uebayasi Exp $"); 34 35 #include <sys/param.h> 36 #include <uvm/uvm.h> 37 38 #include <machine/autoconf.h> 39 #include <machine/platform.h> 40 41 #include <arc/jazz/pica.h> 42 #include <arc/jazz/jazziovar.h> 43 44 /* ALI PICA 61 and some MAGNUM? */ 45 46 void p_acer_pica_61_init(void); 47 48 struct platform platform_acer_pica_61 = { 49 "PICA-61", 50 "MIPS MAG", 51 "", 52 "PICA-61", 53 "Acer", 54 150, /* MHz */ 55 c_jazz_eisa_mainbusdevs, 56 platform_generic_match, 57 p_acer_pica_61_init, 58 c_jazz_eisa_cons_init, 59 jazzio_reset, 60 c_magnum_set_intr, 61 }; 62 63 /* 64 * jazzio bus configuration 65 */ 66 67 struct pica_dev acer_pica_61_cpu[] = { 68 {{ "timer", -1, 0, }, (void *)R4030_SYS_IT_VALUE, }, 69 {{ "dallas_rtc", -1, 0, }, (void *)PICA_SYS_CLOCK, }, 70 {{ "LPT1", 0, 0, }, (void *)PICA_SYS_PAR1, }, 71 {{ "I82077", 1, 0, }, (void *)PICA_SYS_FLOPPY, }, 72 {{ "MAGNUM", 2, 0, }, (void *)PICA_SYS_SOUND,}, 73 {{ "ALI_S3", 3, 0, }, (void *)PICA_V_LOCAL_VIDEO, }, 74 {{ "SONIC", 4, 0, }, (void *)PICA_SYS_SONIC, }, 75 {{ "ESP216", 5, 0, }, (void *)PICA_SYS_SCSI, }, 76 {{ "I8742", 6, 0, }, (void *)PICA_SYS_KBD, }, 77 {{ "pms", 7, 0, }, (void *)PICA_SYS_KBD, }, /* XXX */ 78 {{ "COM1", 8, 0, }, (void *)PICA_SYS_COM1, }, 79 {{ "COM2", 9, 0, }, (void *)PICA_SYS_COM2, }, 80 {{ NULL, -1, 0, }, NULL, }, 81 }; 82 83 /* 84 * critial i/o space, interrupt, and other chipset related initialization. 85 */ 86 void 87 p_acer_pica_61_init(void) 88 { 89 90 /* 91 * PICA-61 has PC-style coherent(?) 128KB L2 cache, 92 * and mips_L2CachePresent == 0 on this machine. 93 * 94 * if page zero in the idle loop is enabled, 95 * commands dump core due to incoherent cache. 96 */ 97 vm_page_zero_enable = false; /* XXX - should be enabled */ 98 99 c_magnum_init(); 100 101 /* chipset-dependent jazzio bus configuration */ 102 jazzio_devconfig = acer_pica_61_cpu; 103 } 104