xref: /netbsd/sys/arch/arc/arc/p_acer_pica_61.c (revision bf9ec67e)
1 /*	$NetBSD: p_acer_pica_61.c,v 1.1 2001/06/13 15:29:30 soda Exp $	*/
2 /*	$OpenBSD: picabus.c,v 1.11 1999/01/11 05:11:10 millert Exp $	*/
3 
4 /*
5  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  * Author: Per Fogelstrom. (Mips R4x00)
10  *
11  * Permission to use, copy, modify and distribute this software and
12  * its documentation is hereby granted, provided that both the copyright
13  * notice and this permission notice appear in all copies of the
14  * software, derivative works or modified versions, and any portions
15  * thereof, and that both notices appear in supporting documentation.
16  *
17  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
18  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
19  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
20  *
21  * Carnegie Mellon requests users of this software to return to
22  *
23  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
24  *  School of Computer Science
25  *  Carnegie Mellon University
26  *  Pittsburgh PA 15213-3890
27  *
28  * any improvements or extensions that they make and grant Carnegie the
29  * rights to redistribute these changes.
30  */
31 
32 #include <sys/param.h>
33 #include <uvm/uvm_extern.h>
34 
35 #include <machine/autoconf.h>
36 #include <machine/platform.h>
37 
38 #include <arc/jazz/pica.h>
39 #include <arc/jazz/jazziovar.h>
40 
41 #include "asc.h"
42 #if NASC > 0
43 #include <arc/jazz/ascvar.h>
44 
45 struct asc_config asc_acer_pica_61_conf = {
46 	&asc_timing_25mhz,
47 	0,
48 };
49 #endif
50 
51 /* ALI PICA 61 and some MAGNUM? */
52 
53 void p_acer_pica_61_init __P((void));
54 
55 struct platform platform_acer_pica_61 = {
56 	"PICA-61",
57 	"MIPS MAG",
58 	"",
59 	"Pica-61",
60 	"Acer",
61 	150, /* MHz */
62 	c_jazz_eisa_mainbusdevs,
63 	platform_generic_match,
64 	p_acer_pica_61_init,
65 	c_jazz_eisa_cons_init,
66 	jazzio_reset,
67 	c_magnum_set_intr,
68 };
69 
70 /*
71  * jazzio bus configuration
72  */
73 
74 struct pica_dev acer_pica_61_cpu[] = {
75 	{{ "timer",	-1, 0, },	(void *)R4030_SYS_IT_VALUE, },
76 	{{ "dallas_rtc", -1, 0, },	(void *)PICA_SYS_CLOCK, },
77 	{{ "lpt",	0, 0, },	(void *)PICA_SYS_PAR1, },
78 	{{ "fdc",	1, 0, },	(void *)PICA_SYS_FLOPPY, },
79 	{{ "MAGNUM",	2, 0, },	(void *)PICA_SYS_SOUND,},
80 	{{ "ALI_S3",	3, 0, },	(void *)PICA_V_LOCAL_VIDEO, },
81 	{{ "sonic",	4, 0, },	(void *)PICA_SYS_SONIC, },
82 	{{ "asc",	5, 0, },	(void *)PICA_SYS_SCSI, },
83 	{{ "pckbd",	6, 0, },	(void *)PICA_SYS_KBD, },
84 	{{ "pms",	7, 0, },	(void *)PICA_SYS_KBD, },
85 	{{ "com",	8, 0, },	(void *)PICA_SYS_COM1, },
86 	{{ "com",	9, 0, },	(void *)PICA_SYS_COM2, },
87 	{{ NULL,	-1, 0, },	(void *)NULL, },
88 };
89 
90 /*
91  * critial i/o space, interrupt, and other chipset related initialization.
92  */
93 void
94 p_acer_pica_61_init()
95 {
96 	/*
97 	 * PICA-61 has PC-style coherent(?) 128KB L2 cache,
98 	 * and mips_L2CachePresent == 0 on this machine.
99 	 *
100 	 * if page zero in the idle loop is enabled,
101 	 * commands dump core due to incoherent cache.
102 	 */
103 	vm_page_zero_enable = FALSE; /* XXX - should be enabled */
104 
105 	c_magnum_init();
106 
107 	/* chipset-dependent jazzio bus configuration */
108 	jazzio_devconfig = acer_pica_61_cpu;
109 
110 #if NASC > 0
111 	asc_conf = &asc_acer_pica_61_conf;
112 #endif
113 }
114