xref: /netbsd/sys/arch/arc/arc/p_dti_arcstation.c (revision bf9ec67e)
1 /*	$NetBSD: p_dti_arcstation.c,v 1.1 2001/06/13 15:27:17 soda Exp $	*/
2 /*	$OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $	*/
3 
4 /*
5  * Copyright (c) 1988 University of Utah.
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This code is derived from software contributed to Berkeley by
10  * the Systems Programming Group of the University of Utah Computer
11  * Science Department, The Mach Operating System project at
12  * Carnegie-Mellon University and Ralph Campbell.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. All advertising materials mentioning features or use of this software
23  *    must display the following acknowledgement:
24  *	This product includes software developed by the University of
25  *	California, Berkeley and its contributors.
26  * 4. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  *
42  *	from: @(#)machdep.c	8.3 (Berkeley) 1/12/94
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/device.h>
48 #include <uvm/uvm_extern.h>
49 
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/pio.h>
53 #include <machine/platform.h>
54 
55 #include <dev/isa/isareg.h>
56 #include <dev/isa/isavar.h>
57 #include <dev/ic/i8042reg.h>
58 
59 #include <arc/dti/desktech.h>
60 
61 void arc_sysreset __P((bus_addr_t, bus_size_t));
62 
63 #include "pc.h"
64 #if NPC_ISA > 0 || NOPMS_ISA > 0
65 #include <arc/dev/pcconsvar.h>
66 #include <arc/isa/pccons_isavar.h>
67 #endif
68 
69 #include "btl.h"
70 #if NBTL > 0
71 #include <arc/dti/btlvar.h>
72 #endif
73 
74 char *p_dti_arcstation_mainbusdevs[] = {
75 	"arcsisabr",
76 	NULL,
77 };
78 
79 void p_dti_arcstation_init __P((void));
80 void p_dti_arcstation_cons_init __P((void));
81 void p_dti_arcstation_reset __P((void));
82 
83 struct platform platform_desktech_arcstation_i = {
84 	"DESKTECH-ARCStation I",
85 	NULL, /* unknown, probably "DESKTECH"? */
86 	"",
87 	"DESKstation rPC44",
88 	"DESKTECH",
89 	150, /* MHz ?? */
90 	p_dti_arcstation_mainbusdevs,
91 	platform_generic_match,
92 	p_dti_arcstation_init,
93 	c_isa_cons_init,
94 	p_dti_arcstation_reset,
95 	arc_set_intr,
96 };
97 
98 #if NPC_ISA > 0 || NOPMS_ISA > 0
99 /*
100  * platform-dependent pccons configuration
101  */
102 
103 void pccons_dti_arcstation_init __P((void));
104 
105 struct pccons_config pccons_dti_arcstation_conf = {
106 	0x3b4, 0xb0000,	/* mono: iobase, memaddr */
107 	0x3d4, 0xa0000,	/* cga:  iobase, memaddr */
108 	0x64, 0x60,	/* kbdc: cmdport, dataport */
109 	pccons_dti_arcstation_init,
110 };
111 
112 void
113 pccons_dti_arcstation_init()
114 {
115 	kbc_put8042cmd(CMDBYTE);		/* Want XT codes.. */
116 }
117 
118 #endif /* NPC_ISA > 0 || NOPMS_ISA > 0 */
119 
120 #if NBTL > 0
121 /*
122  * platform-dependent btl configuration
123  */
124 
125 void btl_dti_arcstation_bouncemem __P((u_int *, u_int *));
126 u_int32_t btl_dti_arcstation_kvtophys __P((u_int32_t));
127 u_int32_t btl_dti_arcstation_phystokv __P((u_int32_t));
128 
129 struct btl_config btl_dti_arcstation_conf = {
130 	btl_dti_arcstation_bouncemem,
131 	btl_dti_arcstation_kvtophys,
132 	btl_dti_arcstation_phystokv,
133 };
134 
135 void
136 btl_dti_arcstation_bouncemem(basep, sizep)
137 	u_int *basep, *sizep;
138 {
139 	/*
140 	 * XXX static buffer as a kludge.
141 	 * DMA isn't cache coherent on the rpc44, so we always use
142 	 * uncached buffers for DMA.
143 	 */
144 	static char rpc44_buffer[TYNE_S_BOUNCE];
145 
146 	*sizep = TYNE_S_BOUNCE; /* Good enough? XXX */
147 #if 0
148 	*basep = (u_int) malloc(*sizep, M_DEVBUF, M_NOWAIT);
149 #else
150 	*basep = (u_int) rpc44_buffer | 0xa0000000;
151 #endif
152 }
153 
154 u_int32_t
155 btl_dti_arcstation_kvtophys(v)
156 	u_int32_t v;
157 {
158 	return (v);
159 }
160 
161 u_int32_t
162 btl_dti_arcstation_phystokv(p)
163 	u_int32_t p;
164 {
165 	return (p);
166 }
167 #endif /* NBTL > 0 */
168 
169 /*
170  * critial i/o space, interrupt, and other chipset related initialization.
171  */
172 void
173 p_dti_arcstation_init()
174 {
175 	/*
176 	 * XXX - should be enabled, if tested.
177 	 *
178 	 * We use safe default for now, because this platform is untested.
179 	 * In other words, the following may not be needed at all.
180 	 */
181 	vm_page_zero_enable = FALSE;
182 
183 	/*
184 	 * Initialize I/O address offset
185 	 */
186 	arc_bus_space_init(&arc_bus_io, "rpc44isaio",
187 	    RPC44_P_ISA_IO, RPC44_V_ISA_IO, 0, RPC44_S_ISA_IO);
188 	arc_bus_space_init(&arc_bus_mem, "rpc44isamem",
189 	    RPC44_P_ISA_MEM, RPC44_V_ISA_MEM, 0, RPC44_S_ISA_MEM);
190 
191 	/*
192 	 * Initialize wired TLB for I/O space which is used on early stage
193 	 */
194 	/* no need to initialize wired TLB */
195 
196 	/*
197 	 * Initialize interrupt priority
198 	 */
199 	/*
200 	 * XXX
201 	 *	- rewrite spl handling to allow ISA clock > bio|tty|net
202 	 * or
203 	 *	- use MIP3_INTERNAL_TIMER_INTERRUPT for clock
204 	 */
205 
206 	/*
207 	 * common configuration for DTI platforms
208 	 */
209 	c_isa_init();
210 
211 #if NPC_ISA > 0 || NOPMS_ISA > 0
212 	/* platform-dependent pccons configuration */
213 	pccons_isa_conf = &pccons_dti_arcstation_conf;
214 #endif
215 
216 #if NBTL > 0
217 	/* platform-dependent btl configuration */
218 	btl_conf = &btl_dti_arcstation_conf;
219 #endif
220 }
221 
222 void
223 p_dti_arcstation_reset()
224 {
225 	arc_sysreset(RPC44_V_ISA_IO + IO_KBD, KBCMDP);
226 }
227