1 /* $NetBSD: p_dti_tyne.c,v 1.1 2001/06/13 15:27:18 soda Exp $ */ 2 /* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */ 3 4 /* 5 * Copyright (c) 1988 University of Utah. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * the Systems Programming Group of the University of Utah Computer 11 * Science Department, The Mach Operating System project at 12 * Carnegie-Mellon University and Ralph Campbell. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the University of 25 * California, Berkeley and its contributors. 26 * 4. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * from: @(#)machdep.c 8.3 (Berkeley) 1/12/94 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 #include <uvm/uvm_extern.h> 49 50 #include <machine/autoconf.h> 51 #include <machine/bus.h> 52 #include <machine/pio.h> 53 #include <machine/platform.h> 54 #include <mips/pte.h> 55 56 #include <dev/isa/isareg.h> 57 #include <dev/isa/isavar.h> 58 #include <dev/ic/i8042reg.h> 59 60 #include <arc/arc/wired_map.h> 61 #include <arc/dti/desktech.h> 62 63 void arc_sysreset __P((bus_addr_t, bus_size_t)); 64 65 #include "pc.h" 66 #if NPC_ISA > 0 || NOPMS_ISA > 0 67 #include <arc/dev/pcconsvar.h> 68 #include <arc/isa/pccons_isavar.h> 69 #endif 70 71 #include "btl.h" 72 #if NBTL > 0 73 #include <arc/dti/btlvar.h> 74 #endif 75 76 char *p_dti_tyne_mainbusdevs[] = { 77 "tyneisabr", 78 NULL 79 }; 80 81 void p_dti_tyne_init __P((void)); 82 void p_dti_tyne_cons_init __P((void)); 83 void p_dti_tyne_reset __P((void)); 84 85 struct platform platform_desktech_tyne = { 86 "DESKTECH-TYNE", 87 "DESKTECH", 88 "", 89 "DESKstation Tyne", 90 "DESKTECH", 91 150, /* MHz ?? */ 92 p_dti_tyne_mainbusdevs, 93 platform_generic_match, 94 p_dti_tyne_init, 95 c_isa_cons_init, 96 p_dti_tyne_reset, 97 arc_set_intr, 98 }; 99 100 #if NPC_ISA > 0 || NOPMS_ISA > 0 101 /* 102 * platform-dependent pccons configuration 103 */ 104 105 void pccons_dti_tyne_init __P((void)); 106 107 struct pccons_config pccons_dti_tyne_conf = { 108 0x3b4, 0xb0000, /* mono: iobase, memaddr */ 109 0x3d4, 0xb8000, /* cga: iobase, memaddr */ 110 0x64, 0x60, /* kbdc: cmdport, dataport */ 111 pccons_dti_tyne_init, 112 }; 113 114 void 115 pccons_dti_tyne_init() 116 { 117 outb(arc_bus_io.bs_vbase + 0x3ce, 6); /* Correct video mode */ 118 outb(arc_bus_io.bs_vbase + 0x3cf, 119 inb(arc_bus_io.bs_vbase + 0x3cf) | 0xc); 120 kbc_put8042cmd(CMDBYTE); /* Want XT codes.. */ 121 } 122 123 #endif /* NPC_ISA > 0 || NOPMS_ISA > 0 */ 124 125 #if NBTL > 0 126 /* 127 * platform-dependent btl configuration 128 */ 129 130 void btl_dti_tyne_bouncemem __P((u_int *, u_int *)); 131 u_int32_t btl_dti_tyne_kvtophys __P((u_int32_t)); 132 u_int32_t btl_dti_tyne_phystokv __P((u_int32_t)); 133 134 struct btl_config btl_dti_tyne_conf = { 135 btl_dti_tyne_bouncemem, 136 btl_dti_tyne_kvtophys, 137 btl_dti_tyne_phystokv, 138 }; 139 140 void 141 btl_dti_tyne_bouncemem(basep, sizep) 142 u_int *basep, *sizep; 143 { 144 *basep = TYNE_V_BOUNCE; 145 *sizep = TYNE_S_BOUNCE; 146 } 147 148 u_int32_t 149 btl_dti_tyne_kvtophys(v) 150 u_int32_t v; 151 { 152 return ((v & 0x7fffff) | 0x800000); 153 } 154 155 u_int32_t 156 btl_dti_tyne_phystokv(p) 157 u_int32_t p; 158 { 159 return ((v & 0x7fffff) | TYNE_V_BOUNCE); 160 } 161 #endif /* NBTL > 0 */ 162 163 /* 164 * critial i/o space, interrupt, and other chipset related initialization. 165 */ 166 void 167 p_dti_tyne_init() 168 { 169 /* 170 * XXX - should be enabled, if tested. 171 * 172 * We use safe default for now, because this platform is untested. 173 * In other words, the following may not be needed at all. 174 */ 175 vm_page_zero_enable = FALSE; 176 177 /* 178 * Initialize I/O address offset 179 */ 180 arc_bus_space_init(&arc_bus_io, "tyneisaio", 181 TYNE_P_ISA_IO, TYNE_V_ISA_IO, 0, TYNE_S_ISA_IO); 182 arc_bus_space_init(&arc_bus_mem, "tyneisamem", 183 TYNE_P_ISA_MEM, TYNE_V_ISA_MEM, 0, TYNE_S_ISA_MEM); 184 185 /* 186 * Initialize wired TLB for I/O space which is used on early stage 187 */ 188 arc_enter_wired(TYNE_V_BOUNCE, TYNE_P_BOUNCE, 0, MIPS3_PG_SIZE_256K); 189 arc_enter_wired(TYNE_V_ISA_IO, TYNE_P_ISA_IO, 0, MIPS3_PG_SIZE_1M); 190 arc_enter_wired(TYNE_V_ISA_MEM, TYNE_P_ISA_MEM, 0, MIPS3_PG_SIZE_1M); 191 arc_enter_wired(0xe3000000, 0xfff00000, 0, MIPS3_PG_SIZE_4K); 192 193 /* 194 * Initialize interrupt priority 195 */ 196 /* 197 * XXX 198 * - rewrite spl handling to allow ISA clock > bio|tty|net 199 * or 200 * - use MIP3_INTERNAL_TIMER_INTERRUPT for clock 201 */ 202 203 /* 204 * common configuration for DTI platforms 205 */ 206 c_isa_init(); 207 208 #if NPC_ISA > 0 || NOPMS_ISA > 0 209 /* platform-dependent pccons configuration */ 210 pccons_isa_conf = &pccons_dti_tyne_conf; 211 #endif 212 213 #if NBTL > 0 214 /* platform-dependent btl configuration */ 215 btl_conf = &btl_dti_tyne_conf; 216 #endif 217 } 218 219 void 220 p_dti_tyne_reset() 221 { 222 arc_sysreset(TYNE_V_ISA_IO + IO_KBD, KBCMDP); 223 } 224