xref: /netbsd/sys/arch/arc/arc/p_sni_rm200pci.c (revision bf9ec67e)
1 /*	$NetBSD: p_sni_rm200pci.c,v 1.1 2001/06/13 15:36:44 soda Exp $	*/
2 /*	$OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $	*/
3 
4 /*
5  * Copyright (c) 1988 University of Utah.
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This code is derived from software contributed to Berkeley by
10  * the Systems Programming Group of the University of Utah Computer
11  * Science Department, The Mach Operating System project at
12  * Carnegie-Mellon University and Ralph Campbell.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. All advertising materials mentioning features or use of this software
23  *    must display the following acknowledgement:
24  *	This product includes software developed by the University of
25  *	California, Berkeley and its contributors.
26  * 4. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  *
42  *	from: @(#)machdep.c	8.3 (Berkeley) 1/12/94
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/device.h>
48 #include <uvm/uvm_extern.h>
49 
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/pio.h>
53 #include <machine/platform.h>
54 #include <mips/pte.h>
55 
56 void p_sni_rm200pci_init __P((void));
57 void p_sni_rm200pci_cons_init __P((void));
58 
59 #include "com.h"
60 #if NCOM > 0
61 #include <sys/termios.h>
62 #include <dev/ic/comreg.h>
63 #include <dev/ic/comvar.h>
64 #endif
65 
66 struct platform platform_sni_rm200pci = {
67 	"RM200PCI",
68 	NULL, /* unknown */
69 	"",
70 	"RM200",
71 	"Siemens Nixdorf",
72 	150, /* MHz ?? */
73 	NULL, /* XXX */
74 	platform_generic_match,
75 	p_sni_rm200pci_init,
76 	p_sni_rm200pci_cons_init,
77 	platform_nop, /* reset */
78 	arc_set_intr, /* ??? */
79 };
80 
81 /*
82  * critial i/o space, interrupt, and other chipset related initialization.
83  */
84 void
85 p_sni_rm200pci_init()
86 {
87 	/*
88 	 * XXX - should be enabled, if tested.
89 	 *
90 	 * We use safe default for now, because this platform is untested.
91 	 * In other words, the following may not be needed at all.
92 	 */
93 	vm_page_zero_enable = FALSE;
94 
95 	/*
96 	 * Initialize I/O address offset
97 	 */
98 #if 0
99 	arc_bus_space_init(&arc_bus_io, "rm200isaio",
100 	    RM200_P_ISA_IO, RM200_V_ISA_IO, 0, RM200_S_ISA_IO);
101 	arc_bus_space_init(&arc_bus_mem, "rm200isamem",
102 	    RM200_P_ISA_MEM, RM200_V_ISA_MEM, 0, RM200_S_ISA_MEM);
103 #endif
104 
105 	/*
106 	 * Initialize wired TLB for I/O space which is used on early stage
107 	 */
108 
109 	/*
110 	 * Initialize interrupt priority
111 	 */
112 }
113 
114 void
115 p_sni_rm200pci_cons_init()
116 {
117 	if (!com_console) {
118 		/* XXX For now... */
119 	}
120 	if (com_console_address == 0) {
121 #if 0		/* XXX */
122 		com_console_address = xxx;
123 #else
124 		panic("console address unknown");
125 #endif
126 	}
127 	comcnattach(&arc_bus_io /* XXX? */, com_console_address,
128 	    com_console_speed, com_freq, com_console_mode);
129 }
130