xref: /netbsd/sys/arch/arc/dti/btlreg.h (revision bf9ec67e)
1 /*	$NetBSD: btlreg.h,v 1.3 2000/02/22 11:26:01 soda Exp $	*/
2 
3 typedef u_int8_t physaddr[4];
4 typedef u_int8_t physlen[4];
5 #define	ltophys	_lto4l
6 #define	phystol	_4ltol
7 
8 /*
9  * I/O port offsets
10  */
11 #define	BT_CTRL_PORT		0	/* control (wo) */
12 #define	BT_STAT_PORT		0	/* status (ro) */
13 #define	BT_CMD_PORT		1	/* command (wo) */
14 #define	BT_DATA_PORT		1	/* data (ro) */
15 #define	BT_INTR_PORT		2	/* interrupt status (ro) */
16 
17 /*
18  * BT_CTRL bits
19  */
20 #define BT_CTRL_HRST		0x80	/* Hardware reset */
21 #define BT_CTRL_SRST		0x40	/* Software reset */
22 #define BT_CTRL_IRST		0x20	/* Interrupt reset */
23 #define BT_CTRL_SCRST		0x10	/* SCSI bus reset */
24 
25 /*
26  * BT_STAT bits
27  */
28 #define BT_STAT_STST		0x80	/* Self test in Progress */
29 #define BT_STAT_DIAGF		0x40	/* Diagnostic Failure */
30 #define BT_STAT_INIT		0x20	/* Mbx Init required */
31 #define BT_STAT_IDLE		0x10	/* Host Adapter Idle */
32 #define BT_STAT_CDF		0x08	/* cmd/data out port full */
33 #define BT_STAT_DF		0x04	/* Data in port full */
34 #define BT_STAT_INVDCMD		0x01	/* Invalid command */
35 
36 /*
37  * BT_CMD opcodes
38  */
39 #define	BT_NOP			0x00	/* No operation */
40 #define BT_MBX_INIT		0x01	/* Mbx initialization */
41 #define BT_START_SCSI		0x02	/* start scsi command */
42 #define BT_INQUIRE_REVISION	0x04	/* Adapter Inquiry */
43 #define BT_MBO_INTR_EN		0x05	/* Enable MBO available interrupt */
44 #if 0
45 #define BT_SEL_TIMEOUT_SET	0x06	/* set selection time-out */
46 #define BT_BUS_ON_TIME_SET	0x07	/* set bus-on time */
47 #define BT_BUS_OFF_TIME_SET	0x08	/* set bus-off time */
48 #define BT_SPEED_SET		0x09	/* set transfer speed */
49 #endif
50 #define BT_INQUIRE_DEVICES	0x0a	/* return installed devices 0-7 */
51 #define BT_INQUIRE_CONFIG	0x0b	/* return configuration data */
52 #define BT_TARGET_EN		0x0c	/* enable target mode */
53 #define BT_INQUIRE_SETUP	0x0d	/* return setup data */
54 #define BT_ECHO			0x1e	/* Echo command data */
55 #define BT_INQUIRE_DEVICES_2	0x23	/* return installed devices 8-15 */
56 #define BT_MBX_INIT_EXTENDED	0x81	/* Mbx initialization */
57 #define BT_INQUIRE_REVISION_3	0x84	/* Get 3rd firmware version byte */
58 #define BT_INQUIRE_REVISION_4	0x85	/* Get 4th firmware version byte */
59 #define BT_INQUIRE_MODEL	0x8b	/* Get hardware ID and revision */
60 #define	BT_INQUIRE_PERIOD	0x8c	/* Get synchronous period */
61 #define BT_INQUIRE_EXTENDED	0x8d	/* Adapter Setup Inquiry */
62 #define	BT_ROUND_ROBIN		0x8f	/* Enable/Disable(default) round robin */
63 
64 /*
65  * BT_INTR bits
66  */
67 #define BT_INTR_ANYINTR		0x80	/* Any interrupt */
68 #define BT_INTR_SCRD		0x08	/* SCSI reset detected */
69 #define BT_INTR_HACC		0x04	/* Command complete */
70 #define BT_INTR_MBOA		0x02	/* MBX out empty */
71 #define BT_INTR_MBIF		0x01	/* MBX in full */
72 
73 struct bt_mbx_out {
74 	physaddr ccb_addr;
75 	u_char dummy[3];
76 	u_char cmd;
77 };
78 
79 struct bt_mbx_in {
80 	physaddr ccb_addr;
81 	u_char dummy[3];
82 	u_char stat;
83 };
84 
85 /*
86  * mbo.cmd values
87  */
88 #define BT_MBO_FREE	0x0	/* MBO entry is free */
89 #define BT_MBO_START	0x1	/* MBO activate entry */
90 #define BT_MBO_ABORT	0x2	/* MBO abort entry */
91 
92 /*
93  * mbi.stat values
94  */
95 #define BT_MBI_FREE	0x0	/* MBI entry is free */
96 #define BT_MBI_OK	0x1	/* completed without error */
97 #define BT_MBI_ABORT	0x2	/* aborted ccb */
98 #define BT_MBI_UNKNOWN	0x3	/* Tried to abort invalid CCB */
99 #define BT_MBI_ERROR	0x4	/* Completed with error */
100 
101 #if	defined(BIG_DMA)
102 #define BT_NSEG 2048    /* Number of scatter gather segments - to much vm */
103 #else
104 #define	BT_NSEG	(MAXPHYS / NBPG)
105 #endif /* BIG_DMA */
106 
107 struct bt_scat_gath {
108 	physlen seg_len;
109 	physaddr seg_addr;
110 };
111 
112 struct bt_ccb {
113 	u_char opcode;
114 	u_char:3, data_in:1, data_out:1,:3;
115 	u_char scsi_cmd_length;
116 	u_char req_sense_length;
117 	/*------------------------------------longword boundary */
118 	physlen data_length;
119 	/*------------------------------------longword boundary */
120 	physaddr data_addr;
121 	/*------------------------------------longword boundary */
122 	u_char dummy1[2];
123 	u_char host_stat;
124 	u_char target_stat;
125 	/*------------------------------------longword boundary */
126 	u_char target;
127 	u_char lun;
128 	struct scsi_generic scsi_cmd;
129 	u_char dummy2[1];
130 	u_char link_id;
131 	/*------------------------------------longword boundary */
132 	physaddr link_addr;
133 	/*------------------------------------longword boundary */
134 	physaddr sense_ptr;
135 /*-----end of HW fields-----------------------longword boundary */
136 	struct scsipi_sense_data scsi_sense;
137 	/*------------------------------------longword boundary */
138 	struct bt_scat_gath scat_gath[BT_NSEG];
139 	/*------------------------------------longword boundary */
140 	TAILQ_ENTRY(bt_ccb) chain;
141 	struct bt_ccb *nexthash;
142 	long hashkey;
143 	struct scsipi_xfer *xs;		/* the scsi_xfer for this cmd */
144 	int flags;
145 #define	CCB_ALLOC	0x01
146 #define	CCB_ABORT	0x02
147 #ifdef BTDIAG
148 #define	CCB_SENDING	0x04
149 #endif
150 	int timeout;
151 };
152 
153 struct bt_buf {
154 	TAILQ_ENTRY(bt_buf) chain;
155 	char	buf[4096 - 2 * sizeof(struct bt_buf *)];
156 };
157 
158 /*
159  * opcode fields
160  */
161 #define BT_INITIATOR_CCB	0x00	/* SCSI Initiator CCB */
162 #define BT_TARGET_CCB		0x01	/* SCSI Target CCB */
163 #define BT_INIT_SCAT_GATH_CCB	0x02	/* SCSI Initiator with scattter gather */
164 #define BT_RESET_CCB		0x81	/* SCSI Bus reset */
165 
166 /*
167  * bt_ccb.host_stat values
168  */
169 #define BT_OK		0x00	/* cmd ok */
170 #define BT_LINK_OK	0x0a	/* Link cmd ok */
171 #define BT_LINK_IT	0x0b	/* Link cmd ok + int */
172 #define BT_SEL_TIMEOUT	0x11	/* Selection time out */
173 #define BT_OVER_UNDER	0x12	/* Data over/under run */
174 #define BT_BUS_FREE	0x13	/* Bus dropped at unexpected time */
175 #define BT_INV_BUS	0x14	/* Invalid bus phase/sequence */
176 #define BT_BAD_MBO	0x15	/* Incorrect MBO cmd */
177 #define BT_BAD_CCB	0x16	/* Incorrect ccb opcode */
178 #define BT_BAD_LINK	0x17	/* Not same values of LUN for links */
179 #define BT_INV_TARGET	0x18	/* Invalid target direction */
180 #define BT_CCB_DUP	0x19	/* Duplicate CCB received */
181 #define BT_INV_CCB	0x1a	/* Invalid CCB or segment list */
182 
183 struct bt_extended_inquire {
184 	struct {
185 		u_char	opcode;
186 		u_char	len;
187 	} cmd;
188 	struct {
189 		u_char	bus_type;	/* Type of bus connected to */
190 #define	BT_BUS_TYPE_24BIT	'A'	/* ISA bus */
191 #define	BT_BUS_TYPE_32BIT	'E'	/* EISA/VLB/PCI bus */
192 #define	BT_BUS_TYPE_MCA		'M'	/* MicroChannel bus */
193 		u_char	bios_address;	/* Address of adapter BIOS */
194 		u_short	max_segment;	/* ? */
195 	} reply;
196 };
197 
198 struct bt_config {
199 	struct {
200 		u_char	opcode;
201 	} cmd;
202 	struct {
203 		u_char  chan;
204 		u_char  intr;
205 		u_char  scsi_dev:3;
206 		u_char	:5;
207 	} reply;
208 };
209 
210 struct bt_toggle {
211 	struct {
212 		u_char	opcode;
213 		u_char	enable;
214 	} cmd;
215 };
216 
217 struct bt_mailbox {
218 	struct {
219 		u_char	opcode;
220 		u_char	nmbx;
221 		physaddr addr;
222 	} cmd;
223 };
224 
225 struct bt_model {
226 	struct {
227 		u_char	opcode;
228 		u_char	len;
229 	} cmd;
230 	struct {
231 		u_char	id[4];		/* i.e bt742a -> '7','4','2','A' */
232 		u_char	version[2];	/* i.e Board Revision 'H' -> 'H', 0x00 */
233 	} reply;
234 };
235 
236 struct bt_revision {
237 	struct {
238 		u_char	opcode;
239 	} cmd;
240 	struct {
241 		u_char  board_type;
242 		u_char  custom_feature;
243 		char    firm_revision;
244 		u_char  firm_version;
245 	} reply;
246 };
247 
248 struct bt_digit {
249 	struct {
250 		u_char	opcode;
251 	} cmd;
252 	struct {
253 		u_char  digit;
254 	} reply;
255 };
256 
257 struct bt_devices {
258 	struct {
259 		u_char	opcode;
260 	} cmd;
261 	struct {
262 		u_char	junk[8];
263 	} reply;
264 };
265 
266 struct bt_setup {
267 	struct {
268 		u_char	opcode;
269 		u_char	len;
270 	} cmd;
271 	struct {
272 		u_char  sync_neg:1;
273 		u_char  parity:1;
274 		u_char	:6;
275 		u_char  speed;
276 		u_char  bus_on;
277 		u_char  bus_off;
278 		u_char  num_mbx;
279 		u_char  mbx[3];		/*XXX */
280 		/* doesn't make sense with 32bit addresses */
281 		struct {
282 			u_char  offset:4;
283 			u_char  period:3;
284 			u_char  valid:1;
285 		} sync[8];
286 		u_char  disc_sts;
287 	} reply;
288 };
289 
290 struct bt_period {
291 	struct {
292 		u_char	opcode;
293 		u_char	len;
294 	} cmd;
295 	struct {
296 		u_char	period[8];
297 	} reply;
298 };
299 
300 #define INT9	0x01
301 #define INT10	0x02
302 #define INT11	0x04
303 #define INT12	0x08
304 #define INT14	0x20
305 #define INT15	0x40
306 
307 #define EISADMA	0x00
308 #define CHAN0	0x01
309 #define CHAN5	0x20
310 #define CHAN6	0x40
311 #define CHAN7	0x80
312